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...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 8039920 | Methods for forming planarized hermetic barrier layers and structures formed thereby Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise forming a conductive material in an interconnect opening within an interlayer dielectric material that is disposed on a substrate, forming a low densit... | 10/18/2011 |
| 7939906 | Preparation method for an electron tomography sample with embedded markers and a method for reconstructing a three-dimensional image A manufacturing method for an electron tomography specimen with embedded fiducial markers includes the following steps. A chip of wafer is provided. The chip includes at least one inspecting area. At least one trench is produced beside the inspecting area. A liquid ... | 05/10/2011 |
| 7646077 | Methods and structure for forming copper barrier layers integral with semiconductor substrates structures The present invention is directed to improved dielectric copper barrier layer and related interconnect structures. One structure includes a semiconductor substrate having a copper line. An insulating layer formed of at least one of silicon and carbon is formed on th... | 01/12/2010 |
| 7492029 | Asymmetric field effect transistors (FETs) A semiconductor structure. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical contact with the semiconductor sou... | 02/17/2009 |
| 7482668 | Semiconductor device A semiconductor device is provided. A transistor is formed on a substrate, and a metal silicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively form a protection layer ... | 01/27/2009 |
| 7453133 | Silicide/semiconductor structure and method of fabrication A preferred embodiment of the present invention comprises a dielectric/metal/2nd energy bandgap (Eg) semiconductor/1st Eg substrate structure. In order to reduce the contact resistance, a semiconductor with a lower energy ... | 11/18/2008 |
| 7436039 | Gallium nitride semiconductor device A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n− doped GaN layer having a thickness greater than one micron disposed on said n+ GaN laye... | 10/14/2008 |
| 7435670 | Bit line barrier metal layer for semiconductor device and process for preparing the same The present invention relates to a bit line barrier metal layer for a semiconductor device and a process for preparing the same, the process comprising: forming bit line contact on an insulation layer vapor-deposited on an upper part of a substrate so as to expose a... | 10/14/2008 |
| 7432559 | Silicide formation on SiGe A semiconductor structure includes a first silicon-containing layer comprising an element selected from the group consisting essentially of carbon and germanium wherein the silicon-containing layer has a first atomic percentage of the element to the element and sili... | 10/07/2008 |
| 7405458 | Asymmetric field transistors (FETs) A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical ... | 07/29/2008 |
| 7391089 | Semiconductor device and method of manufacturing the same A semiconductor device which includes a field effect transistor having a gate electrode on the upper side of a semiconductor substrate, with a gate insulation film therebetween, wherein at least the gate insulation film side of the gate electrode includes a film con... | 06/24/2008 |
| 7352048 | Integration of barrier layer and seed layer The present invention generally relates to filling of a feature by depositing a barrier layer, depositing a seed layer over the barrier layer, and depositing a conductive layer over the seed layer. In one embodiment, the seed layer comprises a copper alloy seed laye... | 04/01/2008 |
| 7339213 | Semiconductor device having a triple gate transistor and method for manufacturing the same In a semiconductor capable of reducing NBTI and a method for manufacturing the same, a multi-gate transistor includes an active region, gate dielectric, channels in the active region, and gate electrodes, and is formed on a semiconductor wafer. The active region has... | 03/04/2008 |
| 7332785 | Dye-sensitized solar cell A dye-sensitized solar cell with high conversion efficiency is provided. The dye-sensitized solar cell according to the present invention has, between an electrode (2) formed on a surface of a transparent substrate (1) and a counter electrode (6... | 02/19/2008 |
| 7332782 | Dye-sensitized solar cell A dye-sensitized solar cell with high conversion efficiency is provided. The dye-sensitized solar cell according to the present invention has, between an electrode (2) formed on a surface of a transparent substrate (1) and a counter electrode (6... | 02/19/2008 |
| 7329937 | Asymmetric field effect transistors (FETs) A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical ... | 02/12/2008 |
| 7315068 | Interface layer for the fabrication of electronic devices The present invention is directed to methods for making electronic devices with a thin anisotropic conducting layer interface layer formed between a substrate and an active device layer that is preferably patterned conductive layer. The interface layer preferably pr... | 01/01/2008 |
| 7312507 | Sensitizing dye solar cell A dye-sensitized solar cell with high conversion efficiency is provided. The dye-sensitized solar cell according to the present invention has, between an electrode (2) formed on a surface of a transparent substrate (1) and a counter electrode (6... | 12/25/2007 |
| 7282778 | Chemical sensor using chemically induced electron-hole production at a Schottky barrier Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential f... | 10/16/2007 |
| 7276796 | Formation of oxidation-resistant seed layer for interconnect applications An interconnect structure of the single or dual damascene type and a method of forming the same, which substantially reduces the surface oxidation problem of plating a conductive material onto a noble metal seed layer are provided. In accordance with the present inv... | 10/02/2007 |
| 7274082 | Chemical sensor using chemically induced electron-hole production at a schottky barrier Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential f... | 09/25/2007 |
| 7253486 | Field plate transistor with reduced field plate resistance In one example embodiment, a transistor (100) is provided. The transistor (100) comprises a source (10), a gate (30), a drain (20), and a field plate (40) located between the gate (30) and the drain (20). The f... | 08/07/2007 |
| 7251799 | Metal interconnect structure for integrated circuits and a design rule therefor A method is provided for designing an integrated circuit having an interconnect structure with a reduced lateral dimension relative to a pre-existing interconnect structure layout. The method begins by reducing in scale by a desired amount the lateral dimension of a... | 07/31/2007 |
| 7214988 | Metal oxide semiconductor transistor A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a ... | 05/08/2007 |
| 7186446 | Plasma enhanced ALD of tantalum nitride and bilayer A method to deposit TaN by plasma enhanced layer with various nitrogen content. Using a mixture of hydrogen and nitrogen plasma, the nitrogen content in the film can be controlled from 0 to N/Ta=1.7. By turning off the nitrogen flow during deposition of TaN, a TaN/T... | 03/06/2007 |
| 7175709 | Epitaxy layer and method of forming the same A method of forming an epitaxial layer of uniform thickness is provided to improve surface flatness. A substrate is first provided and a Si base layer is then formed on the substrate by epitaxy. A Si—Ge layer containing 5 to 10% germanium is formed on the Si base ... | 02/13/2007 |
| 7176537 | High performance CMOS with metal-gate and Schottky source/drain A semiconductor device having a metal/metal silicide gate and a Schottky source/drain and a method of forming the same are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a metal or metal silicide gate electrode hav... | 02/13/2007 |
| 7112513 | Sub-micron space liner and densification process A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, an oxygen barrier is deposited into the trench. An expandable, oxidizable liner, preferably amorphous silicon,... | 09/26/2006 |
| 7101739 | Method for forming a schottky diode on a silicon carbide substrate A method for manufacturing a vertical Schottky diode with a guard ring on a lightly-doped N-type silicon carbide layer, including forming a P-type epitaxial layer on the N-type layer; implanting N-type dopants in areas of the P-type epitaxial layer to neutralize in ... | 09/05/2006 |
| 7098676 | Multi-functional structure for enhanced chip manufacturibility and reliability for low k dielectrics semiconductors and a crackstop integrity screen and monitor An on-chip redundant crack termination barrier structure, or crackstop, provides a barrier for preventing defects, cracks, delaminations, and moisture/oxidation contaminants from reaching active circuit regions. Conductive materials in the barrier structure design p... | 08/29/2006 |
| 7091572 | Fast recovery diode with a single large area p/n junction A fast recovery diode has a single large area P/N junction surrounded by a termination region. The anode contact in contact with the central active area extends over the inner periphery of an oxide termination ring and an EQR metal ring extends over the outer periph... | 08/15/2006 |
| 7078783 | Vertical unipolar component A vertical unipolar component formed in a semiconductor substrate. An upper portion of the substrate includes insulated trenches filled with a vertical multiple-layer of at least two conductive elements separated by an insulating layer, the multiple-layer depth bein... | 07/18/2006 |
| 7071525 | Merged P-i-N schottky structure A Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper o... | 07/04/2006 |
| 7071526 | Semiconductor device having Schottky junction electrode A GaN semiconductor device with improved heat resistance of the Schottky junction electrode and excellent power performance and reliability is provided. In this semiconductor device having a Schottky gate electrode 17 which is in contact with an AlGaN electro... | 07/04/2006 |
| 7064407 | JFET controlled schottky barrier diode A JFET controlled Schottky barrier diode includes a p-type diffusion region integrated into the cathode of the Schottky diode to form an integrated JFET where the integrated JFET provides on-off control of the Schottky barrier diode. The p-type diffusion region encl... | 06/20/2006 |
| 7057267 | Semiconductor device and method of fabrication thereof, electronic module, and electronic instrument A semiconductor device includes a substrate on which are formed a first group and a second group of leads; and a semiconductor chip having a first group and a second group of electrodes, the first group and a second group of electrodes being arranged respectively on... | 06/06/2006 |
| 7057213 | Chemical sensor using chemically induced electron-hole production at a schottky barrier Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential f... | 06/06/2006 |
| 7001842 | Methods of fabricating semiconductor devices having salicide Methods for fabricating a semiconductor device with salicide are disclosed. One example method includes forming a gate electrode structure having a gate oxide film, a gate electrode, and a protection film stacked on a substrate in succession, and gate spacers on sid... | 02/21/2006 |
| 6965130 | Alternating implant ring terminations A semiconductor device including a semiconductive body having formed therein an active region and a termination feature which includes spaced field rings disposed around the active region and diffusion rings of the same conductivity type as, but different conductivi... | 11/15/2005 |
| 6963121 | Schottky-barrier tunneling transistor A three-terminal semiconductor transistor device comprises a base region formed by a semiconductor material of a first conductivity type at a first concentration, the base region being in contact with a first electrical terminal via a semiconductor material of the s... | 11/08/2005 |
