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| Number | Title | Issue Date |
| 8159038 | Self aligned silicided contacts Structures and methods of forming self aligned silicided contacts are disclosed. The structure includes a gate electrode disposed over an active area, a liner disposed over the gate electrode and at least a portion of the active area, an insulating layer disposed ov... | 04/17/2012 |
| 8115263 | Laminated silicon gate electrode Within a method for forming a silicon layer, there is employed at least one sub-layer formed of a higher crystalline silicon material and at least one sub-layer formed of a lower crystalline silicon material. The lower crystalline silicon material is formed employin... | 02/14/2012 |
| 8115264 | Semiconductor device having a metal gate with a low sheet resistance and method of fabricating metal gate of the same Provided is a semiconductor device that comprises a metal gate having a low sheet resistance characteristic and a high diffusion barrier characteristic and a method of fabricating the metal gate of the semiconductor device. The semiconductor device includes a metal ... | 02/14/2012 |
| 8110880 | Systems and methods for interconnect metallization using a stop-etch layer Systems and methods for single lithography step interconnection metallization using a stop-etch layer are described. A method that includes depositing a stop-etch layer over a semiconductor device, depositing an interconnect metallization material over the stop-etch... | 02/07/2012 |
| 8063453 | Gate in semiconductor device and method of fabricating the same A gate of a semiconductor device includes a substrate, and a polysilicon layer over the substrate, wherein the polysilicon layer is doped with first conductive type impurities having a concentration that decreases when receding from the substrate and counter-doped w... | 11/22/2011 |
| 8058695 | Semiconductor device A semiconductor device includes a silicon substrate, and a NiSi layer provided on the silicon substrate aiming to suppress oxidation of the surface of a NiSi layer and the resistivity increase. The NiSi layer includes a bottom NiSi region and a top NiSi region. The ... | 11/15/2011 |
| 8039907 | Semiconductor device and method for fabricating the same A transistor, comprising a first gate structure formed on a substrate, and having a stacked structure of a first gate electrode and a first gate hard mask, a first gate spacer formed on sidewalls of the first gate structure, a second gate structure having a stacked ... | 10/18/2011 |
| 8039908 | Damascene gate having protected shorting regions The present invention relates generally to semiconductor devices and, more specifically, to damascene gates having protected shorting regions and related methods for their manufacture. A first aspect of the invention provides a method of forming a damascene gate wit... | 10/18/2011 |
| 8030718 | Local charge and work function engineering on MOSFET The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having a source region and a drain region, defining a first dimension from the source to drain; and a gate stack disposed on the semiconductor substra... | 10/04/2011 |
| 7968954 | Intermediate semiconductor device having nitrogen concentration profile A method for reducing the effective thickness of a gate oxide using nitrogen implantation and anneal subsequent to dopant implantation and activation is provided. More particularly, the present invention provides a method for fabricating semiconductor devices, for e... | 06/28/2011 |
| 7968956 | Semiconductor device A semiconductor device includes a semiconductor substrate, a p-channel MIS transistor formed on the substrate, the p-channel transistor having a first gate dielectric formed on the substrate and a first gate electrode layer formed on the first dielectric, and an n-c... | 06/28/2011 |
| 7968955 | Gate in semiconductor device and method of fabricating the same A gate of a semiconductor device includes a substrate, and a polysilicon layer over the substrate, wherein the polysilicon layer is doped with first conductive type impurities having a concentration that decreases when receding from the substrate and counter-doped w... | 06/28/2011 |
| 7944005 | Semiconductor device and method for fabricating the same A semiconductor device includes a semiconductor substrate including an NMOS region and a PMOS region, active regions of the semiconductor substrate defined by a device isolation structure formed in the semiconductor substrate, the active regions including an NMOS ac... | 05/17/2011 |
| 7944006 | Metal gate electrode stabilization by alloying Stabilized metal gate electrode for complementary metal-oxide-semiconductor (“CMOS”) applications and methods of making the stabilized metal gate electrodes are disclosed. Specifically, the metal gate electrodes are stabilized by alloying wherein the alloy compr... | 05/17/2011 |
| 7915695 | Semiconductor device comprising gate electrode A semiconductor device capable of reducing deterioration of electron mobility while suppressing depletion of gate electrodes is provided. This semiconductor device includes a metal-containing layer so formed that at least either a first gate electrode or a second ga... | 03/29/2011 |
| 7902614 | Semiconductor device with gate stack structure A semiconductor device includes a first conductive layer, a first intermediate structure over the first conductive layer, a second intermediate structure over the first intermediate structure, and a second conductive layer over the second intermediate structure. The... | 03/08/2011 |
| 7898042 | Two-terminal switching devices and their methods of fabrication Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid... | 03/01/2011 |
| 7884428 | Semiconductor device and method for manufacturing the same A semiconductor device includes an Nch transistor having a first gate electrode and a Pch transistor having a second gate electrode. The first gate electrode and the second gate electrode are made of materials causing stresses of different magnitudes. ... | 02/08/2011 |
| 7880243 | Simple low power circuit structure with metal gate and high-k dielectric FET device structures are disclosed with the PFET and NFET devices having high-k dielectric gate insulators and metal containing gates. The metal layers of the gates in both the NFET and PFET devices have been fabricated from a single common metal layer. Due to the ... | 02/01/2011 |
| 7875939 | Semiconductor device including an ohmic layer In an ohmic layer and methods of forming the ohmic layer, a gate structure including the ohmic layer and a metal wiring having the ohmic layer, the ohmic layer is formed using tungsten silicide that includes tungsten and silicon with an atomic ratio within a range o... | 01/25/2011 |
| 7851874 | Semiconductor device and method for manufacturing the same A semiconductor device according to an embodiment includes device isolating layers having a top surface lower than a sheet height of a semiconductor substrate; a gate insulating layer and a gate electrode sequentially stacked on the upper surface of an active region... | 12/14/2010 |
| 7812415 | Apparatus having gate structure and source/drain over semiconductor substrate A semiconductor device including a gate insulating layer formed over a semiconductor substrate; a gate insulating layer pattern formed over an exposed uppermost surface of the semiconductor substrate along the same horizontal plane as the gate insulating layer; an i... | 10/12/2010 |
| 7812414 | Hybrid process for forming metal gates A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a first MOS device of a first conductivity type and a second MOS device of a second conductivity type opposite the first conductivity type. The first MOS de... | 10/12/2010 |
| 7808058 | Method of forming a transistor having gate protection and transistor formed according to the method A microelectronic device and a method of forming same. The method comprises: a transistor gate; a first spacer and a second spacer respectively adjacent a first side and a second side of the gate; a diffusion layer supra-adjacent the gate; contact regions super-adja... | 10/05/2010 |
| 7781849 | Semiconductor devices and methods of fabricating the same Provided are semiconductor devices and methods of fabricating the same, and more specifically, semiconductor devices having a W—Ni alloy thin layer that has a low resistance, and methods of fabricating the same. The semiconductor devices include the W—Ni alloy t... | 08/24/2010 |
| 7759748 | Semiconductor device with reduced diffusion of workfunction modulating element A semiconductor device is disclosed that comprises a fully silicided electrode formed of an alloy of a semiconductor material and a metal, a workfunction modulating element for modulating a workfunction of the alloy, and a dielectric in contact with the fully silici... | 07/20/2010 |
| 7745889 | Metal oxide semiconductor transistor with Y shape metal gate A metal oxide semiconductor (MOS) transistor with a Y structure metal gate is provided. The MOS transistor includes a substrate, a Y structure metal gate positioned on the substrate, two doping regions disposed in the substrate on two sides of the Y structure metal ... | 06/29/2010 |
| 7732878 | MOS devices with continuous contact etch stop layer A semiconductor structure includes a substrate, a gate stack on the substrate, a source/drain region adjacent the gate stack, a source/drain silicide region on the source/drain region, a protection layer on the source/drain silicide region, wherein a region over the... | 06/08/2010 |
| 7732879 | Semiconductor device and method for manufacturing semiconductor device Provided are a semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes: a gate electrode formed of polysilicon on a substrate with a gate insulating layer interposed between the gate electrode and the substrate... | 06/08/2010 |
| 7728394 | Semiconductor device and manufacturing method thereof A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111... | 06/01/2010 |
| 7709910 | Semiconductor structure for low parasitic gate capacitance A semiconductor structure provides lower parasitic capacitance between the gate electrode and contact vias while providing substantially the same level of stress applied by a nitride liner as conventional MOSFETs by reducing the height of the gate electrode and main... | 05/04/2010 |
| 7696585 | Semiconductor device and manufacturing method of semiconductor device In one aspect of the present invention, a semiconductor device may include a semiconductor substrate; a first gate dielectric layer provided on the semiconductor substrate, the relative dielectric constant ratio of the first gate dielectric layer being no less than ... | 04/13/2010 |
| 7696586 | Cobal disilicide structure A structure. The structure may include a layer of cobalt disilicide that is substantially free of cobalt monosilicide and there is substantially no stringer of an oxide of titanium on the layer of cobalt disilicide. The structure may include a substrate that include... | 04/13/2010 |
| 7683443 | MOS devices with multi-layer gate stack An embodiment of a semiconductor device includes a semiconductor substrate having a principal surface, spaced-apart source and drain regions separated by a channel region at the principal surface, and a multilayered gate structure located over the channel region. Th... | 03/23/2010 |
| 7683442 | Raised source/drain with super steep retrograde channel Systems and methods for raised source/drain with super steep retrograde channel. In accordance with a first embodiment of the present invention, in one embodiment, a semiconductor device comprises a substrate comprising a surface and a gate oxide disposed above the ... | 03/23/2010 |
| 7679149 | Method of removing refractory metal layers and of siliciding contact areas A method of formation of contacts with cobalt silicide since is disclosed. For example, after siliciding with the SOM solution, both unreacted sections of the deposition layer including, for example, cobalt as initial layer for the siliciding and an oxidation protec... | 03/16/2010 |
| 7576399 | Semiconductor device and method of manufacture thereof A dielectric material layer is formed over a workpiece, a metal layer is formed over the dielectric material layer, and a semiconductive material layer is formed over the metal layer. The workpiece is heated, causing a top portion of the metal layer to interact with... | 08/18/2009 |
| 7511350 | Nickel alloy silicide including indium and a method of manufacture therefor The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate ... | 03/31/2009 |
| 7495298 | Insulating buffer film and high dielectric constant semiconductor device and method for fabricating the same A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in t... | 02/24/2009 |
| 7495299 | Semiconductor device The following steps are carried out: forming a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween, forming a dummy gate electrode on the semiconductor substrate with a dummy gate insulating film interposed therebetween an... | 02/24/2009 |
