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| Number | Title | Issue Date |
| 7687869 | Semiconductor device and method of manufacturing the same A semiconductor device according to the present invention comprises a semiconductor substrate, a gate insulating film which is composed of a material whose main component is a tetravalent metal oxide, a mixture of a tetravalent metal oxide and SiO2, or a ... | 03/30/2010 |
| 7459757 | Transistor structures The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed wi... | 12/02/2008 |
| 7442999 | Semiconductor substrate, substrate for semiconductor crystal growth, semiconductor device, optical semiconductor device, and manufacturing method thereof A semiconductor substrate includes: a semiconductor crystal layer grown on one face of a substrate; and a stress relaxation layer, which is formed on the other face opposite to the one face and the side face of the substrate and applies stress to the substrate in th... | 10/28/2008 |
| 7411237 | Lanthanum hafnium oxide dielectrics Dielectric layers containing a lanthanum hafnium oxide layer, where the lanthanum hafnium oxide layer is arranged as a structure of one or more monolayers, provide an insulating layer in a variety of structures for use in a wide range of electronic devices. ... | 08/12/2008 |
| 7355226 | Power semiconductor and method of fabrication This invention is generally concerned with power semiconductors such as power MOS transistors, insulated gate by bipolar transistors (IGBTs), high voltage diodes and the like, and method for their fabrication. A power semiconductor, the semiconductor comprising a po... | 04/08/2008 |
| 7312491 | Charge trapping semiconductor memory element with improved trapping dielectric A semiconductor memory element, which can be controlled via field effect, includes a semiconductor substrate of a first conduction type, a first doping region of a second conduction type provided in the semiconductor substrate, a second doping region of the second c... | 12/25/2007 |
| 7304340 | Semiconductor storage elements, semiconductor device manufacturing methods therefor, portable electronic equipment and IC card A semiconductor storage element has a memory function body on opposite sides of a gate electrode formed on a semiconductor substrate. Each end of source/drain regions is located in the semiconductor substrate just under the memory function body and offset with respe... | 12/04/2007 |
| 7301219 | Electrically erasable programmable read only memory (EEPROM) cell and method for making the same An asymmetrically doped memory cell has first and second N+ doped junctions on a P substrate. A composite charge trapping layer is disposed over the P substrate and between the first and the second N+ doped junctions. A N− doped region is positioned adjacent to th... | 11/27/2007 |
| 7262463 | Transistor including a deposited channel region having a doped portion A transistor having a gate electrode, a source electrode, a drain electrode, a dielectric material and a channel region disposed between the source electrode and drain electrode. The channel region includes a portion doped with an impurity to change the fixed charge... | 08/28/2007 |
| 7221586 | Memory utilizing oxide nanolaminates Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region b... | 05/22/2007 |
| 7208802 | Insulating film and electronic device An insulating film includes a first barrier layer, a well layer provided on the first barrier layer, a second barrier layer provided on the well layer. The first barrier layer consists of a material having a first bandgap and a first relative permittivity. The well ... | 04/24/2007 |
| 7205186 | System and method for suppressing oxide formation A system and method for suppressing sub-oxide formation during the manufacturing of semiconductor devices (such as MOSFET transistor) with high-k gate dielectric is disclosed. In one example, the MOSFET transistor includes a gate structure including a high-k gate di... | 04/17/2007 |
| 7193893 | Write once read only memory employing floating gates Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate tra... | 03/20/2007 |
| 7187043 | Memory function body, particle forming method therefor and, memory device, semiconductor device, and electronic equipment having the memory function body A memory function body has a medium interposed between a first conductor (e.g., a conductive substrate) and a second conductor (e.g., an electrode) and consisting of a first material (e.g., silicon oxide or silicon nitride). The medium contains particles. Each parti... | 03/06/2007 |
| 7166509 | Write once read only memory with large work function floating gates Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate tra... | 01/23/2007 |
| 7164177 | Multi-level memory cell A multi-level memory cell including a substrate, a tunneling dielectric layer, a charge-trapping layer, a top dielectric layer, a gate and a pair of source/drain regions is provided. The tunneling dielectric layer, the charge-trapping layer and the top dielectric la... | 01/16/2007 |
| 7161203 | Gated field effect device comprising gate dielectric having different K regions This invention includes gated field effect devices, and methods of forming gated field effect devices. In one implementation, a gated field effect device includes a pair of source/drain regions having a channel region therebetween. A gate is received proximate the c... | 01/09/2007 |
| 7154140 | Write once read only memory with large work function floating gates Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate tra... | 12/26/2006 |
| 7141857 | Semiconductor structures and methods of fabricating semiconductor structures comprising hafnium oxide modified with lanthanum, a lanthanide-series metal, or a combination thereof Semiconductor structures and processes for fabricating semiconductor structures comprising hafnium oxide layers modified with lanthanum oxide or a lanthanide-series metal oxide are provided. A semiconductor structure in accordance with an embodiment of the invention... | 11/28/2006 |
| 7138692 | Semiconductor device A gate insulating film and a gate electrode are formed on a silicon substrate. The gate insulating film contains at least hafnium, oxygen, fluorine, and nitrogen. The fluorine concentration is high in the vicinity of an interface with the silicon substrate and progr... | 11/21/2006 |
| 7132336 | Method and apparatus for forming a memory structure having an electron affinity region An improved semiconductor memory structure and methods for its fabrication are disclosed. The memory structure includes a semiconductor substrate having a dielectric region formed over a channel region. A doped region is formed between a top portion and a bottom por... | 11/07/2006 |
| 7129544 | Vertical compound semiconductor field effect transistor structure In one embodiment, a compound semiconductor vertical FET device (11) includes a first trench (29) formed in a body of semiconductor material (13), and a second trench (34) formed within the first trench (29) to define a channel reg... | 10/31/2006 |
| 7119402 | Field effect transistor and manufacturing method thereof A field effect transistor includes a first semiconductor region forming a channel region, a gate electrode insulatively disposed above the first semiconductor region, source and drain electrodes formed to sandwich the first semiconductor region in a channel lengthwi... | 10/10/2006 |
| 7119395 | Memory cell with nanocrystals or nanodots The storage layer (6) is in each case present above a region in which the channel region (3) adjoins a source/drain region (2) and is in each case interrupted above an intervening middle part of the channel region (3). The storage layer (... | 10/10/2006 |
| 7112494 | Write once read only memory employing charge trapping in insulators Structures and methods for write once read only memory employing charge trapping in insulators are provided. The write once read only memory cell includes a metal oxide semiconductor field effect transistor having a first source/drain region, a second source/drain r... | 09/26/2006 |
| 7109131 | System and method for hydrogen-rich selective oxidation The present invention relates generally to semiconductor fabrication. More particularly, the present invention relates to system and method of selectively oxidizing one material with respect to another material formed on a semiconductor substrate. A hydrogen-rich ox... | 09/19/2006 |
| 7094707 | Method of forming nitrided oxide in a hot wall single wafer furnace A method of nitriding a gate oxide layer by annealing a preformed oxide layer with nitric oxide (NO) gas in a hot wall, single wafer furnace is provided. The nitridation process can be carried out rapidly (i.e., at nitridation times of 30 seconds to 2 minutes) while... | 08/22/2006 |
| 7087969 | Complementary field effect transistor and its manufacturing method A complementary field effect transistor comprises: a semiconductor substrate; an n-type field effect transistor provided on the semiconductor substrate; and a p-type field effect transistor provided on the semiconductor substrate. The n-type field effect transistor ... | 08/08/2006 |
| 7071117 | Semiconductor devices and methods for depositing a dielectric film Embodiments provide methods and apparatuses for chemical vapor depositing a dielectric film, and various structures, devices, and systems, which incorporate dielectric elements formed from the dielectric film. The method includes heating a chamber, within which a su... | 07/04/2006 |
| 7041543 | Strained transistor architecture and method Transistor architectures and fabrication processes generate channel strain without adversely impacting the efficiency of the transistor fabrication process while preserving the material quality and enhancing the performance of the resulting transistor. Transistor st... | 05/09/2006 |
| 7034346 | Semiconductor device and method for manufacturing the same A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and... | 04/25/2006 |
| 7015536 | Charge trapping device and method of forming the same A charge trapping device, and a method of forming the same is disclosed. Charge traps are optimally distributed through a trapping region based on controlling various conventional processing operations, such as an implant, an anneal, an insulator film deposition, an... | 03/21/2006 |
| 7002224 | Transistor with doped gate dielectric A transistor and method of manufacture thereof. A semiconductor workpiece is doped before depositing a gate dielectric material. Using a separate anneal process or during subsequent anneal processes used to manufacture the transistor, dopant species from the doped r... | 02/21/2006 |
| 6996009 | NOR flash memory cell with high storage density Structures and methods for NOR flash memory cells, arrays and systems are provided. The NOR flash memory cell includes a vertical floating gate transistor extending outwardly from a substrate. The floating gate transistor having a first source/drain region, a second... | 02/07/2006 |
| 6952362 | Ferroelectric write once read only memory for archival storage Structures and methods for ferroelectric write once read only memory adapted to be programmed for long retention archival storage are provided. The write once read only memory cell includes a charge amplifier transistor. The transistor includes a source region, a dr... | 10/04/2005 |
| 6939749 | Method of manufacturing a semiconductor device that includes heating the gate insulating film A process for fabricating a thin film transistor, which comprises crystallizing an amorphous silicon film, forming thereon a gate insulating film and a gate electrode, implanting impurities in a self-aligned manner, adhering a coating containing a catalyst element w... | 09/06/2005 |
| 6927435 | Semiconductor device and its production process A semiconductor device comprising a semiconductor substrate, gate insulators formed on the substrate, and gate electrodes formed on the gate insulators, the gate insulators which are mainly composed of a material selected from titanium oxide, zirconium oxide and haf... | 08/09/2005 |
| 6908868 | Gas passivation on nitride encapsulated devices A method for passivating at least interfaces between structures formed from a conductive or semiconductive material and adjacent dielectric structures so as to reduce a concentration of dangling silicon bonds at these interfaces and to reduce or eliminate the occurr... | 06/21/2005 |
| 6888204 | Semiconductor devices, and methods for same Described are preferred processes for conditioning semiconductor devices with deuterium to improve operating characteristics and decrease depassivation which occurs during the course of device operation. Also described are semiconductor devices which can be prepared... | 05/03/2005 |
| 6882031 | Ammonia gas passivation on nitride encapsulated devices A passivation method includes disassociating ammonia so as to expose at least interfaces between silicon-containing and passivation structures to at least hydrogen species derived from the ammonia and forming an encapsulant layer that is positioned so as to substant... | 04/19/2005 |
