...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 8093660 | Semiconductor device A voltage mitigating element mitigating a voltage applied across a gate insulating film in an off state of an insulated gate bipolar transistor (IGBT) is arranged to a gate electrode node of a P-channel MOS transistor provided for suppressing flow-in of holes at the... | 01/10/2012 |
| 8080853 | Semiconductor device including insulated gate bipolar transistor and diode A semiconductor device includes a vertical IGBT and a vertical free-wheeling diode in a semiconductor substrate. A plurality of base regions is disposed at a first-surface side portion of the semiconductor substrate, and a plurality of collector regions and a plural... | 12/20/2011 |
| 8053843 | Integrated electrostatic discharge (ESD) device A semiconductor device for ESD protection includes a semiconductor substrate of a first conductivity type and a well region of a second conductivity type formed within the substrate. The well region is characterized by a first depth. The device includes an MOS trans... | 11/08/2011 |
| 8049282 | Bipolar device having buried contacts The invention, in one aspect, provides a semiconductor device that includes a collector for a bipolar transistor located within a semiconductor substrate and a buried contact, at least a portion of which is located in the collector to a depth sufficient that adequat... | 11/01/2011 |
| 7977752 | Thin-film semiconductor device, lateral bipolar thin-film transistor, hybrid thin-film transistor, MOS thin-film transistor, and method of fabricating thin-film transistor In a lateral bipolar transistor including an emitter, a base and a collector which are formed in a semiconductor thin film formed on an insulating substrate, the semiconductor thin film is a semiconductor thin film which is crystallized in a predetermined direction.... | 07/12/2011 |
| 7977753 | High voltage BICMOS device and method for manufacturing the same A high voltage BICMOS device and a method for manufacturing the same, which may improve the reliability of the device by securing a distance between adjacent DUF regions, are provided. The high voltage BICMOS device includes: a reverse diffusion under field (DUF) re... | 07/12/2011 |
| 7960796 | Semiconductor device having element isolation region An n-type buried diffusion layer is formed on the surface layer of the prescribed area of a p-type silicon substrate, and a p-type first high-concentration isolation diffusion layer is formed in the silicon substrate so as to surround the buried diffusion layer. An ... | 06/14/2011 |
| 7898038 | Method to improve writer leakage in SiGe bipolar device The invention, in one aspect, provides a method for fabricating a semiconductor device, which includes conducting an etch through an opening in an emitter layer to form a cavity from an underlying oxide layer that exposes a doped tub. A first silicon/germanium (SiGe... | 03/01/2011 |
| 7888745 | Bipolar transistor with dual shallow trench isolation and low base resistance An improved bipolar transistor with dual shallow trench isolation for reducing the parasitic component of the base to collector capacitance Ccb and base resistance Rb is provided. The structure includes a semiconductor substrate having at least a pair of neighboring... | 02/15/2011 |
| 7834403 | Bipolar transistor FINFET technology This document discusses, among other things, apparatus having at least one CMOS transistor overlying a substrate; and at least one finned bipolar transistor overlying the substrate and methods for making the apparatus. ... | 11/16/2010 |
| 7829955 | Semiconductor device A horizontal semiconductor device having multiple unit semiconductor elements, each of said unit semiconductor element formed by an IGBT including: a semiconductor substrate of a first conductivity type; a semiconductor region of a second conductivity type formed on... | 11/09/2010 |
| 7816741 | Semiconductor device The semiconductor device of the present invention has a body layer of a P-type impurity region formed on an N− layer of an N-type impurity region. A plurality of trenches is formed through the body layer from the main surface thereof. A gate insulating ... | 10/19/2010 |
| 7800183 | Semiconductor device A semiconductor device includes a substrate of a first conductivity type, a base region of a second conductivity type, a source region of the first conductivity type, a collector region of the second conductivity type, a trench gate, which is formed in a trench via ... | 09/21/2010 |
| 7772653 | Semiconductor apparatus comprising bipolar transistors and metal oxide semiconductor transistors A method for manufacturing a semiconductor apparatus is disclosed. The apparatus comprises double poly bipolar transistors and double poly metal oxide semiconductor (MOS) transistors. The bipolar transistors and the MOS transistors are manufactured in a unified proc... | 08/10/2010 |
| 7755146 | Formation of standard voltage threshold and low voltage threshold MOSFET devices Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked, and a first voltage threshold implant adjustment is performed within... | 07/13/2010 |
| 7745882 | High-gain bipolar junction transistor compatible with complementary metal-oxide-semiconductor (CMOS) process and method for fabricating the same A method for forming a bipolar junction transistor comprises forming a first well of a second conductive type for forming a collector region in a substrate including device isolation layers, wherein the substrate comprises a first conductive type, forming a second w... | 06/29/2010 |
| 7701015 | Bipolar and CMOS integration with reduced contact height Disclosed is a method and structure for an integrated circuit structure that includes a plurality of complementary metal oxide semiconductor (CMOS) transistors and a plurality of vertical bipolar transistors positioned on a single substrate. The vertical bipolar tra... | 04/20/2010 |
| 7696579 | Formation of standard voltage threshold and low voltage threshold MOSFET devices Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked, and a first voltage threshold implant adjustment is performed within... | 04/13/2010 |
| 7696580 | Diode and applications thereof A diode with low substrate current leakage and suitable for BiCMOS process technology. A buried layer is formed on a semiconductor substrate. A connection region and well contact the buried layer. Isolation regions are adjacent to two sides of the buried layer, each... | 04/13/2010 |
| 7605431 | Electrostatic discharge protection apparatus for semiconductor devices The present invention provides several embodiments with layout patterns for ESD protection. An apparatus with a layout pattern may be configured to protect I/O pads or the power rail. The layout pattern may designed to increase the current paths for ESD stress curre... | 10/20/2009 |
| 7569894 | Semiconductor device with NMOS transistors arranged continuously A semiconductor device includes a plurality of PMOS transistors formed on a semiconductor substrate; and a plurality of NMOS transistors formed on the semiconductor substrate. The plurality of PMOS transistors are electrically isolated from each other by a device is... | 08/04/2009 |
| 7547948 | Semiconductor device including bipolar junction transistor with protected emitter-base junction A method of manufacturing a CMOS-BJT semiconductor device comprises the steps of: forming a collector region of a first conductivity type and a first well of the first conductivity type, simultaneously in a semiconductor substrate; forming a second well of a second ... | 06/16/2009 |
| 7518194 | Current amplifying integrated circuit Present invention proposes a dramatic improvement of CMOS IC technology by providing high speed bipolar current amplifiers compatible with CMOS technological process while retaining the footprint compatible to one of standard CMOS devices. This invention promises fu... | 04/14/2009 |
| 7514754 | Complementary metal-oxide-semiconductor transistor for avoiding a latch-up problem A semiconductor device is provided. The semiconductor device includes a substrate, a first epitaxial layer, a first sinker, a first buried layer, a second epitaxial layer, a second sinker and a second buried layer. The first and second epitaxial layers are disposed ... | 04/07/2009 |
| 7511346 | Design of high-frequency substrate noise isolation in BiCMOS technology A high-frequency noise isolation structure and a method for forming the same are provided. The noise isolation structure isolates a first device region and a second device region over a semiconductor substrate. The noise isolation structure preferably includes a sin... | 03/31/2009 |
| 7498639 | Integrated BiCMOS semiconductor circuit An integrated BiCMOS semiconductor circuit has active moat areas in silicon. The active moat areas include electrically active components of the semiconductor circuit, which comprise active window structures for base and/or emitter windows. The integrated BiCMOS sem... | 03/03/2009 |
| 7476942 | SOI lateral semiconductor device and method of manufacturing the same The SOI lateral semiconductor device includes a semiconductor region of a first conductivity type, a buried oxide film layer in the semiconductor region, a thin active layer on the buried oxide film layer, an anode region in the thin active layer, and a drain layer ... | 01/13/2009 |
| 7449754 | Single poly BiCMOS flash cell with floating body A BiCMOS integrated circuit (IC) includes a floating gate-type non-volatile memory (NVM) device that uses the polycrystalline silicon gate of a CMOS FET and the P-base and N-emitter diffusions of a bipolar transistor to provide an isolated P-type body and N-type sou... | 11/11/2008 |
| 7439140 | Formation of standard voltage threshold and low voltage threshold MOSFET devices Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked, and a first voltage threshold implant adjustment is performed within... | 10/21/2008 |
| 7400017 | Reverse conducting semiconductor device and a fabrication method thereof To provide a reverse conducting semiconductor device in which an insulated gate bipolar transistor and a free wheeling diode excellent in recovery characteristic are monolithically formed on a substrate, the free wheeling diode including; a second conductive type ba... | 07/15/2008 |
| 7372109 | Diode and applications thereof A diode with low substrate current leakage and suitable for BiCMOS process technology. A buried layer is formed on a semiconductor substrate. A connection region and well contact the buried layer. Isolation regions are adjacent to two sides of the buried layer, each... | 05/13/2008 |
| 7361552 | Semiconductor integrated circuit including a DRAM and an analog circuit A semiconductor device including an interlayer insulation film formed on a substrate so as to cover first and second regions defined on the substrate, and a capacitor formed over the interlayer insulation film in the first region, wherein the interlayer insulation f... | 04/22/2008 |
| 7358596 | Device isolation for semiconductor devices Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly comprises: a first trench in a semiconductive substrate; a second trench extending the overall trench depth in... | 04/15/2008 |
| 7358130 | Method for monitoring lateral encroachment of spacer process on a CD SEM A process implementing steps for determining encroachment of a spacer structure in a semiconductor device having thick and thin spacer regions, including a transition region formed therebetween. The method steps comprise: obtaining a line width roughness (LWR) measu... | 04/15/2008 |
| 7355248 | Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same A semiconductor device includes a first semiconductor layer that is formed on a first insulating layer; a second insulating layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the second insulating layer; a first gat... | 04/08/2008 |
| 7349251 | Integrated memory circuit arrangement A memory circuit arrangement includes a switching element per column that can be used to connect or disconnect two bit lines for memory cells of a column. The switching element leads to a reduction of the chip area and/or to an improvement in the electronic properti... | 03/25/2008 |
| 7341905 | Method of making high-voltage bipolar/CMOS/DMOS (BCD) devices A process for making an integrated circuit is described wherein sequence of mask steps is applied to a substrate or epitaxial layer of p-type material. The sequence consists of sixteen specific mask steps that permit a variety of bipolar/CMOS/DMOS devices to be fabr... | 03/11/2008 |
| 7329925 | Device for electrostatic discharge protection A device for electrostatic discharge (ESD) protection is disclosed. The device for electrostatic discharge protection includes a lateral bipolar transistor and a diode. The semiconductor transistor has an emitter, a base and a collector electrically connected to a f... | 02/12/2008 |
| 7329566 | Semiconductor device and method of manufacture A semiconductor component and method of manufacture, including an insulated gate bipolar transistor (IGBT) (100, 200) that includes a semiconductor substrate (110) having a first conductivity type and buried semiconductor region (115) having a s... | 02/12/2008 |
| 7329570 | Method for manufacturing a semiconductor device An exemplary method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming a P-well and an N-well for high voltage (HV) devices and a first well in a low voltage/medium voltage (LV/MV) region for a logic device, ... | 02/12/2008 |