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| Number | Title | Issue Date |
| 8183634 | Stack-type semiconductor device A stack-type semiconductor device and a method of manufacturing the same are provided. The stack-type semiconductor device includes an insulation layer on a single-crystalline substrate, a contact plug penetrating the insulation layer to contact the single-crystalli... | 05/22/2012 |
| 8093657 | Circuit and methods to improve the operation of SOI devices According to the present invention, a circuit and methods for enhancing the operation of SOI fabricated devices are disclosed. In a preferred embodiment of the present invention, a pulse discharge circuit is provided. Here, a circuit is designed to provide a pulse t... | 01/10/2012 |
| 8093656 | Electrooptical device and electronic equipment having resin film in light emitting region and sealing region The present invention provides a color filter substrate that can include color filters 12, which are formed in at least a display region and each of which are composed of colored portions, and a light shielding layer on a substrate main body. The light shield... | 01/10/2012 |
| 7994576 | Metal gate transistor and resistor and method for fabricating the same A method for fabricating metal gate transistor and resistor is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation in the substrate of the resistor region; forming a ... | 08/09/2011 |
| 7986007 | MOS transistor and manufacturing method thereof The structure of the MOS transistor provided in this invention has LDD (lightly doped drain) and halo doped regions removed from the source, the drain or both regions in the substrate for improved linearity range when operated as a voltage-controlled resistor. The r... | 07/26/2011 |
| 7982267 | Projector including display device To provide a liquid crystal display device having high quality display by obtaining a high aperture ratio while securing a sufficient storage capacitor (Cs), and at the same time, by dispersing a load (a pixel writing-in electric current) of a capacitor wiring in a ... | 07/19/2011 |
| 7977750 | Semiconductor device and manufacturing method thereof The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the oper... | 07/12/2011 |
| 7968944 | Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof An Integrated Circuit (IC) chip that may be a bulk CMOS IC chip with silicon on insulator (SOI) Field Effect Transistors (FETs) and method of making the chip. The IC chip includes areas with pockets of buried insulator strata and FETs formed on the strata are SOI FE... | 06/28/2011 |
| 7928510 | Manufacturing method of semiconductor device It is an object of the present invention to provide a manufacturing method of a semiconductor device where a semiconductor element is prevented from being damaged and throughput speed thereof is improved, even in a case of thinning or removing a supporting substrate... | 04/19/2011 |
| 7923783 | Semiconductor memory device having resistance element with two conductors A semiconductor memory device according to an embodiment of the present invention includes a resistance element which is constructed with a first conductor which extends in a first direction and is connected to a first contact; a second conductor which extends in sa... | 04/12/2011 |
| 7919814 | Semiconductor device with integrated circuit electrically connected to a MEMS sensor by a through-electrode As well as achieving both downsizing and thickness reduction and sensitivity improvement of a semiconductor device that has: a MEMS sensor formed by bulk micromachining technique such as an acceleration sensor and an angular rate sensor; and an LSI circuit, a packag... | 04/05/2011 |
| 7898032 | Semiconductor device and a method of manufacturing the same The present invention realizes the miniaturization of a semiconductor device. On a first insulation film, an island-like semiconductor layer and a second insulation film which surrounds the semiconductor layer are formed, and resistance elements (for example, poly-s... | 03/01/2011 |
| 7898033 | Semiconductor device A semiconductor device according to this invention is provided with a MOS transistor of at least one type, wherein the MOS transistor has a semiconductor layer (SOI layer) provided on an SOI substrate and a gate electrode provided on the SOI layer and is normally of... | 03/01/2011 |
| 7851861 | MIM capacitor and metal gate transistor A device includes an embedded MIM capacitor and a transistor formed in parallel with reduced processing steps and improved device performance in different regions of a substrate. The embedded MIM capacitor has a bottom electrode, an insulator layer, a dielectric fil... | 12/14/2010 |
| 7843007 | Metal high-k transistor having silicon sidewall for reduced parasitic capacitance A method is disclosed to reduce parasitic capacitance in a metal high dielectric constant (MHK) transistor. The method includes forming a MHK gate stack upon a substrate, the MHK gate stack having a bottom layer of high dielectric constant material, a middle layer o... | 11/30/2010 |
| 7843006 | Semiconductor component arrangement having a power transistor and a temperature measuring arrangement A semiconductor component arrangement includes a power transistor and a temperature measurement circuit. The power transistor includes a gate electrode, a source zone, a drain zone and a body zone. The body zone is arranged in a first semiconductor zone of a first c... | 11/30/2010 |
| 7838936 | Semiconductor device and manufacturing method thereof, and liquid crystal display device An active matrix substrate includes a glass substrate, a driver portion formed on the glass substrate in a protruding state, a stepped portion formed along a surface of the driver portion and a surface of the glass substrate, an insulating reentrant-angle compensati... | 11/23/2010 |
| 7825471 | Semiconductor memory device including SRAM cell having well power potential supply region provided therein A semiconductor memory device includes a first well region of a first conductivity type, first and second SRAM cells adjacently arranged to each other, the first and second SRAM cells each including at least a first transfer transistor and a drive transistor formed ... | 11/02/2010 |
| 7821069 | Semiconductor device and method for manufacturing the same A semiconductor device includes: n transistor elements; n resistive elements; and n capacitive elements, each kind of elements coupled in series between the first and second terminals. The gate of each transistor element has a gate pad, and each transistor element i... | 10/26/2010 |
| 7804133 | Semiconductor storage device and manufacturing method thereof Semiconductor storage devices in which a plurality of semiconductor element devices having different functions are disposed in the appropriate region of the partial SOI substrate and the interface between each gate insulator and each gate electrode is formed to be t... | 09/28/2010 |
| 7781839 | Structure and method for strained transistor directly on insulator A semiconductor device (10) comprising a substrate (12) and an oxide layer (14) formed over the substrate is provided. The semiconductor device further includes a first semiconductor layer (16) having a first lattice constant formed direc... | 08/24/2010 |
| 7759738 | Array substrate and method of manufacturing the same A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is for... | 07/20/2010 |
| 7737499 | SRAM device having a common contact Embodiments relate to a SRAM, in which a well isolation method may be applied so that an N-well and a P-well are separated from each other and that well walls of opposite conductive types are formed on facing sides. Also, the active regions of NMOS and PMOS may be c... | 06/15/2010 |
| 7723790 | Semiconductor device and method of manufacturing the same An isolation insulating film (5) of partial-trench type is selectively formed in an upper surface of a silicon layer (4). A power supply line (21) is formed above the isolation insulating film (5). Below the power supply line (21),... | 05/25/2010 |
| 7709893 | Circuit layout for different performance and method A circuit includes a plurality of first MuGFET devices supported by a substrate and having a first performance level. A plurality of second MuGFET devices is supported by the substrate and have a second performance level. The first and second devices in one embodime... | 05/04/2010 |
| 7696574 | Semiconductor substrate with multiple crystallographic orientations A semiconductor structure and its method for fabrication include a first surface semiconductor layer of a first crystallographic orientation located upon a dielectric surface of a substrate. Located laterally separated upon the dielectric surface from the first surf... | 04/13/2010 |
| 7692245 | Thin film transistor and flat panel display device comprising the same In a thin film transistor and a flat panel display device having the same, cross-talk is minimized. The flat panel display device includes a substrate, a first thin film transistor, a second thin film transistor, and a display element. The first thin film transistor... | 04/06/2010 |
| 7683430 | Electrically floating body memory cell and array, and method of operating or controlling same An integrated circuit having a memory cell and/or memory cell array including a plurality of memory cells (as well as techniques for reading, controlling and/or operating, the memory cell, and/or memory cell array). Each memory cell includes at least one transistor ... | 03/23/2010 |
| 7679142 | Semiconductor wafer, semiconductor device and manufacturing method of semiconductor device A semiconductor wafer includes a semiconductor bulk; a first insulating layer formed on the semiconductor bulk; a first semiconductor layer formed on the first insulating layer; a second insulating layer formed on the first semiconductor layer; and a second semicond... | 03/16/2010 |
| 7638846 | Semiconductor device and manufacturing method thereof The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted, stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the ope... | 12/29/2009 |
| 7615824 | D/A converter circuit, semiconductor device incorporating the D/A converter circuit, and manufacturing method of them D/A conversion having higher accuracy is provided by improving relative accuracy of the resistance value of resistors which configure a resistor string. A manufacturing method of a D/A converter circuit of the invention comprises the steps of: forming a resistor str... | 11/10/2009 |
| 7615825 | Semiconductor device having tapered gate insulating film TFTs arranged in various circuits have structures that are suited for circuit functions, in order to improve operation characteristics and reliability of the semiconductor device, to lower consumption of electric power, to decrease the number of steps, to lower the ... | 11/10/2009 |
| 7569885 | Electro-optical device and electronic apparatus An electro-optical device includes pixel regions arranged at intersections of a plurality of data lines and a plurality of scanning lines on an element substrate. A sensor element, a sensor signal line for outputting a signal from the sensor element, a common wiring... | 08/04/2009 |
| 7521761 | Variable layout structure for producing CMOS circuit A layout structure for a CMOS circuit comprises a transistor layer forming P-type transistors 11 and 21 and N-type transistors 12 and 22, and a resistor layer which includes a resistor 13 formed to have a predetermined length and t... | 04/21/2009 |
| 7501685 | Display device comprising pixel portion To provide a liquid crystal display device having high quality display by obtaining a high aperture ratio while securing a sufficient storage capacitor (Cs), and at the same time, by dispersing a load (a pixel writing-in electric current) of a capacitor wiring in a ... | 03/10/2009 |
| 7482657 | Balanced cells with fabrication mismatches that produce a unique number generator A static random access memory (SRAM) is laid out to be balanced so that, when power is applied to the SRAM, the cells of the SRAM have no preferred logic state. In addition, the SRAM is fabricated in a process the emphasizes mismatches so that each individual cell a... | 01/27/2009 |
| 7459753 | Electro-optical device, method for manufacturing electro-optical device, and electronic apparatus An electro-optical device includes a substrate having a display region; TFTs each including a first electrode in the display region, a first insulating layer on the first electrode, a second electrode on the first insulating layer, and a second insulating layer on t... | 12/02/2008 |
| 7439565 | Active devices array substrate and repairing method thereof An active device array substrate including a substrate, a plurality of active devices, a plurality of the first lead lines, a plurality of the second lead lines and a first floating light-shielding layer is provided. The substrate has a display region and a peripher... | 10/21/2008 |
| 7439110 | Strained HOT (hybrid orientation technology) MOSFETs A strained HOT MOSFET fabrication method. The MOSFET fabrication method includes providing a semiconductor structure which includes (a) a first semiconductor layer having a first crystallographic orientation, (b) a buried insulating layer on top of the first semicon... | 10/21/2008 |
| 7439543 | Semiconductor device comprising thin film transistor comprising conductive film having tapered edge There is provided a thin film transistor having improved reliability. A gate electrode includes a first gate electrode having a taper portion and a second gate electrode with a width narrower than the first gate electrode. A semiconductor layer is doped with phospho... | 10/21/2008 |
