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A method of swing on a swing is disclosed, in which a user positioned on a standard swing suspended by two chains from a substantially horizontal tree branch induces side to side motion by pulling alternately on one chain and then the other.
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| Number | Title | Issue Date |
| 8183632 | Semiconductor device and method of manufacturing the same Disclosed are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a substrate formed therein with a first conductive type well, and an LDMOS device formed on the substrate. The LDMOS device includes a gate electrode, gate... | 05/22/2012 |
| 8174071 | High voltage LDMOS transistor An LDMOS transistor structure and methods of making the same are provided. The structure includes a gate electrode extended on an upper boundary of an extension dielectric region that separates the gate electrode from the drain region of the LDMOS transistor. Moreov... | 05/08/2012 |
| 8159029 | High voltage device having reduced on-state resistance A semiconductor device includes a semiconductor substrate, a source region and a drain region formed in the substrate, a gate structure formed on the substrate disposed between the source and drain regions, and a first isolation structure formed in the substrate bet... | 04/17/2012 |
| 8154079 | Semiconductor device and fabrication method of the semiconductor device A semiconductor device, which can prevent an element breakdown by alleviating of electric field concentrations, and can also prevent reduction of gain, includes: a source electrode formed on a semiconductor layer; a drain electrode formed on the semiconductor layer;... | 04/10/2012 |
| 8143671 | Lateral trench FETs (field effect transistors) A semiconductor structure and associated method of formation. The semiconductor structure includes a semiconductor substrate, a first doped transistor region of a first transistor and a first doped Source/Drain portion of a second transistor on the semiconductor sub... | 03/27/2012 |
| 8134207 | High breakdown voltage semiconductor circuit device In a high breakdown voltage semiconductor element among elements integrated together on an SOI substrate in which its rated voltage is shared between an embedded oxide layer and a drain region formed by an element active layer, both high integration and high breakdo... | 03/13/2012 |
| 8129785 | Semiconductor device A semiconductor device according to the present invention includes: a semiconductor layer of a first conductivity type; an annular deep trench penetrating the semiconductor layer in the depth direction to surround an element forming region; a drain region of a secon... | 03/06/2012 |
| 8084817 | Semiconductor device and method for fabricating the same A semiconductor device includes a high voltage first conduction type well in a semiconductor substrate, a second conduction type body in the high voltage first conduction type well, a source region in the second conduction type body, a trench in the high voltage fir... | 12/27/2011 |
| 8080848 | High voltage semiconductor device with lateral series capacitive structure According to the present invention, semiconductor device breakdown voltage can be increased by embedding field shaping regions within a drift region of the semiconductor device. A controllable current path extends between two device terminals on the top surface of a... | 12/20/2011 |
| 8076726 | Semiconductor device The semiconductor device includes: a first conductive-type first well and a second conductive-type second well configured over a substrate to contact each other; a second conductive-type anti-diffusion region configured in an interface where the first conductive-typ... | 12/13/2011 |
| 8072029 | High voltage semiconductor device with floating regions for reducing electric field concentration A high voltage semiconductor device includes a source region of a first conductivity type having an elongated projection with two sides and a rounded tip in a semiconductor substrate. A drain region of the first conductivity type is laterally spaced from the source ... | 12/06/2011 |
| 8063446 | LDMOS device and method for manufacturing the same Provided is a LDMOS device and method for manufacturing. The LDMOS device includes a second conductive type buried layer formed in a first conductive type substrate. A first conductive type first well is formed in the buried layer and a field insulator with a gate i... | 11/22/2011 |
| 8063444 | Lateral diffused metal oxide semiconductor (LDMOS) devices with electrostatic discharge (ESD) protection capability in integrated circuit Lateral diffused metal oxide semiconductor (LDMOS) devices with electrostatic discharge (ESD) protection capability are presented for integrated circuits. The LDMOS device includes a semiconductor substrate with an epi-layer thereon. Patterned isolations are dispose... | 11/22/2011 |
| 8063445 | Semiconductor device and method of manufacturing the same Provided is a semiconductor device which includes a metal oxide semiconductor (MOS) transistor having high driving performance and high withstanding voltage with a thick gate oxide film. In the local oxidation-of-silicon (LOCOS) offset MOS transistor having high wit... | 11/22/2011 |
| 8053835 | Lateral semiconductor device comprising two layers of mutually opposite conductivity-type materials between source and drain A semiconductor element includes an insulating outer layer that includes electric contact connections of a first conductive type. These connections are connected to contact areas located beneath the insulating surface layer, of which connections at least one is of a... | 11/08/2011 |
| 8022477 | Semiconductor apparatus having lateral type MIS transistor A semiconductor apparatus comprises: a semiconductor substrate; and a lateral type MIS transistor disposed on a surface part of the semiconductor substrate. The lateral type MIS transistor includes: a line coupled with a gate of the lateral type MIS transistor; a po... | 09/20/2011 |
| 7999318 | Heavily doped region in double-diffused source MOSFET (LDMOS) transistor and a method of fabricating the same A transistor includes a source, a drain and a gate. The source includes a p-doped p-body, a p+ region overlapping the p-body, an n+ region overlapping the p-body in proximity to the p+ region, and an n-doped source, heavily double-diffused (SHDD) region, only into t... | 08/16/2011 |
| 7989890 | Lateral power MOSFET with high breakdown voltage and low on-resistance A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage wel... | 08/02/2011 |
| 7968943 | Semiconductor device reducing output capacitance due to parasitic capacitance Plural through-holes are formed in a region of a semiconductor substrate positioned below a drain region (an element region other than a P-type well region). According to this configuration, an opposing area of the drain region and the semiconductor substrate can be... | 06/28/2011 |
| 7956412 | Lateral diffusion field effect transistor with a trench field plate A dielectric material layer is formed on a bottom surface and sidewalls of a trench in a semiconductor substrate. The silicon oxide layer forms a drift region dielectric on which a field plate is formed. Shallow trench isolation may be formed prior to formation of t... | 06/07/2011 |
| 7952145 | MOS transistor device in common source configuration A semiconductor device includes a semiconductor substrate, a first p-channel laterally diffused metal oxide semiconductor (LDMOS) transistor formed over the semiconductor substrate and additional p-channel LDMOS transistors formed over the semiconductor substrate. F... | 05/31/2011 |
| 7888735 | Integrated complementary low voltage RF-LDMOS Complementary RF LDMOS transistors have gate electrodes over split gate oxides. A source spacer of a second conductivity type extends laterally from the source tap of a first conductivity type to approximately the edge of the gate electrode above the thinnest gate o... | 02/15/2011 |
| 7888734 | High-voltage MOS devices having gates extending into recesses of substrates An integrated circuit structure includes a high-voltage well (HVW) region in a semiconductor substrate; a first double diffusion (DD) region in the HVW region; and a second DD region in the HVW region. The first DD region and the second DD region are spaced apart fr... | 02/15/2011 |
| 7875930 | Semiconductor structure having an enlarged finger shaped region for reducing electric field density and method of manufacturing the same The invention provides a semiconductor structure. A first type body doped region is deposited on a first type substrate. A first type heavily-doped region having a finger portion with an enlarged end region is deposited on the first type body doped region. A second ... | 01/25/2011 |
| 7868385 | Semiconductor device with increased drain breakdown voltage A semiconductor device is disclosed that is capable of improving the drain breakdown voltage during operation. The semiconductor device includes a first drain region that is arranged to extend from the vicinity of an end portion of the gate electrode at the drain el... | 01/11/2011 |
| 7851857 | Dual current path LDMOSFET with graded PBL for ultra high voltage smart power applications A dual current path LDMOSFET transistor (40) is provided which includes a substrate (400), a graded buried layer (401), an epitaxial drift region (404) in which a drain region (416) is formed, a first well region (406) in wh... | 12/14/2010 |
| 7847351 | Lateral metal oxide semiconductor drain extension design A semiconductor device comprising source and drain regions and insulating region and a plate structure. The source and drain regions are on or in a semiconductor substrate. The insulating region is on or in the semiconductor substrate and located between the source ... | 12/07/2010 |
| 7829947 | Bottom-drain LDMOS power MOSFET structure having a top drain strap Lateral DMOS devices having improved drain contact structures and methods for making the devices are disclosed. A semiconductor device comprises a semiconductor substrate; an epitaxial layer on top of the substrate; a drift region at a top surface of the epitaxial l... | 11/09/2010 |
| 7825468 | Semiconductor packages, stacked semiconductor packages, and methods of manufacturing the semiconductor packages and the stacked semiconductor packages A semiconductor package may include a semiconductor pattern, a bonding pad, and a polymer insulation member. The semiconductor pattern may include a semiconductor device and first hole. The bonding pad may include a wiring pattern and plug. The wiring pattern may be... | 11/02/2010 |
| 7821064 | Lateral MISFET and method for fabricating it A lateral MISFET having a semiconductor body has a doped semiconductor substrate of a first conduction type and an epitaxial layer of a second conduction type, which is complementary to the first conduction type, the epitaxial layer being provided on the semiconduct... | 10/26/2010 |
| 7781834 | Robust ESD LDMOS device A semiconductor device includes a gate electrode over a semiconductor substrate, wherein the gate electrode has a gate width direction; a source/drain region in the semiconductor substrate and adjacent the gate electrode, wherein the source/drain region has a first ... | 08/24/2010 |
| 7781835 | Lateral drain MOSFET with improved clamping voltage control A lateral MOSFET having a substrate, first and second epitaxial layers grown on the substrate and a gate electrode formed on a gate dielectric which in turn is formed on a top surface of the second epitaxial layer. The second epitaxial layer comprises a drain region... | 08/24/2010 |
| 7759734 | Semiconductor device A semiconductor device including a plurality of doped regions, a metal layer and a polysilicon layer is provided. The doped regions are disposed in a substrate. The metal layer includes a plurality of metal line patterns. The polysilicon layer disposed between the s... | 07/20/2010 |
| 7732863 | Laterally diffused MOSFET A LDMOS transistor having a channel region located between an outer boundary of an n-type region and an inner boundary of a p-body region. A width of the LDMOS channel region is less than 80% of a distance between an outer boundary of an n+-type region an... | 06/08/2010 |
| 7696572 | Split source RF MOSFET device An RF MOS transistor having improved AC output conductance and AC output capacitance includes parallel interdigitated source and drain regions separated by channel regions and overlying gates. Grounded tap regions contacting an underlying well are placed contiguous ... | 04/13/2010 |
| 7687853 | System and method for making a LDMOS device with electrostatic discharge protection A semiconductor device includes one or more LDMOS transistors and one of more SCR-LDMOS transistors. Each LDMOS transistor includes a LDMOS well of a first conductivity type, a LDMOS source region of a second conductivity type formed in the LDMOS well, and a LDMOS d... | 03/30/2010 |
| 7683427 | Laterally diffused metal-oxide-semiconductor device and method of making the same A laterally diffused metal-oxide-semiconductor (LDMOS) device as well as a method of making the same is disclosed. A gate is formed on a semiconductor substrate between a source region and a drain region with one side laterally extending onto a part of a field oxide... | 03/23/2010 |
| 7671411 | Lateral double-diffused MOSFET transistor with a lightly doped source Methods and systems for monolithically fabricating a lateral double-diffused MOSFET (LDMOS) transistor having a source, drain, and a gate on a substrate, with a process flow that is compatible with a CMOS process flow are described. ... | 03/02/2010 |
| 7667270 | Double trench for isolation of semiconductor devices A semiconductor device has a substrate (50), a buried layer (55), an active area extending from a surface contact to the buried layer, an insulator (130) in a first trench extending towards the buried layer, to isolate the active area, and a sec... | 02/23/2010 |
| 7659579 | FETS with self-aligned bodies and backgate holes A FET has a shallow source/drain region, a deep channel region, a gate stack and a back gate that is surrounded by dielectric. The FET structure also includes halo or pocket implants that extend through the entire depth of the channel region. Because a portion of th... | 02/09/2010 |
