Class 257/336 - With lightly doped portion of drain region adjacent channel (e.g., LDD structure)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein the graded channel doping short channel
No. of patents: 912
Last issue date: 05/08/2012

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Number	Title	Issue Date
8174068	Semiconductor device having vertical transistor, manufacturing method thereof, and data processing system A semiconductor device includes: a semiconductor substrate; a silicon pillar provided perpendicularly to a main surface of the semiconductor substrate; a gate dielectric film that covers a portion of a side surface of the silicon pillar; an insulator pillar that cov...	05/08/2012
8129781	Method of forming memory devices by performing halogen ion implantation and diffusion processes Disclosed is a method of forming memory devices employing halogen ion implantation and diffusion processes. In one illustrative embodiment, the method includes forming a plurality of word line structures above a semiconducting substrate, each of the word line struct...	03/06/2012
8120105	Lateral DMOS field effect transistor with reduced threshold voltage and self-aligned drift region A method of forming a lateral DMOS transistor includes performing a low energy implantation using a first dopant type and being applied to the entire device area. The dopants of the low energy implantation are blocked by the conductive gate. The method further inclu...	02/21/2012
8120106	LDMOS with double LDD and trenched drain A LDMOS with double LDD and trenched drain is disclosed. According to some preferred embodiment of the present invention, the structure contains a double LDD region, including a high energy implantation to form lightly doped region and a low energy implantation ther...	02/21/2012
8080845	Semiconductor device A semiconductor device includes a gate insulating film formed over a semiconductor substrate, a gate electrode formed over the gate insulating film, a source region formed in the semiconductor substrate, a first drain region formed on the other side of the gate elec...	12/20/2011
8067801	Semiconductor device and method of manufacturing the same A semiconductor device is provided, which comprises a first transistor and a second transistor formed in a semiconductor layer. The first transistor includes a first source region and a first drain region sandwiching a first gate electrode with the first source regi...	11/29/2011
8049275	Semiconductor device There is provided a thin film transistor having improved reliability. A gate electrode includes a first gate electrode having a taper portion and a second gate electrode with a width narrower than the first gate electrode. A semiconductor layer is doped with phospho...	11/01/2011
8039897	Lateral MOSFET with substrate drain connection In one form a lateral MOSFET includes an active gate positioned laterally between a source region and a drain region, the drain region extending from an upper surface of a monocrystalline semiconductor body to a bottom surface of the monocrystalline semiconductor bo...	10/18/2011
8013390	Semiconductor architecture having field-effect transistors especially suitable for analog applications An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 220, 220U, 220V, 220W, 380, or 480) has a hypoabrupt vertical dopant profile below ...	09/06/2011
8008718	Semiconductor device and production method thereof The semiconductor device of the present invention is a semiconductor device including P-type and N-type thin film transistors, at least one of the N-type thin film transistors having an off-set gate structure, at least one of the P-type thin film transistors having ...	08/30/2011
7977743	Alternating-doping profile for source/drain of a FET A semiconductor device is provided. In an embodiment, the device includes a substrate and a transistor formed on the substrate. The transistor may include a gate structure, a source region, and a drain region. The drain region includes an alternating-doping profile ...	07/12/2011
7952142	Variable width offset spacers for mixed signal and system on chip devices MOSFET gate structures comprising multiple width offset spacers are provided. A first and a second gate structure are formed on a semiconductor substrate. A pair of first offset spacers are formed adjacent either side of the first gate structure. Each of the first o...	05/31/2011
7923777	Power semiconductor device and method for manufacturing the same Disclosed are a power semiconductor device and a method for manufacturing the same. The power semiconductor device has a PIP capacitor and an LDMOS transistor, the LDMOS transistor having second and third gate electrodes separate from a first gate electrode, which m...	04/12/2011
7919812	Partially depleted SOI field effect transistor having a metallized source side halo region Source and drain extension regions and source side halo region and drain side halo region are formed in a top semiconductor layer aligned with a gate stack on an SOI substrate. A deep source region and a deep drain region are formed asymmetrically in the top semicon...	04/05/2011
7898026	LDMOS with double LDD and trenched drain A LDMOS with double LDD and trenched drain is disclosed. According to some preferred embodiment of the present invention, the structure contains a double LDD region, including a high energy implantation to form lightly doped region and a low energy implantation ther...	03/01/2011
7863681	Semiconductor structure utilizing empty and filled wells An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 220, 220U, 220V, 220W, 380, or 480) has a hypoabrupt vertical dopant profile below ...	01/04/2011
7795674	Dual gate LDMOS devices An embodiment of an N-channel device has a lightly doped substrate in which adjacent or spaced-apart P and N wells are provided. A lateral isolation wall surrounds at least a portion of the substrate and is spaced apart from the wells. A first gate overlies the P we...	09/14/2010
7786532	Structure of a high breakdown voltage element for use in high power application The relationship between a distance Ls between a base layer and an n type buffer layer formed on the surface of a drift layer and the thickness t of a semiconductor substrate in contact with the drift layer is set to Ls≦t≦2×Ls. A loss upon turn-off of a high br...	08/31/2010
7772643	Methods of fabricating semiconductor device having a metal gate pattern A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer st...	08/10/2010
7750402	Lateral planar type power semiconductor device including drain buried region immediately below drain region and its manufacturing method In a power semiconductor device including a semiconductor substrate of a first conductivity type, a source region of a second conductivity type formed in a surface portion of the semiconductor substrate, and a drain drift region of the second conductivity type forme...	07/06/2010
7741677	Semiconductor integrated circuit device and manufacturing method thereof After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after tha...	06/22/2010
7701005	Semiconductor structure in which like-polarity insulated-gate field-effect transistors have multiple vertical body dopant concentration maxima and different halo pocket characteristics Each of a pair of differently configured like-polarity insulated-gate field-effect transistors (40 or 42 and 240 or 242) in a semiconductor structure has a channel zone of semiconductor body material, a gate dielectric layer overlying the...	04/20/2010
7659578	Semiconductor device having variable thickness insulating film and method of manufacturing same Embodiments of a semiconductor device capable of increasing an aperture ratio of an organic electroluminescence display device by decreasing the surface area of a capacitor in the organic electroluminescence display device and a method of manufacturing the semicondu...	02/09/2010
7615822	Diffused drain transistor A transistor has a source that includes a first impurity region with a first volume and a first surface area on a surface of the transistor. The transistor also has a drain that includes a second impurity region with a second volume and a second surface area on a su...	11/10/2009
7573099	Semiconductor device layout and channeling implant process A device structure and method for forming graded junction using a implant process. Embodiments of the invention comprise implanting ions into said silicon substrate to form doped regions adjacent to said gate. The orientation of the channel region in the Si crystal ...	08/11/2009
7560772	Semiconductor integrated circuit device and manufacturing method thereof After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after tha...	07/14/2009
7544996	Methods of fabricating a semiconductor device having a metal gate pattern A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer st...	06/09/2009
7528442	Semiconductor device and manufacturing method thereof In this invention, the semiconductor device is provided with a gate electrode formed on a gate insulating film in a region sectioned by an element isolation formed on a semiconductor layer of the first conduction type, and a source region and a drain region of the s...	05/05/2009
7521758	DMOS device of small dimensions and manufacturing process thereof In a body of semiconductor material, a field region separates a first active area and a second active area. A drain region is formed in the first active area; a body region is formed in the second active area and accommodates a source region. A body-contact region i...	04/21/2009
7485923	SOI semiconductor device with improved halo region and manufacturing method of the same A semiconductor device includes a first insulating layer, a semiconductor layer formed on the first insulating layer, a second insulating layer on a part of the semiconductor layer, and a gate electrode formed on the semiconductor layer through the second insulating...	02/03/2009
7473964	Semiconductor device A semiconductor device includes: an insulating layer; a semiconductor fin protruding from the insulating layer, extending in a first direction parallel to a major surface of the insulating layer, and having a source region, a channel section, and a drain region arra...	01/06/2009
7473965	Structure of a high breakdown voltage element for use in high power applications The relationship between a distance Ls between a base layer and an n type buffer layer formed on the surface of a drift layer and the thickness t of a semiconductor substrate in contact with the drift layer is set to Ls≦t≦2×Ls. A loss upon turn-off of a high br...	01/06/2009
7446375	Quasi-vertical LDMOS device having closed cell layout A low voltage power device includes a plurality of quasi-vertical LDMOS device cells. A conductive trench sinker is formed through the epitaxial layer and adjacent a selected one of the source and drain regions in each cell. The trench sinker electrically couples th...	11/04/2008
7439183	Method of manufacturing a semiconductor device, and a semiconductor substrate A method of manufacturing a semiconductor device. In the method, a thin film is formed on an Si substrate having face orientation (100), that part of the thin film, which lies on an element-isolating region, is removed. Then, the Si substrate is subjected to ...	10/21/2008
7436024	Semiconductor device and method of manufacturing the same A lateral MOSFET and a method of forming thereof includes a p-type semiconductor substrate, a first n-type well in the surface portion of the semiconductor substrate, an n+-type drain region in the first n-type well, a p-type well in the first n-type well...	10/14/2008
7427795	Drain-extended MOS transistors and methods for making the same Drain-extended MOS transistors (T1, T2) and semiconductor devices (102) are described, as well as fabrication methods (202) therefor, in which a p-buried layer (130) is formed prior to formation of epitaxial silicon (106) ov...	09/23/2008
RE40486	Self-aligned non-volatile memory cell Disclosed is a self-aligned non-volatile memory cell including a small sidewall spacer electrically coupled and being located next to a main floating gate region. Both the small sidewall spacer and the main floating gate region are formed on a substrate and both for...	09/09/2008
7420247	Power LDMOS transistor A LDMOS transistor comprises a trench formed through the epitaxial layer at least to the top surface of the substrate, the trench having a bottom surface and a sidewall contacting the source region and the portion of the channel region extending under the source reg...	09/02/2008
7417277	Semiconductor integrated circuit and method of manufacturing the same Conventional capacitors constituted of a FET incur degradation in frequency response. A semiconductor integrated circuit includes a semiconductor substrate, an N-type FET, a P-type FET, and capacitors. The N-type FET includes N-type impurity diffusion layers, a P-ty...	08/26/2008
7408234	Semiconductor device and method for manufacturing the same An object of the present invention is to provide a semiconductor device that is able to realize a low on-resistance maintaining a high drain-to-source breakdown voltage, and a method for manufacturing thereof, the present invention including: a supporting substrate;...	08/05/2008

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Class 257/336 - With lightly doped portion of drain region adjacent channel (e.g., LDD structure)