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| Number | Title | Issue Date |
| 8169022 | Vertical junction field effect transistors and diodes having graded doped regions and methods of making Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs) or diodes such as junction barrier Schottky (JBS) diodes or PiN diodes. The devices have graded p-type semiconductor layers and/or reg... | 05/01/2012 |
| 8159026 | Lateral high-voltage semiconductor devices with majorities of both types for conduction This invention provides a lateral high-voltage semiconductor device, which is a three-terminal one with two types of carriers for conduction and consists of a highest voltage region and a lowest voltage region referring to the substrate and a surface voltage-sustain... | 04/17/2012 |
| 8154077 | Semiconductor device According to an embodiment, a semiconductor device includes a gate electrode formed on a semiconductor substrate via an insulating layer; a source region including an extension region, a drain region including an extension region, a first diffusion restraining layer... | 04/10/2012 |
| 8148778 | Semiconductor device and method for manufacturing the same A semiconductor device includes: an n-type first well diffusion layer; an n-type second well diffusion layer; a p-type source diffusion layer; a p-type third well diffusion layer; a p-type drain diffusion layer; a gate insulating film; a gate electrode; a device iso... | 04/03/2012 |
| 8148777 | Structure and fabrication of insulated-gate field-effect transistor with hypoabrupt change in body dopant concentration below source/drain zone An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 500, 510, or 530; or 220, 220W, or 540) is provided with a hypoabrupt vertical dopant profile below one (104; or 264 or 564) of its source/drain zones fo... | 04/03/2012 |
| 8138545 | Semiconductor device and method for manufacturing the same A semiconductor device includes: a substrate on and/or over which a first conductive type well is formed; and an LDMOS device that includes a gate electrode and has a drain region formed in the substrate. The LDMOS device includes a trench formed on the substrate, a... | 03/20/2012 |
| 8120104 | Semiconductor device and method of manufacturing semiconductor device A sinker layer is in contact with a first conductivity-type well, and is separated from a first conductivity-type collector layer and a second conductivity-type drift layer. A second conductivity-type diffusion layer (second second-conductivity-type high-concentrati... | 02/21/2012 |
| 8076725 | Semiconductor device and method for manufacturing the same An impurity buried layer constructed by two buried regions formed by impurities of identical type exist, a buried region formed by an impurity having a slow diffusion speed is provided on the entire surface of a transistor formation region, and a buried region forme... | 12/13/2011 |
| 8063443 | Hybrid-mode LDMOS An MOS-bipolar hybrid-mode LDMOS device has a main gate input and a control gate input wherein the device operates in an MOS mode when both gate inputs are enabled, and operates in a bipolar mode when the main gate input is enabled and the control gate input is disa... | 11/22/2011 |
| 8030705 | Semiconductor device and method of fabricating the same Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device can provide a trench MOS transistor having an up-drain structure. The semiconductor device can include a first conductive type well in a semiconductor ... | 10/04/2011 |
| 8026549 | LDMOS with N-type isolation ring and method of fabricating the same A semiconductor device and an IC chip are described. The deep N-well region is configured in a substrate. The P-well region surrounds a periphery of the deep N-well region. The gate structure is disposed on the substrate of the deep N-well region. The P-body region ... | 09/27/2011 |
| 8004038 | Suppression of hot-carrier effects using double well for thin gate oxide LDMOS embedded in HV process A semiconductor device includes a first high-voltage well having a first dopant disposed in a semiconductor substrate; a second high-voltage well having a second dopant disposed in the semiconductor substrate, laterally adjacent to the first high-voltage well; a low... | 08/23/2011 |
| 7999314 | Semiconductor device and manufacturing method thereof A semiconductor device includes an n-conductive type semiconductor substrate having a main side and a rear side, a p-conductive type layer arranged over the main side of the substrate, a main side n-conductive type region arranged in the p-conductive type layer, a r... | 08/16/2011 |
| 7999315 | Quasi-Resurf LDMOS A semiconductor device can include a drift region, at least a portion of the drift region located laterally between a drain region and a source region. The drift region can include a first layer having a first doping concentration and a second layer having a second ... | 08/16/2011 |
| 7989888 | Semiconductor device with a field stop zone and process of producing the same Embodiments discussed herein relate to processes of producing a field stop zone within a semiconductor substrate by implanting dopant atoms into the substrate to form a field stop zone between a channel region and a surface of the substrate, at least some of the dop... | 08/02/2011 |
| 7986004 | Semiconductor device and method of manufacture thereof In a high withstand voltage transistor of a LOCOS offset drain type having a buried layer, a plurality of stripe-shaped diffusion layers are formed below a diffusion layer ranging from an offset layer to a drain layer and a portion between the drain region and the b... | 07/26/2011 |
| 7973360 | Depletable cathode low charge storage diode An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a first region of a second conductivity type formed in the island, and... | 07/05/2011 |
| 7973359 | Semiconductor device with a charge carrier compensation structure and process A semiconductor device with a charge carrier compensation structure. In one embodiment, the semiconductor device has a central cell field with a gate and source structure. At least one bond contact area is electrically coupled to the gate structure or the source str... | 07/05/2011 |
| 7973358 | Coupler structure One or more embodiments relate to a semiconductor device, comprising: a substrate; and a radio frequency coupler including a first coupling element and a second coupling element spacedly disposed from the first coupling element, the first coupling element including ... | 07/05/2011 |
| 7968941 | Semiconductor device A semiconductor device includes: an epitaxial layer; a body layer, formed in the epitaxial layer, which includes a channel region; a source layer disposed in superposition on the body layer; a gate insulator, formed on the epitaxial layer, which is in a ring shape s... | 06/28/2011 |
| 7948031 | Semiconductor device and method of fabricating semiconductor device A semiconductor device includes a gate electrode formed through an insulating film in a groove having a first side surface adjacent to a source region and a base region, and a second conductive type first impurity region formed adjacent to a second side surface of t... | 05/24/2011 |
| 7939887 | Active semiconductor component with a reduced surface area A semiconductor component in which the active junctions extend perpendicularly to the surface of a semiconductor chip substantially across the entire thickness thereof. The contacts with the regions to be connected are provided by conductive fingers substantially cr... | 05/10/2011 |
| 7936013 | Charge balance techniques for power devices A vertically-conducting charge balance semiconductor power device includes an active area comprising a plurality of cells capable of conducting current along a vertical dimension when biased in a conducting state, and a non-active perimeter region surrounding the ac... | 05/03/2011 |
| 7932558 | Semiconductor device and method for manufacturing the same A semiconductor device includes: an n-type first well diffusion layer; an n-type second well diffusion layer; a p-type source diffusion layer; a p-type third well diffusion layer; a p-type drain diffusion layer; a gate insulating film; a gate electrode; a device iso... | 04/26/2011 |
| 7915675 | IGBT having one or more stacked zones formed within a second layer of the IGBT An IGBT includes a first region, a second region located within the first region, a first contact coupled to the first region, a first layer arranged below the first region, a gate overlying at least a portion of the first region between the second region and the fi... | 03/29/2011 |
| 7915674 | Lateral diffused metal oxide semiconductor device An exemplary lateral diffused metal oxide semiconductor device includes a first-type substrate, a gate oxide film disposed on the first-type substrate, a poly gate disposed on the gate oxide film, a first second-type slightly doped region formed in the first-type su... | 03/29/2011 |
| 7906810 | LDMOS device for ESD protection circuit A LDMOS device for an ESD protection circuit is provided. The LDMOS device includes a substrate of a first conductivity type, a deep well region of a second conductivity type, a body region of the first conductivity type, first and second doped regions of the second... | 03/15/2011 |
| 7902600 | Metal oxide semiconductor device A metal oxide semiconductor device comprising a substrate, at least an isolation structure, a deep N-type well, a P-type well, a gate, a plurality of N-type extension regions, an N-type drain region, an N-type source region and a P-type doped region is provided. The... | 03/08/2011 |
| 7893490 | HVNMOS structure for reducing on-resistance and preventing BJT triggering A high-voltage metal-oxide-semiconductor (HVMOS) device and methods for forming the same are provided. The HVMOS device includes a substrate; a first high-voltage n-well (HVNW) region buried in the substrate; a p-type buried layer (PBL) horizontally adjoining the fi... | 02/22/2011 |
| 7884421 | Semiconductor device and method of manufacturing the same In a high voltage MOS transistor, in a portion immediately below the gate electrode, peaks of concentration distribution in depth direction of a first conductivity type impurity and a second conductivity type impurity in the drain offset region are in the same depth... | 02/08/2011 |
| 7868382 | Emitter-switched power actuator with integrated Zener diode between source and base A power actuator of the emitter-switched type is described, the power actuator comprising at least one high voltage bipolar transistor and a low voltage DMOS transistor connected in cascode configuration between a collector terminal of the bipolar transistor and a s... | 01/11/2011 |
| 7855414 | Semiconductor device with increased breakdown voltage Optimization of the implantation structure of a metal oxide silicon field effect transistor (MOSFET) device fabricated using conventional complementary metal oxide silicon (CMOS) logic foundry technology to increase the breakdown voltage. The techniques used to opti... | 12/21/2010 |
| 7843002 | Fully isolated high-voltage MOS device A semiconductor structure includes a semiconductor substrate; an n-type tub extending from a top surface of the semiconductor substrate into the semiconductor substrate, wherein the n-type tub comprises a bottom buried in the semiconductor substrate; a p-type buried... | 11/30/2010 |
| 7838931 | High voltage semiconductor devices with Schottky diodes High voltage semiconductor devices with Schottky diodes are presented. A high voltage semiconductor device includes an LDMOS device and a Schottky diode device. The LDMOS device includes a semiconductor substrate, a P-body region in a first region of the substrate, ... | 11/23/2010 |
| 7838930 | Insulated-gate field-effect transistor with hypoabrupt step change in body dopant concentration below source/drain zone An insulated-gate field-effect transistor (500, 510, 530, or 540) has a hypoabrupt step-change vertical dopant profile below one (104 or 564) of its source/drain zones for reducing the parasitic capacitance along the pn junction between t... | 11/23/2010 |
| 7829945 | Lateral diffusion field effect transistor with asymmetric gate dielectric profile A gate stack comprising a uniform thickness gate dielectric, a gate electrode, and an oxygen-diffusion-resistant gate cap is formed on a semiconductor substrate. Thermal oxidation is performed only on the drain side of the gate electrode, while the source side is pr... | 11/09/2010 |
| 7821062 | Field effect transistor and method for producing a field effect transistor A field effect transistor is provided having a source region, a drain region formed in a first well region, and a channel region. The first well region is doped with doping atoms of a first conductivity type. At least a part of the channel region which extends into ... | 10/26/2010 |
| 7812393 | High-voltage extended drain MOSFET All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS... | 10/12/2010 |
| RE41764 | Semiconductor device with compensated threshold voltage and method for making same A semiconductor device may include a channel region formed between a source and a drain region. One or more first pockets may be formed in the channel region adjacent to junctions. The first pockets may be doped with a dopant of the first conductivity type. At least... | 09/28/2010 |
| 7800173 | Manufacturing process of a vertical-conduction MISFET device with gate dielectric structure having differentiated thickness and vertical-conduction MISFET device thus manufacture According to an embodiment of a method for manufacturing a MISFET device, in a semiconductor wafer, a semiconductor layer is formed, having a first type of conductivity and a first level of doping. A first body region and a second body region, having a second type o... | 09/21/2010 |