Quotables
"The Americans have need of the telephone, but we do not. We have plenty of messenger boys."
Sir William Preece, chief engineer, British Post Office ; 1878
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8183629 | Stacked trench metal-oxide-semiconductor field effect transistor device Embodiments of the present invention are directed toward a trench metal-oxide-semiconductor field effect transistor (TMOSFET) device. The TMOSFET device includes a source-side-gate TMOSFET coupled to a drain-side-gate TMOSFET 1203. A switching node metal laye... | 05/22/2012 |
| 8174067 | Trench-based power semiconductor devices with increased breakdown voltage characteristics Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed. ... | 05/08/2012 |
| 8154076 | High and low voltage vertical channel transistors A semiconductor device includes low voltage and high voltage transistors over a substrate. The low voltage transistor is configured by at least one unit transistor. The high voltage transistor is configured by a greater number of the unit transistors than the at lea... | 04/10/2012 |
| 8129780 | Semiconductor device having a trench type high-power MISFET The present invention provides a technique capable of attaining an improvement in current detection accuracy in a trench gate type power MISFET equipped with a current detection circuit. Inactive cells are disposed so as to surround the periphery of a sense cell. Th... | 03/06/2012 |
| 8106450 | Semiconductor device having a saddle fin shaped gate and method for manufacturing the same A semiconductor device having a saddle fin gate and a method for manufacturing the same are presented. The semiconductor device includes a semiconductor substrate, an isolation structure, and gates. The semiconductor substrate is defined with first grooves in gate f... | 01/31/2012 |
| 8106449 | Semiconductor device To achieve a stable reading operation in a memory cell having a gain-cell structure, a write transistor is configured, which has a source and a drain that are formed on the insulating layer, a channel formed on the insulating layer and between the source and the dra... | 01/31/2012 |
| 8101996 | Three-dimensional semiconductor device structures and methods A three-dimensional semiconductor device structure includes a first semiconductor device and a second semiconductor device bonded together using a patterned conductive layer according to an embodiment of the invention. The first semiconductor device includes a first... | 01/24/2012 |
| 8072028 | Method and device including transistor component having a field electrode A transistor component and method of forming a transistor component. One embodiment provides a semiconductor arrangement including a semiconductor body having a at least one first trench, a first field electrode arranged in the lower trench section of the at least o... | 12/06/2011 |
| 8044461 | Planar TMBS rectifier A monolithically integrated trench FET and Schottky diode includes a plurality of trenches extending into a FET region and a Schottky region of a semiconductor layer. A trench in the Schottky region includes a dielectric layer lining the trench sidewalls, and a cond... | 10/25/2011 |
| 8022476 | Semiconductor device having vertical and horizontal type gates and method for fabricating the same A semiconductor device having both vertical and horizontal type gates and a method for fabricating the same for obtaining high integration of the semiconductor device and integration with other devices while also maximizing the breakdown voltage and operational spee... | 09/20/2011 |
| 8017995 | Deep trench semiconductor structure and method An electrical structure and method of forming. The electrical structure includes a semiconductor substrate comprising a deep trench, an oxide liner layer is formed over an exterior surface of the deep trench, and a field effect transistor (FET) formed within the sem... | 09/13/2011 |
| 8008717 | Semiconductor device A semiconductor device of the present invention has a first-conductivity-type substrate having second-conductivity-type base regions exposed to a first surface thereof; trench gates provided to a first surface of the substrate; first-conductivity-type source regions... | 08/30/2011 |
| 7960784 | Semiconductor structure and fabrication method thereof A semiconductor fabrication process according to the present invention defines an auxiliary structure with a plurality of spaces with a predetermined line-width in the oxide layer to prevent the conductive material in the spaces from being removed by etching or defi... | 06/14/2011 |
| 7952141 | Shield contacts in a shielded gate MOSFET A semiconductor structure comprises an active region comprising trenches extending into a semiconductor region. Each trench includes a shield electrode and a gate electrode. The semiconductor structure also comprises a shield contact region adjacent to the active re... | 05/31/2011 |
| 7902599 | Integrated circuit having long and short channel metal gate devices and method of manufacture Embodiments of an integrated circuit are provided. In one embodiment, the integrated circuit includes a substrate, a short channel (SC) device, and a long channel (LC) device. The short channel device includes an SC gate insulator overlying a first portion of the su... | 03/08/2011 |
| 7863680 | Semiconductor component and method for producing it A semiconductor component includes a surface region. A modified doping region is provided in the edge region of the cell array. In the surface region or modified doping region the doping concentration is lowered and/or in the surface region or modified doping region... | 01/04/2011 |
| 7859051 | Semiconductor device with a reduced band gap and process The application relates to a semiconductor device made of silicon with regionally reduced band gap and a process for the production of same. One embodiment provides a semiconductor device including a body zone, a drain zone and a source zone. A gate extends between ... | 12/28/2010 |
| 7816732 | Integrated trench MOSFET and Schottky rectifier with trench contact structure A trench MOSFET in parallel with trench Schottky barrier rectifier is formed on a single substrate. The present invention solves the constrains brought by planar contact of Schottky, for example, the large area occupied by planar structure. As the size of present de... | 10/19/2010 |
| 7781831 | Semiconductor device having nitridated oxide layer and method therefor A semiconductor device includes a substrate (12), a first insulating layer (14) over a surface of the substrate (12), a layer of nanocrystals (13) over a surface of the first insulating layer (14), a second insulating layer (15 | 08/24/2010 |
| 7781832 | Trench-type power MOS transistor and integrated circuit utilizing the same A power MOS transistor comprises a drain region, a trench gate, a source region, a well region, a deep well region and a substrate region. The drain region has a doping region of a first conductivity type connected to a drain electrode. The trench gate has an insula... | 08/24/2010 |
| 7759731 | Lateral trench MOSFET with direct trench polysilicon contact and method of forming the same A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional su... | 07/20/2010 |
| 7701004 | Semiconductor device and method of manufacturing thereof A first conductive layer and a second conductive layer are formed on an upper surface of a semiconductor substrate. The second conductive layer formed at a higher location than the first conductive layer. An insulating film is formed over the semiconductor substrate... | 04/20/2010 |
| 7683425 | Trench gate-type MOSFET device and method for manufacturing the same A semiconductor device includes a first conduction type semiconductor substrate, a second conduction type base region in the substrate, a high concentration first conduction type source region in the base region, and first and second trenches. The source region is f... | 03/23/2010 |
| 7626231 | Integrated trench MOSFET and junction barrier schottky rectifier with trench contact structures A trench MOSFET in parallel with trench junction barrier Schottky rectifier with trench contact structures is formed in single chip. The present invention solves the drawback brought by some prior arts, for example, the large area occupied by planar contact structur... | 12/01/2009 |
| 7531874 | Field effect transistors including source/drain regions extending beneath pillars Field effect transistors include a substrate and a pillar that extends away from the substrate. The pillar includes a base adjacent the substrate, a top remote from the substrate, and a sidewall that extends between the base and the top. An insulated gate is provide... | 05/12/2009 |
| 7462912 | Semiconductor memory device having power decoupling capacitor Provided is a semiconductor memory device using a layout scheme where a bottom conductive layer in a peripheral circuit region, which is simultaneously formed with a self-align contact, is connected to one electrode of a power decoupling capacitor. Predetermined cap... | 12/09/2008 |
| 7459750 | Integrated half-bridge power circuit A down converter includes an integrated circuit, which includes a control FET (CF) and a synchronous rectifier FET (SF). The control FET is a lateral double-diffused (LDMOS) FET, and the conductivity-type of the LDMOS FET and the conductivity-type of the substrate a... | 12/02/2008 |
| 7436069 | Semiconductor device, having a through electrode semiconductor module employing thereof and method for manufacturing semiconductor device having a through electrode The layout density of the through electrodes in the horizontal plane of the substrate is enhanced. Through holes 103 extending through the silicon substrate 101 is provided. An insulating film 105 is buried within the through hole 103. A ... | 10/14/2008 |
| 7436040 | Method and apparatus for diverting void diffusion in integrated circuit conductors A method of diverting void diffusion in an integrated circuit includes steps of forming an electrical conductor having a boundary in a first electrically conductive layer of an integrated circuit, forming a via inside the boundary of the electrical conductor in a di... | 10/14/2008 |
| 7420246 | Vertical type semiconductor device and method for manufacturing the same A vertical type semiconductor device includes: a silicon substrate having a first surface and a second surface; a first electrode disposed on the first surface of the silicon substrate; and a second electrode disposed on the second surface of the silicon substrate. ... | 09/02/2008 |
| 7391080 | LDMOS transistor device employing spacer structure gates An integrated LDMOS transistor comprises a semiconductor substrate (11), an LDMOS gate region (17), LDMOS source (14) and drain (15) regions, and a channel region (13) arranged beneath the LDMOS gate region, where the channel regio... | 06/24/2008 |
| 7382018 | 3-Dimensional flash memory device and method of fabricating the same In an embodiment, a 3-dimensional flash memory device includes: a gate extending in a vertical direction on a semiconductor substrate; a charge storing layer surrounding the gate; a silicon layer surrounding the charge storing layer; a channel region vertically form... | 06/03/2008 |
| 7382019 | Trench gate FETs with reduced gate to drain charge A field effect transistor includes a trench extending into a semiconductor region. The trench has a gate dielectric lining the trench sidewalls and a gate electrode therein. A channel region in the semiconductor region extends along a sidewall of the trench. The gat... | 06/03/2008 |
| 7378707 | Scalable high density non-volatile memory cells in a contactless memory array A plurality of mesas are formed in the substrate. Each pair of mesas forms a trench. A plurality of diffusion areas are formed in the substrate. A mesa diffusion area is formed in each mesa top and a trench diffusion area is formed under each trench. A vertical, non... | 05/27/2008 |
| 7368783 | Semiconductor device A semiconductor device includes a semiconductor substrate of a first conductivity type, a lightly-doped semiconductor layer of the first conductivity type formed on the first major surface of the substrate, a first semiconductor region of the first conductivity type... | 05/06/2008 |
| 7365406 | Non-uniform ion implantation apparatus and method thereof A non-uniform ion implantation apparatus comprises a wide ion beam generator configured to generate a plurality of wide ion beams to irradiate at least two regions on the entire area of a wafer, and a wafer rotating device configured to rotate the wafer in a predete... | 04/29/2008 |
| 7361965 | Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design A method and apparatus for redirecting void diffusion away from vias in an integrated circuit design includes steps of forming an electrical conductor in a first electrically conductive layer of an integrated circuit design, forming a via between a distal end of the... | 04/22/2008 |
| 7358126 | Dual damascene structure and methods of forming the same A dual damascene structure and a method of forming a dual damascene structure are disclosed. The dual damascene structure includes an insulation member, a single crystal member and a filling member. The insulation member has an opening having a dual damascene shape.... | 04/15/2008 |
| 7348628 | Vertical channel semiconductor devices and methods of manufacturing the same Vertical channel semiconductor devices include a semiconductor substrate with a pillar having an upper surface. An insulated gate electrode is around a periphery of the pillar. The insulated gate electrode has an upper surface at a vertical level lower than the uppe... | 03/25/2008 |
| 7342264 | Memory cell and method for manufacturing the same The invention is directed to a memory cell on a substrate having a plurality of shallow trench isolations form therein, wherein top surfaces of the shallow trench isolations are lower than a top surface of the substrate and the shallow trench isolations together def... | 03/11/2008 |
