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| Number | Title | Issue Date |
| 8148769 | Nonvolatile semiconductor memory device and method of manufacturing the same A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of the memory strin... | 04/03/2012 |
| 8143665 | Memory array and method for manufacturing and operating the same The invention provides a memory array. The memory array comprises a substrate, a plurality of word lines, a charge trapping structure, a plurality of trench channels and a plurality of bit lines. The word lines are located over the substrate and the word lines are p... | 03/27/2012 |
| 8115248 | Semiconductor device and method for manufacturing the same A semiconductor device includes a semiconductor substrate, and a nonvolatile memory cell provided on the semiconductor substrate, the nonvolatile memory cell including a tunnel insulating film provided on a surface of the semiconductor substrate, the tunnel insulati... | 02/14/2012 |
| 8097913 | Electrically erasable and programmable read only memory device comprising common source region and method of manufacturing same An electrically erasable and programmable read only memory (EEPROM) device and a method of manufacturing the EEPROM device are provided. First and second gate structures having the same structure are formed on a tunnel insulating layer formed on a substrate, such th... | 01/17/2012 |
| 8097912 | Systems and methods for self convergence during erase of a non-volatile memory device A non-volatile memory device implements self-convergence during the normal erase cycle through control of physical aspects, such as thickness, width, area, etc., of the dielectric layers in the gate structure as well as of the overall gate structure. Self-convergenc... | 01/17/2012 |
| 8084808 | Zirconium silicon oxide films Electronic apparatus and systems include structures having a dielectric layer containing a zirconium silicon oxide film. A zirconium silicon oxide film may be disposed in an integrated circuit, as well as in a variety of other electronic devices. Additional apparatu... | 12/27/2011 |
| 8076713 | Non-volatile memory devices having a multi-layered charge storage layer A non-volatile memory device includes a substrate having a first region and a second region. A first gate electrode is disposed on the first region. A multi-layered charge storage layer is interposed between the first gate electrode and the substrate, the multi-laye... | 12/13/2011 |
| 8076714 | Memory device with high dielectric constant gate dielectrics and metal floating gates A memory cell transistor includes a high dielectric constant tunnel insulator, a metal floating gate, and a high dielectric constant inter-gate insulator comprising a metal oxide formed over a substrate. The tunnel insulator and inter-gate insulator have dielectric ... | 12/13/2011 |
| 8072023 | Isolation for non-volatile memory cell array A memory device including a plurality of storage regions arranged with storage region intervals. A plurality of conductor lines are juxtaposed the storage region intervals. One or more isolations are provided, each isolation adjacent one or more conductor lines and ... | 12/06/2011 |
| 8035155 | Split-gate nonvolatile semiconductor memory device A nonvolatile semiconductor memory device includes a floating gate; an erasing gat; and a control gate. The floating gate is provided on a channel region of a semiconductor substrate through a first insulating layer. The erasing gate is provided on the floating gate... | 10/11/2011 |
| 8026545 | EEPROM An EEPROM according to the present invention includes: a semiconductor layer of a first conductive type; and a first insulating film formed on the semiconductor layer. A first impurity region, a second impurity region, a third impurity region, a fourth impurity regi... | 09/27/2011 |
| 8026544 | Fabricating and operating a memory array having a multi-level cell region and a single-level cell region Techniques are disclosed herein for applying different process steps to single-level cell (SLC) blocks in a memory array than to multi-level cell (MLC) blocks such that the SLC blocks will have high endurance and the MLC blocks will have high reliability. In some as... | 09/27/2011 |
| 8017992 | Flash memory device and method of fabricating the same Disclosed here in is a flash memory device and a method of fabricating the same. In accordance with one aspect of the invention, a flash memory device includes first contact plugs formed over a semiconductor substrate between gate patterns. Second contact plugs are ... | 09/13/2011 |
| 7999304 | Semiconductor device A semiconductor device includes a semiconductor substrate, and nonvolatile memory cells, each of the cells including a channel region having a channel length and a channel width, a tunnel insulating film, a floating gate electrode, a control gate electrode, an inter... | 08/16/2011 |
| 7982259 | Nonvolatile semiconductor memory A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the se... | 07/19/2011 |
| 7977731 | NOR flash memory and method of manufacturing the same A NOR flash memory has a plurality of memory cell transistors, wherein each memory cell transistor shares the source diffusion layer with another memory cell transistor adjacent thereto on one side thereof in the column direction and shares the drain diffusion layer... | 07/12/2011 |
| 7956405 | Semiconductor storage element and manufacturing method thereof A semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the... | 06/07/2011 |
| 7943981 | Semiconductor memory element A semiconductor memory element includes: a tunnel insulating film formed on a semiconductor substrate; a HfON charge storage film with Bevan clusters formed on the tunnel insulating film; a blocking film formed on the HfON charge storage film; and a gate electrode f... | 05/17/2011 |
| 7928500 | Semiconductor device A semiconductor device includes a tunnel insulating film formed on a semiconductor substrate, a floating gate electrode formed on the tunnel insulating film, an inter-electrode insulating film formed on the floating gate electrode, and a control gate electrode forme... | 04/19/2011 |
| 7928499 | Profile of flash memory cells A semiconductor structure includes a semiconductor substrate; a tunneling layer on the semiconductor substrate; a source region adjacent the tunneling layer; and a floating gate on the tunneling layer. The floating gate comprises a first edge having an upper portion... | 04/19/2011 |
| 7923770 | Memory device and method of fabricating the same A method of fabricating memory devices is provided. First, a charge storage structure including a gate dielectric structure is formed on the substrate in sequence to form a charge trapping layer. Then, a gate conductive layer is formed above the charge storage struc... | 04/12/2011 |
| 7910977 | Semiconductor storage element and manufacturing method thereof A semiconductor storage element includes: a semiconductor layer constituted of a line pattern with a predetermined width formed on a substrate; a quantum dot forming an electric charge storage layer formed on the semiconductor layer through a first insulating film s... | 03/22/2011 |
| 7910978 | Process for manufacturing a memory device integrated on a semiconductor substrate and comprising nanocrystal memory cells and CMOS transistors An embodiment of a process is disclosed herein for fabricating a memory device integrated on a semiconductor substrate and comprising at least a nanocrystal memory cell and CMOS transistors respectively formed in a memory area and in a circuitry area. According to a... | 03/22/2011 |
| 7902588 | Nonvolatile semiconductor memory device and method for manufacturing the same A nonvolatile semiconductor memory device includes: a tunneling insulating film; a floating gate electrode; an inter-electrode insulating film, in which an interface facing the floating gate electrode and an interface facing a control gate electrode are defined as t... | 03/08/2011 |
| 7898020 | Semiconductor memory, semiconductor memory system using the same, and method for producing quantum dots applied to semiconductor memory A semiconductor memory includes a composite floating structure where an insulation film is formed on a semiconductor substrate, Si-based quantum dots covered with an extremely thin Si oxide film is formed on the insulation film, silicide quantum dots covered with a ... | 03/01/2011 |
| 7898019 | Semiconductor constructions having multiple patterned masking layers over NAND gate stacks Some embodiments include methods of forming a NAND cell unit having a NAND string gate closest to a select gate with a different width than other NAND string gates more distant from the select gate. Some embodiments include utilization of an etch comprising HBr and ... | 03/01/2011 |
| 7888730 | Nonvolatile semiconductor memory A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the se... | 02/15/2011 |
| 7875923 | Band engineered high-K tunnel oxides for non-volatile memory A non-volatile memory cell that has a charge source region, a charge storage region, and a crested tunnel barrier layer that has a potential energy profile which peaks between the charge source region and the charge storage region. The tunnel barrier layer has multi... | 01/25/2011 |
| 7875924 | Flash memory device and method for fabricating the same An embedded flash memory device and a method for fabricating the same which reduces the size of a memory device using logic CMOS fabricating processes and enhancing a coupling ratio of the memory device. The flash memory device includes a coupling oxide layer on an ... | 01/25/2011 |
| 7859045 | Semiconductor device and method for manufacturing the same Disclosed is a method of manufacturing a semiconductor device, which includes exposing a photoresist using an exposing mask provided with a light-shielding pattern having two or more narrow width portions, developing the photoresist to form a plurality of stripe-sha... | 12/28/2010 |
| 7842996 | Memory cell of nonvolatile semiconductor memory A memory cell of a nonvolatile semiconductor memory includes a semiconductor region, source/drain areas arranged separately from each other in the semiconductor region, a tunnel insulating film arranged on a channel region between the diffusion areas, a floating gat... | 11/30/2010 |
| 7834391 | Integrated circuit memory devices including memory cells on adjacent pedestals having different heights, and methods of fabricating same Coupling among adjacent rows of memory cells on an integrated circuit substrate may reduced by forming the adjacent rows of memory cells on adjacent semiconductor pedestals that extend different distances away from the integrated circuit substrate. NAND flash memory... | 11/16/2010 |
| 7829935 | Semiconductor memory, semiconductor memory system using the memory, and method for manufacturing quantum dot used in semiconductor memory A semiconductor memory has a composite floating structure in which quantum dots composed of Si and coated with a Si oxide thin film are deposited on an insulating film formed on a semiconductor substrate, quantum dots coated with a high-dielectric insulating film ar... | 11/09/2010 |
| 7821056 | Nonvolatile semiconductor memory device and method of manufacturing the same A nonvolatile semiconductor memory device includes an array of nonvolatile memory cell transistors, each of which is configured such that a tunnel insulation film, a floating gate electrode, a floating gate insulation film and a control gate electrode are stacked on... | 10/26/2010 |
| 7821057 | Nonvolatile semiconductor memory device and manufacturing method thereof A nonvolatile semiconductor memory device includes a semiconductor substrate of a first conductivity type, a pair of source and drain diffusion regions of a second conductivity type oppositely formed on a surface of the semiconductor substrate, and a stacked structu... | 10/26/2010 |
| 7808035 | Semiconductor memory and semiconductor device with nitride memory elements A semiconductor memory has a gate electrode and a pair of multilayer memory elements formed on side surfaces of the gate electrode. Each multilayer memory element includes, in sequence from the gate electrode outward, a first silicon oxide layer, a charge trapping s... | 10/05/2010 |
| 7804125 | System and method for reducing process-induced charging A semiconductor device includes a substrate, a memory cell formed on the substrate, and a contact to the substrate. The contact is formed in an area away from the memory cell and functions to raise the potential of the substrate. ... | 09/28/2010 |
| 7800162 | Nonvolatile memory device and method of fabricating the same A nonvolatile memory device includes a semiconductor substrate, a tunneling insulation layer on the semiconductor substrate, a charge storage layer on the tunneling insulation layer, an inter-electrode insulation layer on the charge storage layer, and a control gate... | 09/21/2010 |
| 7772639 | Charge-trap nonvolatile memory devices Nonvolatile memory devices including device isolation patterns on a semiconductor substrate are provided. The device isolation patterns define a cell active region and a peripheral active region of the semiconductor substrate. Cell gate electrodes are provided that ... | 08/10/2010 |
| 7763934 | Nonvolatile semiconductor memory and method of manufacturing the same A metal oxide having a sufficiently higher dielectric constant than silicon nitride, such as Ti oxide, Zr oxide, or Hf oxide is used as base material, and in order to generate a trap level capable of moving in and out electrons therein, a high-valence substance of v... | 07/27/2010 |
