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| Number | Title | Issue Date |
| 8188532 | Semiconductor device having a gate contact structure capable of reducing interfacial resistance A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon la... | 05/29/2012 |
| 8183619 | Method and system for providing contact to a first polysilicon layer in a flash memory device A method and system for providing at least one contact in a flash memory device is disclosed. The flash memory device includes a plurality of gate stacks and at lease one component including a polysilicon layer as a top surface. The method and system further include... | 05/22/2012 |
| 8174061 | Floating-gate structure with dielectric component Floating-gate memory cells having a floating gate with a conductive portion and a dielectric portion facilitate increased levels of charge trapping sites within the floating gate. The conductive portion includes a continuous component providing bulk conductivity to ... | 05/08/2012 |
| 8169017 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device that comprises the steps of: removing a second insulating film on a contact region of a first conductor; forming a second conductive film on the second insulating film; removing the second conductive film on the conta... | 05/01/2012 |
| 8148768 | Non-volatile memory cell with self aligned floating and erase gates, and method of making same A memory device, and method of making the same, in which a trench is formed into a substrate of semiconductor material. The source region is formed under the trench, and the channel region between the source and drain regions includes a first portion that extends su... | 04/03/2012 |
| 8148767 | Semiconductor memory devices including recess-type control gate electrodes and methods of fabricating the semiconductor memory devices A semiconductor memory device includes a semiconductor substrate, a control gate electrode recessed in the semiconductor substrate, a storage node layer interposed between a sidewall of the control gate electrode and the semiconductor substrate, a tunneling insulati... | 04/03/2012 |
| 8143664 | Semiconductor device having lower leakage current between semiconductor substrate and bit lines A semiconductor device includes a bit line that is provided in a semiconductor substrate, a silicide layer that has side faces and a bottom face surrounded by the bit line and is provided within the bit line, an ONO film that is provided on the semiconductor substra... | 03/27/2012 |
| 8143663 | Non-volatile memory device having selection gates formed on the sidewalls of dielectric layers A non-volatile memory device having a split gate type cell structure, a method for fabricating the same, and a method for fabricating a semiconductor device by using the same are provided. A non-volatile memory device includes a substrate, a plurality of patterned t... | 03/27/2012 |
| 8125016 | Semiconductor device and its manufacturing method There is provided a semiconductor device having, on a silicon substrate, a gate insulating film and a gate electrode in this order; wherein the gate insulating film comprises a nitrogen containing high-dielectric-constant insulating film which has a structure in whi... | 02/28/2012 |
| 8120091 | Non-volatile memory devices including a floating gate and methods of manufacturing the same A non-volatile memory device includes a substrate and a tunnel insulation layer pattern, such that each portion of the tunnel insulation pattern extends along a first direction and adjacent portions of the tunnel insulation layer pattern may be separated in a second... | 02/21/2012 |
| 8120090 | Aging device An aging device includes a semiconductor substrate, an element isolation insulating layer which is formed in a recessed portion of the semiconductor substrate and which has an upper surface higher than an upper surface of the semiconductor substrate, first and secon... | 02/21/2012 |
| 8115245 | Nonvolatile memory device A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the diel... | 02/14/2012 |
| 8110863 | TFT charge storage memory cell having high-mobility corrugated channel A rewriteable nonvolatile memory cell having two bits per cell is described. The memory cell preferably operates by storing charge in a dielectric charge storage layer or in electrically isolated conductive nanocrystals by a channel hot electron injection method. In... | 02/07/2012 |
| 8101989 | Charge trapping devices with field distribution layer over tunneling barrier A memory cell comprising: a semiconductor substrate with a surface with a source region and a drain region disposed below the surface of the substrate and separated by a channel region; a tunneling barrier dielectric structure with an effective oxide thickness of gr... | 01/24/2012 |
| 8093646 | Flash memory device and method of forming the same with improved gate breakdown and endurance The present invention provides a flash memory device and method for making the same having a floating gate structure with a semiconductor substrate and shallow trench isolation (STI) structure formed in the substrate. A first polysilicon layer is formed over the sub... | 01/10/2012 |
| 8089115 | Organic memory device with a charge storage layer and method of manufacture An organic memory device is disclosed that has an active layer, at least one charge storage layer of a film of an organic dielectric material, and nanostractures and/or nano-particles of a charge-storing material on or in the film of dielectric material. Each of the... | 01/03/2012 |
| 8089116 | FLOTOX-TYPE EEPROM and method for manufacturing the same A FLOTOX-TYPE EEPROM of the invention has a configuration wherein an N region 25 as an impurity region formed under a tunnel window 12 and a channel stopper region 19 formed under a LOCOS oxide film 18 are spaced apart by a predetermined ... | 01/03/2012 |
| 8089114 | Non-volatile memory devices including blocking and interface patterns between charge storage patterns and control electrodes and related methods A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active regi... | 01/03/2012 |
| 8076711 | Semiconductor device and method of manufacturing the same According to an aspect of the invention, there is provided a semiconductor device including a plurality of memory cells, comprising a plurality of floating gate electrodes which are formed on a tunnel insulating film formed on a semiconductor substrate and have an u... | 12/13/2011 |
| 8076710 | Semiconductor device and method for manufacturing the same A method for manufacturing a semiconductor device is provided. The method includes forming multiple conductive patterns 13a, forming an intermediate insulating film 16 on all of device isolation insulating films 6 and the conductive patte... | 12/13/2011 |
| 8072020 | Nonvolatile semiconductor memory device A first select transistor is connected to one end of a plurality of memory cell transistors that are serially connected. A second select transistor is connected to the other end of the serially connected memory cell transistors. A first impurity diffusion region is ... | 12/06/2011 |
| 8072018 | Semiconductor device and method for fabricating the same A semiconductor device is provided. The semiconductor device comprises a substrate. A lamination structure is on the substrate along a first direction. The lamination structure comprises a plurality of conductive layers arranged from bottom to top and separated from... | 12/06/2011 |
| 8072019 | Flash memory and manufacturing method of the same A flash memory includes a shallow trench isolation and an active region formed at a substrate, a plurality of stacked gates formed on and/or over the active region, a deep implant region formed at a lower portion of the shallow trench isolation and the active region... | 12/06/2011 |
| 8063429 | Conductive spacers extended floating gates A method for manufacturing on a substrate a semiconductor device with improved floating-gate to control-gate coupling ratio is described. The method comprises the steps of first forming an isolation zone in the substrate, thereafter forming the floating gate on the ... | 11/22/2011 |
| 8063428 | Two-bits per cell not-and-gate (NAND) nitride trap memory A non-volatile memory array includes a semiconductor substrate having a main surface, a first source/drain region and a second source/drain region. The second source/drain region is spaced apart from the first source/drain region. A well region is disposed in a port... | 11/22/2011 |
| 8063430 | Semiconductor devices and methods of manufacturing and operating same A semiconductor device and methods of manufacturing and operating the semiconductor device may be disclosed. The semiconductor device may comprise different nanostructures. The semiconductor device may have a first element formed of nanowires and a second element fo... | 11/22/2011 |
| 8063431 | EEPROM and method for manufacturing EEPROM An electrically erasable programmable read only memory (EEPROM) is disclosed. The EEPROM includes a tunneling region in a semiconductor substrate, a control gate region in the semiconductor substrate and separated from the tunneling region by a device isolating laye... | 11/22/2011 |
| 8049266 | Nonvolatile semiconductor memory device and manufacturing method thereof A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electro... | 11/01/2011 |
| 8049265 | Semiconductor device and method of fabricating the same Provided are semiconductor devices and methods of fabricating the same. The semiconductor device comprises: a floating gate pattern formed in a cell area of a semiconductor substrate; a dummy floating gate pattern extending from the floating gate pattern into an int... | 11/01/2011 |
| 8039887 | Non-volatile semiconductor storage device and method for manufacturing the same A non-volatile semiconductor storage device includes: a semiconductor substrate; a source region and a drain region formed in the semiconductor substrate so as to be separated from each other; a first insulating film formed between the source region and the drain re... | 10/18/2011 |
| 8035150 | Nonvolatile semiconductor memory device and method for manufacturing the same A memory cell array of a NOR type flash memory is constructed by arranging memory cell transistors in a matrix, each of the memory cell transistors includes a contact connecting a semiconductor substrate to an overlayer wire. Columns of the memory cell transistors a... | 10/11/2011 |
| 8035153 | Self-aligned patterning method by using non-conformal film and etch for flash memory and other semiconductor applications A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal film is deposited over the charge trapping layer to form a thick film on top of the core source/drain regio... | 10/11/2011 |
| 8035151 | Semiconductor device capable of suppressing short channel effect and method of fabricating the same A semiconductor device includes a semiconductor substrate including at least one memory channel region and at least one memory source/drain region, the memory channel region and the memory source/drain region being arranged alternately, and at least one word line on... | 10/11/2011 |
| 8035152 | Semiconductor device having shared bit line structure A semiconductor device, including a substrate having first and second active regions, the first and second active regions being disposed on opposite sides of an isolation structure, and a bit line electrically coupled to a contact plug that is on the isolation struc... | 10/11/2011 |
| 8022462 | Methods of forming shallow trench isolation structures with buried bit lines in non-volatile memories Methods of forming buried bit lines in a non-volatile memory device can include forming impurity regions in a substrate of a non-volatile memory device to provide immediately neighboring buried bit lines for the device and then forming a shallow trench isolation reg... | 09/20/2011 |
| 8019194 | Digital audio and video recording and storage system and method An integrated apparatus is disclosed that can directly connect to a portable digital video camera and can record uncompressed video and audio data, along with associated metadata, in the field and elsewhere. Most preferably, the integrated apparatus includes a remov... | 09/13/2011 |
| 8017988 | High density stepped, non-planar flash memory A first plurality of memory cells is in a first plane in a first column of the array. A second plurality of memory cells is in a second plane in the same column. The second plurality of memory cells are coupled to the first plurality of memory cells through a series... | 09/13/2011 |
| 8017989 | Nonvolatile semiconductor memory device and method of manufacturing the same A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memo... | 09/13/2011 |
| 8017987 | Semiconductor memory device and method for manufacturing the same According to an aspect of the present invention, there is provided a semiconductor memory device including: a semiconductor substrate having: first device regions divided by first isolation films and second device regions divided by second isolation films a gate ins... | 09/13/2011 |
| 8008703 | Nonvolatile semiconductor memory device with twin-well A nonvolatile semiconductor memory device includes a first well of a first conductivity type, which is formed in a semiconductor substrate of the first conductivity type, a plurality of memory cell transistors that are formed in the first well, a second well of a se... | 08/30/2011 |
