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| Number | Title | Issue Date |
| 8101987 | Semiconductor device and method of fabricating the same A semiconductor device is disclosed. The semiconductor device includes: a first electrode, disposed over a first region of a substrate; and a conductive layer, disposed over the substrate, including a second electrode disposed above the first electrode, wherein the ... | 01/24/2012 |
| 7982255 | Flash memory with recessed floating gate A flash memory device wherein the floating gate of the flash memory is defined by a recessed access device. The use of a recessed access device results in a longer channel length with less loss of device density. The floating gate can also be elevated above the subs... | 07/19/2011 |
| 7671396 | Three-dimensional control-gate architecture for single poly EPROM memory devices fabricated in planar CMOS technology A capacitor for a single-poly floating gate device is fabricated on a semiconductor substrate along with low and high voltage transistors. Each transistor has a gate width greater than or equal to a minimum gate width of the associated process. A dielectric layer is... | 03/02/2010 |
| 7382014 | Semiconductor device with capacitor suppressing leak current A semiconductor device with a capacitor includes a lower electrode, a dielectric and an upper electrode on the dielectric layer. The dielectric layer including more than one polycrystalline tantalum oxide layer and more than one separation layer, wherein the polycry... | 06/03/2008 |
| 7375376 | Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 05/20/2008 |
| 7365403 | Semiconductor topography including a thin oxide-nitride stack and method for making the same A semiconductor topography is provided which includes a silicon dioxide layer with a thickness equal to or less than approximately 10 angstroms and a silicon nitride layer arranged upon the silicon dioxide layer. In addition, a method is provided which includes grow... | 04/29/2008 |
| 7342276 | Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme... | 03/11/2008 |
| 7342314 | Device having a useful structure and an auxiliary structure The present invention provides a device having a useful structure which is arranged on a substrate and has a useful structure side edge. In addition, an auxiliary structure is arranged on the substrate adjacent to the useful structure, the auxiliary structure having... | 03/11/2008 |
| 7338879 | Method of fabricating a semiconductor device having dual stacked MIM capacitor Semiconductor devices having a dual stacked MIM capacitor and methods of fabricating the same are disclosed. The semiconductor device includes a dual stacked MIM capacitor formed on the semiconductor substrate. The dual stacked MIM capacitor includes a lower plate p... | 03/04/2008 |
| 7335956 | Capacitor device with vertically arranged capacitor regions of various kinds A capacitor device selectively combines MOM, MIM and varactor regions in the same layout area of an IC. Two or more types of capacitor regions arranged vertically on a substrate to form the capacitor device. This increase the capacitance per unit of the capacitor de... | 02/26/2008 |
| 7326990 | Semiconductor device and method for fabricating the same A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least on... | 02/05/2008 |
| 7323708 | Phase change memory devices having phase change area in porous dielectric layer A phase change memory device includes a lower electrode and a porous dielectric layer having fine pores on the lower electrode. A phase change layer is provided in the fine pores of the porous dielectric layer. An upper electrode is provided on the phase change laye... | 01/29/2008 |
| 7317221 | High density MIM capacitor structure and fabrication process A stacked integrated circuit (IC) MIM capacitor structure and method for forming the same the MIM capacitor structure including a first MIM capacitor structure formed in a first IMD layer comprising an first upper and first lower electrode portions; at least a secon... | 01/08/2008 |
| 7291568 | Method for fabricating a nitrided silicon-oxide gate dielectric A method of fabricating a gate dielectric layer, including: providing a substrate; forming a silicon dioxide layer on a top surface of the substrate; performing a plasma nitridation in a reducing atmosphere to convert the silicon dioxide layer into a silicon oxynitr... | 11/06/2007 |
| 7271052 | Long retention time single transistor vertical memory gain cell A single transistor vertical memory gain cell with long data retention times. The memory cell is formed from a silicon carbide substrate to take advantage of the higher band gap energy of silicon carbide as compared to silicon. The silicon carbide provides much lowe... | 09/18/2007 |
| 7271436 | Flash memory devices including a pass transistor Flash memory integrated circuit devices include an integrated circuit substrate. A cell array on the integrated circuit substrate includes a plurality of cell transistors. A bit line is coupled to ones of the plurality of cell transistors and a first pass transistor... | 09/18/2007 |
| 7265406 | Capacitor with conducting nanostructure The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper con... | 09/04/2007 |
| 7256438 | MOS capacitor with reduced parasitic capacitance A capacitor including a first active layer capacitively coupled to a second active layer, the second active layer being capacitively coupled to a third layer, the third layer being capacitively coupled to a fourth layer, wherein an anode of the capacitor is connecte... | 08/14/2007 |
| 7253075 | Semiconductor device and method for manufacturing the same A semiconductor device has a plurality of capacitors. The semiconductor device includes a first capacitor arranged on a substrate and including first upper and lower electrode layers between which a first capacitor insulation film is interposed, and a second capacit... | 08/07/2007 |
| 7244982 | Semiconductor device using a conductive film and method of manufacturing the same A semiconductor device has a capacitive element including a first conductive film formed on the bottom and wall surfaces of an opening formed in an insulating film on a substrate, a dielectric film formed on the first conductive film, and a second conductive film fo... | 07/17/2007 |
| 7235498 | Process for growing a dielectric layer on a silicon-containing surface using a mixture of NO and O This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance gr... | 06/26/2007 |
| 7227241 | Integrated stacked capacitor and method of fabricating same An integrated stacked capacitor comprises a first capacitor film (46) of polycrystalline silicide (poly), a second capacitor film (48) and a first dielectric (26) sandwiched between the first capacitor film (46) and second capacitor film ... | 06/05/2007 |
| 7211875 | Voltage-controlled capacitive element and semiconductor integrated circuit An N well is disposed in the upper surface of a P type substrate, a gate insulating film and a gate electrode are disposed thereon, and the gate electrode is connected to a gate terminal. Two p+ diffusion regions are placed in two areas in the surface of ... | 05/01/2007 |
| 7202128 | Method of forming a memory device having improved erase speed A method of forming a memory device includes forming a memory stack on a substrate. The memory stack includes an alumina layer acting as an intergate dielectric layer. A transistor is formed on the substrate in an area separate from the memory stack. The transistor ... | 04/10/2007 |
| 7199415 | Conductive container structures having a dielectric cap Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating against bridging of conducti... | 04/03/2007 |
| 7180122 | Semiconductor device and method for fabricating the same A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least on... | 02/20/2007 |
| 7157766 | Variable capactor structure and method of manufacture A variable capacitor comprising a substrate having a first type ion-doped buried layer, a first type ion-doped well, a second type ion-doped region and a conductive layer thereon. The first type ion-doped well is formed within the substrate. The first type ion-doped... | 01/02/2007 |
| 7141844 | Selective polymer growth for memory cell fabrication Systems and methodologies of growing an active layer (e.g., a polymer layer) for a memory cell via catalyst points of a self assembled monolayer (SAM). The self assembled monolayer can act as a site that anchors a subsequent growth of polymer chain reactions, via th... | 11/28/2006 |
| 7115936 | Ferroelectric thin film element and its manufacturing method, thin film capacitor and piezoelectric actuator using same In a manufacturing method for a piezoelectric actuator a first electrode layer is formed on substrate, a ferroelectric thin film is formed on the first electrode layer, and an inorganic protective layer 4 is formed on the ferroelectric thin film. Then, the in... | 10/03/2006 |
| 7115938 | Non-volatile memory cell and method of forming the same A non-volatile memory cell comprising a transistor and two plane capacitors. In the memory cell, a switching device is disposed on a substrate, a first plane capacitor having a first doped region and a second plane capacitor having a second doped region. The switchi... | 10/03/2006 |
| 7095072 | Semiconductor device with wiring layers forming a capacitor A semiconductor device, in which four pieces of strip-shaped electrodes, whose longitudinal directions are the same, are formed in each layer of a plurality of wiring layers that are provided by a same design rule with each other, simultaneously with regular wirings... | 08/22/2006 |
| 7087182 | Process of forming an electrically erasable programmable read only memory with an oxide layer exposed to hydrogen and nitrogen The present invention provides a flash memory integrated circuit and a method of fabricating the same. A tunnel dielectric in an erasable programmable read only memory (EPROM) device is nitrided with a hydrogen-bearing compound, particularly ammonia. Hydrogen is thu... | 08/08/2006 |
| 7078310 | Method for fabricating a high density composite MIM capacitor with flexible routing in semiconductor dies According to one embodiment, a structure comprises an electrode of a lower MIM capacitor situated in a first interconnect metal layer of a semiconductor die. The structure further comprises a shared electrode of the lower MIM capacitor and an upper MIM capacitor. Th... | 07/18/2006 |
| 7034353 | Methods for enhancing capacitors having roughened features to increase charge-storage capacity Structures and methods for making a semiconductor structure are discussed. The semiconductor structure includes a rough surface having protrusions formed from an undoped silicon film. If the semiconductor structure is a capacitor, the protrusions help to increase th... | 04/25/2006 |
| 7026212 | Method for making high density nonvolatile memory An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably compr... | 04/11/2006 |
| 7009275 | Method for making high density nonvolatile memory An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably compr... | 03/07/2006 |
| 6958270 | Methods of fabricating crossbar array microelectronic electrochemical cells The present invention provides microelectronic electrochemical structures and related fabrication methods. A composite microelectronic structure is provided that includes first and second conductors dielectrically isolated from one another at a crossing thereof, the... | 10/25/2005 |
| 6952030 | High-density three-dimensional memory cell A three dimensional monolithic memory comprising a memory cell allowing for increased density is disclosed. In the memory cell of the present invention, a bottom conductor preferably comprising tungsten is formed. Above the bottom conductor a semiconductor element p... | 10/04/2005 |
| 6950299 | Non-linear capacitors An electronic device including first, second and third conductor layers respectively arranged as the source, drain and gate electrodes of a field effect transistor, the third conductor layer being capacitively coupled with both the first and second conductor layers ... | 09/27/2005 |
| 6943392 | Capacitors having a capacitor dielectric layer comprising a metal oxide having multiple different metals bonded with oxygen The invention comprises capacitors having a capacitor dielectric layer comprising a metal oxide having multiple different metals bonded with oxygen. In one embodiment, a capacitor includes first and second conductive electrodes having a high k capacitor dielectric r... | 09/13/2005 |
