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| Number | Title | Issue Date |
| 7977726 | DRAM cell with enhanced capacitor area and the method of manufacturing the same A dynamic random access memory (DRAM) cell and the method of manufacturing the same are provided. The DRAM cell includes a cell transistor and a cell capacitor. The cell capacitor includes a first, second and third dielectric layer, and a first, second and third cap... | 07/12/2011 |
| 7952130 | eDRAM-type semiconductor device including logic circuit section featuring large capacitance capacitor, and capacitor DRAM section featuring small capacitance capacitor In an eDRAM-type semiconductor device, a dynamic random access memory (DRAM) section and a logic circuit section are formed on a semiconductor substrate, and an insulating layer is formed on the semiconductor substrate. A first capacitor is formed in the insulating ... | 05/31/2011 |
| 7888725 | Electronic devices including electrode walls with insulating layers thereon An electronic device may include a substrate and a plurality of conductive electrodes on the substrate. Each of the conductive electrodes may have a respective electrode wall extending away from the substrate, and an electrode wall of at least one of the conductive ... | 02/15/2011 |
| 7880213 | Bottom electrode of metal-insulator-metal capacitor A structure and a method of fabricating a bottom electrode of a metal-insulator-metal (MIM) capacitor are provided. First, a transition metal layer is formed on a substrate. Thereafter, a self-assembling polymer film having a nano-pattern is formed on the transition... | 02/01/2011 |
| 7875920 | Semiconductor device and method of manufacturing the same Provided are a semiconductor device and a method of manufacturing the semiconductor device, for example, a semiconductor device using carbon nanotubes or nanowires as lower electrodes of a capacitor, and a method of manufacturing the semiconductor device. The semico... | 01/25/2011 |
| 7851843 | DRAM cylindrical capacitor A structure of a DRAM cylindrical capacitor includes a substrate, a dielectric layer, an amorphous silicon spacer, a polysilicon plug, a HSG layer, a conductive layer and a capacitor dielectric layer. The dielectric layer is disposed on the substrate and includes an... | 12/14/2010 |
| 7821052 | Method for forming a buried digit line with self aligning spacing layer and contact plugs during the formation of a semiconductor device, semiconductor devices, and systems including same A method for use during fabrication of a semiconductor device comprises the formation of buried digit lines and contacts. During formation, a buried bit line layer may be used as a mask to etch one or more openings in a dielectric layer. A conductive layer is then f... | 10/26/2010 |
| 7719045 | Capacitor for a semiconductor device and method of forming the same In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first ... | 05/18/2010 |
| 7719044 | Platinum-containing integrated circuits and capacitor constructions In one aspect, the invention includes a method of forming a roughened layer of platinum, comprising: a) providing a substrate within a reaction chamber; b) flowing an oxidizing gas into the reaction chamber; c) flowing a platinum precursor into the reaction chamber ... | 05/18/2010 |
| 7687844 | Semiconductor constructions The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the expos... | 03/30/2010 |
| 7667257 | Capacitor and process for manufacturing the same Method for solving the problem caused when forming a crown-structure capacitor in a trench which is formed in an insulating film, and having difficulty in electrical by connecting a first upper electrode formed on the inside wall of the trench and a second upper ele... | 02/23/2010 |
| 7667258 | Double-sided container capacitors using a sacrificial layer Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides... | 02/23/2010 |
| 7635889 | Semiconductor device, electronic device, and method of manufacturing semiconductor device Conductive layers having knots are adjacently formed with uniform distance therebetween. Droplets of the conductive layers are discharged to stagger centers of the droplets in a length direction of wirings so that the centers of the discharged droplets are not on th... | 12/22/2009 |
| 7602002 | Semiconductor device with DRAM portion having capacitor-over-bit-line structure and logic portion The present invention provides a semiconductor device comprising: a semiconductor substrate having a DRAM portion and a Logic portion; a first transistor in said DRAM portion; a second transistor in said Logic portion; a first insulating layer covering said DRAM por... | 10/13/2009 |
| 7595526 | Capacitor and method for fabricating the same A method for manufacturing a capacitor in a semiconductor device for securing capacitance without a merging phenomenon during a MPS grain growth process. The manufacturing step begins with a preparation of a substrate. The interlayer dielectric (ILD) layer is formed... | 09/29/2009 |
| 7511325 | Ferroelectric capacitor A ferroelectric capacitor includes a bottom electrode, a ferroelectric layer formed on the bottom electrode, and a top electrode formed on the ferroelectric layer. A plurality of projection electrodes are formed on the bottom electrode. ... | 03/31/2009 |
| 7498629 | Stud electrode and process for making same A process of making a stud capacitor structure is disclosed. The process includes embedding the stud in a dielectric stack. In one embodiment, the process includes forming an electrically conductive seed film in a contact corridor of the dielectric stack. A storage ... | 03/03/2009 |
| 7485914 | Interdigitized capacitor An interdigitized capacitor comprising first and second electrodes. The first electrode comprises two combs symmetrical to a first mirror plane. The fingers of the combs extend toward the first mirror plane. The second electrode comprises two combs and a linear plat... | 02/03/2009 |
| 7459746 | Method of forming inside rough and outside smooth HSG electrodes and capacitor structure A container capacitor and method of forming the container capacitor are provided. The container capacitor comprises a lower electrode fabricated by forming a layer of doped polysilicon within a container in an insulative layer disposed on a substrate; forming a barr... | 12/02/2008 |
| 7439570 | Metal-insulator-metal capacitors An interdigitated Metal-Insulator-Metal (MIM) capacitor provides self-shielding and accurate capacitance ratios with small capacitance values. The MIM capacitor includes two terminals that extend to a plurality of interdigitated fingers separated by an insulator. Me... | 10/21/2008 |
| 7436069 | Semiconductor device, having a through electrode semiconductor module employing thereof and method for manufacturing semiconductor device having a through electrode The layout density of the through electrodes in the horizontal plane of the substrate is enhanced. Through holes 103 extending through the silicon substrate 101 is provided. An insulating film 105 is buried within the through hole 103. A ... | 10/14/2008 |
| 7414297 | Capacitor constructions The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is form... | 08/19/2008 |
| 7408216 | Device, system, and method for a trench capacitor having micro-roughened semiconductor surfaces Some embodiments of the invention include a memory cell having a vertical transistor and a trench capacitor. The trench capacitor includes a capacitor plate with a roughened surface for increased surface area. Other embodiments are described and claims. ... | 08/05/2008 |
| 7405122 | Methods for fabricating a capacitor A method for forming a capacitor comprises providing a substrate. A bottom electrode material layer is formed on the substrate. A first mask layer is formed on the bottom electrode material layer. A second mask layer is formed on the first mask layer. The second mas... | 07/29/2008 |
| 7405438 | Capacitor constructions and semiconductor structures The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is ... | 07/29/2008 |
| 7400008 | Semiconductor device and manufacturing process therefor An objective of this invention is to provide a semiconductor device comprising a less bias-dependent capacitative element with a large capacity per a unit area, having a configuration which can be manufactured using an existing structure in a semiconductor device. T... | 07/15/2008 |
| 7382014 | Semiconductor device with capacitor suppressing leak current A semiconductor device with a capacitor includes a lower electrode, a dielectric and an upper electrode on the dielectric layer. The dielectric layer including more than one polycrystalline tantalum oxide layer and more than one separation layer, wherein the polycry... | 06/03/2008 |
| 7378313 | Methods of fabricating double-sided hemispherical silicon grain electrodes and capacitor modules Methods are provided for robust and cost effective techniques to fabricate a semiconductor device having double-sided hemispherical silicon grain (HSG) electrodes for container capacitors. In an embodiment, this is accomplished by forming a layer of hemispherical si... | 05/27/2008 |
| 7378739 | Capacitor and light emitting display using the same A capacitor including a polysilicon layer doped with impurities to be conductive, a first dielectric layer formed on the polysilicon layer, a first conductive layer formed on the first dielectric layer, a second dielectric layer formed on the first conductive layer,... | 05/27/2008 |
| 7375376 | Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 05/20/2008 |
| 7372094 | Semiconductor constructions The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the expos... | 05/13/2008 |
| 7371647 | Methods of forming transistors The invention encompasses a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the substrate. Nitrogen is formed within the silicon dioxide containing layer. Substantially all of the nit... | 05/13/2008 |
| 7361552 | Semiconductor integrated circuit including a DRAM and an analog circuit A semiconductor device including an interlayer insulation film formed on a substrate so as to cover first and second regions defined on the substrate, and a capacitor formed over the interlayer insulation film in the first region, wherein the interlayer insulation f... | 04/22/2008 |
| 7361426 | Surface structure for enhancing catalyst reactivity and method of manufacturing thereof A method of enhancing catalyst reactivity includes (1) depositing a conductive oxide on a suitable substrate, (2) depositing a thin film of catalyst on top of the conductive oxide to form a sandwich structure, and (3) annealing the structure at a, suitable temperatu... | 04/22/2008 |
| 7361599 | Integrated circuit and method A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch. ... | 04/22/2008 |
| 7358557 | Capacitor for semiconductor device and method of forming the same A capacitor for a semiconductor device includes a lower electrode, a dielectric layer formed on a lower electrode, and an upper electrode formed on the dielectric layer. The lower electrode includes a first layer having a cylindrical shape and a mesh second layer fo... | 04/15/2008 |
| 7355234 | Semiconductor device including a stacked capacitor A stacked capacitor formed in a capacitor hole includes a bottom electrode, capacitor insulation film and a top electrode. The bottom electrode includes a plurality of islands formed on an underlying insulating film, and a metallic film covering the islands on the u... | 04/08/2008 |
| 7354842 | Methods of forming conductive materials The invention includes a method of forming a metal-comprising mass for a semiconductor construction. A semiconductor substrate is provided, and a metallo-organic precursor is provided proximate the substrate. The precursor is exposed to a reducing atmosphere to rele... | 04/08/2008 |
| 7355232 | Memory devices with dual-sided capacitors A dual-sided HSG capacitor and a method of fabrication are disclosed. A thin native oxide layer is formed between a doped polycrystalline layer and a layer of hemispherical grained polysilicon (HSG) as part of a dual-sided lower capacitor electrode. Prior to the die... | 04/08/2008 |
| 7342314 | Device having a useful structure and an auxiliary structure The present invention provides a device having a useful structure which is arranged on a substrate and has a useful structure side edge. In addition, an auxiliary structure is arranged on the substrate adjacent to the useful structure, the auxiliary structure having... | 03/11/2008 |
