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| Number | Title | Issue Date |
| 8106437 | Semiconductor storage device A semiconductor storage device is provided, which inhibits shorts between cells to improve operational reliability and contributes to high-speed operation. An active region (7) where DRAM cells are formed is defined by an isolation trench (40) formed i... | 01/31/2012 |
| 8022457 | Semiconductor memory device having vertical channel transistor and method for fabricating the same Channels of two transistors are vertically formed on portions of two opposite side surfaces of one active region, and gate electrodes are vertically formed on a device isolation layer contacting the channels of the active region. A common bit line contact plug is fo... | 09/20/2011 |
| 7772634 | Semiconductor device and manufacturing method thereof A channel stop region is formed immediately under an STI, and thereafter, an ion implantation is performed with conditions in which an impurity is doped into an upper layer portion of an active region, and at the same time, the impurity is also doped into immediatel... | 08/10/2010 |
| 7541634 | Trench capacitor A trench capacitor including a substrate, at least a group of capacitor units, an isolation structure and a conductive layer is described. The substrate includes a first trench and a second trench. The group of capacitor units is disposed in the substrate. The group... | 06/02/2009 |
| 7442981 | Capacitor of semiconductor device and method of fabricating the same Provided is a capacitor of a semiconductor device and a method of fabricating the same. In one embodiment, the capacitor includes a lower electrode formed on a semiconductor substrate; a dielectric layer formed on the lower electrode; and an upper electrode that is ... | 10/28/2008 |
| 7416952 | Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer A dielectric interlayer, especially for a storage capacitor, is formed from a layer sequence subjected to a temperature process, wherein the layer sequence has at least a first metal oxide layer and a second metal oxide layer formed by completely oxidizing a metal n... | 08/26/2008 |
| 7417277 | Semiconductor integrated circuit and method of manufacturing the same Conventional capacitors constituted of a FET incur degradation in frequency response. A semiconductor integrated circuit includes a semiconductor substrate, an N-type FET, a P-type FET, and capacitors. The N-type FET includes N-type impurity diffusion layers, a P-ty... | 08/26/2008 |
| 7375376 | Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 05/20/2008 |
| 7358108 | CMOS image sensor and method for fabricating the same A CMOS image sensor and a method for fabricating the same are disclosed, in which the boundary between an active region and a field region is not damaged by ion implantation. The method for fabricating a CMOS image sensor includes forming a trench in a first conduct... | 04/15/2008 |
| 7358149 | Substrate isolation in integrated circuits Substrate isolation trench (224) are formed in a semiconductor substrate (120). Dopant (e.g. boron) is implanted into the trench sidewalls by ion implantation to suppress the current leakage along the sidewalls. During the ion implantation, the transis... | 04/15/2008 |
| 7342274 | Memory cells with vertical transistor and capacitor and fabrication methods thereof Memory cells with vertical transistor and capacitor and fabrication methods thereof. The memory cell comprises a substrate with a trench. A capacitor is disposed at the bottom of the trench. A first conductive layer is electrically coupled to the capacitor. The firs... | 03/11/2008 |
| 7342276 | Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme... | 03/11/2008 |
| 7339224 | Trench capacitor and corresponding method of production The invention relates to a trench capacitor, in particular for use in a semiconductor memory cell, comprising a trench (2), embodied in a substrate (1), a first region (1a), provided in the substrate (1), as first capacitor electro... | 03/04/2008 |
| 7335553 | Method for forming trench capacitor and memory cell A method for forming a trench capacitor and memory cell by providing a substrate on which a grid STI and a plurality of active regions covered by a hard mask layer are formed. A photoresist is formed and a low grade photo mask having only X direction consideration i... | 02/26/2008 |
| 7329916 | DRAM cell arrangement with vertical MOS transistors The invention is related to a DRAM cell arrangement with vertical MOS transistors. Channel regions arranged along one of the columns of a memory cell matrix are parts of a rib which is surrounded by a gate dielectric layer. Gate electrodes of the MOS transistors bel... | 02/12/2008 |
| 7326990 | Semiconductor device and method for fabricating the same A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least on... | 02/05/2008 |
| 7325090 | Refreshing data stored in a flash memory Data are stored in one or more cells of a non-volatile memory, and are refreshed according to a predetermined condition. The data are refreshed either in-place or out-of-place. The condition may be related to the age of the data. Alternatively, the data are refreshe... | 01/29/2008 |
| 7319254 | Semiconductor memory device having resistor and method of fabricating the same A semiconductor device having resistors in a peripheral area and fabrication method thereof are provided. A mold layer is formed on a semiconductor substrate. The mold layer is patterned to form first molding holes and a second molding hole in the mold layer. A stor... | 01/15/2008 |
| 7319611 | Bitline transistor architecture for flash memory A memory array includes a buried diffusion region, a first source line that supplies electrical power to the buried diffusion region, a second source line that supplies electrical power to the buried diffusion region, a first bitline transistor having a first channe... | 01/15/2008 |
| 7319259 | Structure and method for accurate deep trench resistance measurement A test structure for implementing resistance measurement of a deep trench formed in a semiconductor device includes a pair of deep trenches formed within a semiconductor substrate. The pair of deep trenches has a dielectric material formed on side and bottom surface... | 01/15/2008 |
| 7314800 | Application of different isolation schemes for logic and embedded memory The present invention facilitates semiconductor device fabrication by providing mechanisms for utilizing different isolation schemes within embedded memory and other logic portions of a device. The isolation mechanism of the embedded memory portion is improved relat... | 01/01/2008 |
| 7298000 | Conductive container structures having a dielectric cap Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating against bridging of conducti... | 11/20/2007 |
| 7294903 | Transistor assemblies Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry are described. In one embodiment, active areas are formed over a substrate, with one of the ... | 11/13/2007 |
| 7291880 | Transistor assembly Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry are described. In one embodiment, active areas are formed over a substrate, with one of the ... | 11/06/2007 |
| 7285825 | Element formation substrate for forming semiconductor device A support-side substrate having a thermal oxide film on the major surface is bonded to an active-layer-side substrate having a thermal oxide film on the major surface while making the major surfaces oppose each other. The active-layer-side substrate and part of the ... | 10/23/2007 |
| 7276750 | Semiconductor device having trench capacitor and fabrication method for the same A semiconductor device includes a semiconductor substrate with a trench; a capacitor; a collar oxide film arranged on a portion of a side of the trench above the capacitor; a storage node arranged on a side of the collar oxide film in an upper portion of the trench ... | 10/02/2007 |
| 7268037 | Method for fabricating microchips using metal oxide masks A process for modifying sections of a semiconductor includes covering the sections to remain free of doping with a metal oxide, e.g., aluminum oxide. Then, the semiconductor is doped, for example, from the gas phase, in those sections that are not covered by the alu... | 09/11/2007 |
| 7268395 | Deep trench super switch device A deep trench super switch device has a plurality of trenches, each of the trenches containing a gate electrode polysilicon layer on top of a plurality of stacked conductive floating polysilicon layers, the remainder of each of the trenches being filled with a nonco... | 09/11/2007 |
| 7268384 | Semiconductor substrate having first and second pairs of word lines The invention includes methods of forming memory circuitry. In one implementation, a semiconductor substrate includes a pair of word lines having a bit node received therebetween. A bit node contact opening is formed within insulative material over the bit node. Sac... | 09/11/2007 |
| 7262486 | SOI substrate and method for manufacturing the same The SOI substrate 1 has a supporting substrate 10, an insulating layer 20 formed on the supporting substrate 10 and a silicon layer 30 formed on the insulating layer 20. A through electrode 40 is provided in a device ... | 08/28/2007 |
| 7256440 | Semiconductor memory cell having a trench and a planar selection transistor and method for producing the same A trench (12) of a semiconductor memory cell (1) has an insulation collar (44), which is open toward the substrate (42) on just one side (50). On the other side (52), the insulation collar (44, 47, 55) rises all the w... | 08/14/2007 |
| 7256100 | Manufacturing method of semiconductor device having trench type element isolation A semiconductor substrate including a first region, a second region larger than the first region and an isolation region is provided. A mask layer is selectively formed on the first and second regions. A trench is formed on the isolation region. A first isolation ma... | 08/14/2007 |
| 7256454 | Electronic device including discontinuous storage elements and a process for forming the same An electronic device can include discontinuous storage elements that lie within a trench. In one embodiment, the electronic device can include a substrate that includes a trench extending into a semiconductor material. The trench can include a ledge and a bottom, wh... | 08/14/2007 |
| 7253047 | Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry are described. In one embodiment, active areas are formed over a substrate, with one of the ... | 08/07/2007 |
| 7250650 | Field-effect transistor structure and associated semiconductor memory cell A field-effect transistor (FET) structure and method of formation thereof is presented. The FET structure includes first and second source/drain regions formed in a semiconductor substrate to define a channel region. A gate insulation layer is formed at a surface of... | 07/31/2007 |
| 7247905 | Offset vertical device The present invention includes a method for forming a memory array and the memory array produced therefrom. Specifically, the memory array includes at least one first-type memory device, each of the at least one first-type memory device comprising a first transistor... | 07/24/2007 |
| 7247906 | Semiconductor devices having DRAM cells and methods of fabricating the same A semiconductor device comprises bit line landing pads and storage landing pads disposed on both sides of the bit line landing pads overlying a substrate. A bit line interlayer insulating layer overlies the bit line and storage landing pads. A plurality of bit line ... | 07/24/2007 |
| 7244982 | Semiconductor device using a conductive film and method of manufacturing the same A semiconductor device has a capacitive element including a first conductive film formed on the bottom and wall surfaces of an opening formed in an insulating film on a substrate, a dielectric film formed on the first conductive film, and a second conductive film fo... | 07/17/2007 |
| 7235433 | Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device A semiconductor device comprising a substrate having a first crystal orientation and an insulating layer overlying the substrate is provided. A plurality of silicon layers are formed overlying the insulating layer. A first silicon layer comprises silicon having the ... | 06/26/2007 |
| 7232718 | Method for forming a deep trench capacitor buried plate A method for forming a deep trench capacitor buried plate. A substrate having a pad oxide and a pad nitride is provided. A deep trench is formed in the substrate. A doped silicate film is deposited on a sidewall of the deep trench. A sacrificial layer is deposited i... | 06/19/2007 |
