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| Number | Title | Issue Date |
| 8154064 | Semiconductor constructions The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conduc... | 04/10/2012 |
| 8134195 | Semiconductor device and method of fabricating the same A semiconductor device, and a method of fabricating the semiconductor device, which is able to prevent a leaning phenomenon from occurring between the adjacent storage nodes. The method includes forming a plurality of multi-layered pillar type storage nodes each of ... | 03/13/2012 |
| 7888723 | Deep trench capacitor in a SOI substrate having a laterally protruding buried strap A deep trench is formed to a depth midway into a buried insulator layer of a semiconductor-on-insulator (SOI) substrate. A top semiconductor layer is laterally recessed by an isotropic etch that is selective to the buried insulator layer. The deep trench is then etc... | 02/15/2011 |
| 7884408 | One-transistor random access memory technology compatible with metal gate process One-transistor RAM technology compatible with a metal gate process fabricates a metal gate electrode formed of the same metal material as a top electrode of a MIM capacitor embedded isolation structure. A gate dielectric layer is formed of the same high-k dielectric... | 02/08/2011 |
| 7872291 | Enhanced atomic layer deposition A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second precursor reacts with a prior precursor to deposit a layer on the substr... | 01/18/2011 |
| 7859038 | Semiconductor device A dummy transistor and a field effect transistor are arranged in a second direction. The dummy transistor is located at least at one end in a second direction. ... | 12/28/2010 |
| 7812388 | Deep trench capacitor and method of making same A trench capacitor and method of forming a trench capacitor. The trench capacitor including: a trench in a single-crystal silicon substrate, a conformal dielectric liner on the sidewalls and the bottom of the trench; an electrically conductive polysilicon inner plat... | 10/12/2010 |
| 7781818 | Semiconductor constructions containing tubular capacitor storage nodes, and retaining structures along portions of the tubular capacitor storage nodes The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conduc... | 08/24/2010 |
| 7696554 | Flash memory device A flash memory device and method of fabricating the same, wherein a width at the top of a floating gate is narrower than that at the bottom of the floating gate. The area of the floating gate can be reduced while maintaining the overlap area between the control gate... | 04/13/2010 |
| 7679122 | Semiconductor device including source strapping line A semiconductor device includes a plurality of source regions and drain regions disposed on a semiconductor substrate. The semiconductor device also includes a plurality of word lines disposed on the semiconductor substrate between the source regions and the drain r... | 03/16/2010 |
| 7646053 | Memory cell storage node length Methods, devices, and systems for a memory cell are provided. One embodiment includes a memory cell with a storage node separated from a body region by a first dielectric, wherein the body region includes a channel separating a source and a drain region, and wherein... | 01/12/2010 |
| 7638829 | Capacitor of dynamic random access memory and method of manufacturing the capacitor A transistor formed on a semiconductor substrate has a gate electrode formed via a gate insulating film and first and second diffusion layers formed in the semiconductor substrate, the first and second diffusion layers being positioned at both sides of the gate elec... | 12/29/2009 |
| 7544985 | Semiconductor capacitor structure and method for manufacturing the same In one embodiment, a semiconductor device comprises a base and a tapered wall formed on the base. The wall has a midline and also has an inner sidewall and an outer sidewall. The inner sidewall and the outer sidewall are substantially symmetrical with each other in ... | 06/09/2009 |
| 7535046 | Dielectric memory and manufacturing method thereof As an oxygen diffusion prevention layer, a multilayer film formed by a metal nitride and a noble metal element. As an interlayer insulation film on the oxygen diffusion prevention layer, a plasma CVD oxide film is used. Moreover, as an interlayer insulation film on ... | 05/19/2009 |
| 7531861 | Trench capacitors with insulating layer collars in undercut regions Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the firs... | 05/12/2009 |
| 7521748 | Method to eliminate arsenic contamination in trench capacitors A trench capacitor structure in which arsenic contamination is substantially reduced and/or essentially eliminated from diffusing into a semiconductor substrate along sidewalls of a trench opening having a high aspect ratio is provided. The present invention also pr... | 04/21/2009 |
| 7518175 | Semiconductor memory device and method for fabricating the same The present invention relates to a semiconductor memory device and a method for fabricating the same. The semiconductor memory device, including: a plurality of gate structures formed on a substrate; a contact junction region formed beneath the substrate disposed in... | 04/14/2009 |
| 7462902 | Nonvolatile memory A nonvolatile memory is provided. The memory includes a select transistor and a trench transistor. The select transistor is formed on the substrate. The select transistor includes a first gate formed on the substrate and first and second source/drain regions formed ... | 12/09/2008 |
| 7427793 | Sacrificial self-aligned interconnect structure A sacrificial, self-aligned polysilicon interconnect structure is formed in a region of insulating material to the side of an active region location and underlying a semiconductor device of a substrate assembly in order to electrically connect the active region and ... | 09/23/2008 |
| 7416952 | Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer A dielectric interlayer, especially for a storage capacitor, is formed from a layer sequence subjected to a temperature process, wherein the layer sequence has at least a first metal oxide layer and a second metal oxide layer formed by completely oxidizing a metal n... | 08/26/2008 |
| 7414278 | Semiconductor device with shallow trench isolation which controls mechanical stresses The semiconductor device comprises a semiconductor substrate 10 with a trench 16a and a trench 16b formed in; a device isolation film 32a buried in the trench 16a and including a liner film including a s... | 08/19/2008 |
| 7402860 | Method for fabricating a capacitor The present invention relates to a method of fabricating a capacitor in a semiconductor substrate. The capacitor is fabricated such that the capacitor comprises: a trench inside a substrate, the trench having a lower region and an upper region, wherein the trench's ... | 07/22/2008 |
| 7378341 | Automatic process control of after-etch-inspection critical dimension Automatic process control of after-etch-inspection critical dimension. A dielectric layer is deposited over a substrate and is then planarized to a first thickness. A cap oxide layer having a second thickness is deposited, wherein the combination of the first thickn... | 05/27/2008 |
| 7375376 | Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 05/20/2008 |
| 7364967 | Methods of forming storage capacitors for semiconductor devices Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact... | 04/29/2008 |
| 7365011 | Catalytic nucleation monolayer for metal seed layers A method of forming a copper interconnect on a substrate comprises providing a substrate that includes a dielectric layer and a trench etched into the dielectric layer, depositing a barrier layer within the trench, using a palladium immobilization process to form a ... | 04/29/2008 |
| 7361591 | Method of fabricating semiconductor memory device A method includes preparing a semiconductor substrate having a cell region, a core NMOS region, and a core PMOS region; defining a cell active region, an NMOS active region, and a PMOS active region in the cell region, the core NMOS region, and the core PMOS region,... | 04/22/2008 |
| 7361599 | Integrated circuit and method A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch. ... | 04/22/2008 |
| 7358191 | Method for decreasing sheet resistivity variations of an interconnect metal layer According to one exemplary embodiment, a method includes a step of forming a number of trenches in a dielectric layer, where the dielectric layer is situated over a wafer. The method further includes forming a metal layer over the dielectric layer and in the trenche... | 04/15/2008 |
| 7355230 | Transistor array for semiconductor memory devices and method for fabricating a vertical channel transistor array A transistor array for semiconductor memory devices is provided. A plurality of semiconductor pillars extending outwardly from a bulk section of a semiconductor substrate is arranged in rows and columns. Each pillar forms an active area of a vertical channel access ... | 04/08/2008 |
| 7354821 | Methods of fabricating trench capacitors with insulating layer collars in undercut regions Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the firs... | 04/08/2008 |
| 7355240 | Semiconductor product including logic, non-volatile memory and volatile memory devices and method for fabrication thereof A semiconductor product and a method for fabricating the semiconductor product employ a semiconductor substrate. The semiconductor substrate has a logic region having a logic device formed therein, a non-volatile memory region having a non-volatile memory device for... | 04/08/2008 |
| 7348622 | Memories having a charge storage node at least partially located in a trench in a semiconductor substrate and electrically coupled to a source/drain region formed in the substrate A memory charge storage node (120.1, 120.2, 120.3) is at least partially located in a trench (124). The memory comprises a transistor including a source/drain region (170) present at a first side (124.1) but not a second side (124.2 | 03/25/2008 |
| 7348619 | Ferroelectric memory arrangement A ferroelectric memory arrangement having memory cells, in each of which a vertical ferroelectric storage capacitor, which includes vertical electrodes and a ferroelectric dielectric between the vertical electrodes, is connected to a select transistor, the ferroelec... | 03/25/2008 |
| 7342276 | Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme... | 03/11/2008 |
| 7338851 | Diode/superionic conductor/polymer memory structure A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal... | 03/04/2008 |
| 7339224 | Trench capacitor and corresponding method of production The invention relates to a trench capacitor, in particular for use in a semiconductor memory cell, comprising a trench (2), embodied in a substrate (1), a first region (1a), provided in the substrate (1), as first capacitor electro... | 03/04/2008 |
| 7332392 | Trench-capacitor DRAM device and manufacture method thereof A trench capacitor structure includes a semiconductor substrate comprising thereon a STI structure. A capacitor deep trench is etched into the semiconductor substrate. Collar oxide layer is disposed on inner surface of the capacitor deep trench. A first doped polysi... | 02/19/2008 |
| 7326986 | Trench memory A trench device and method for fabricating same are provided. The trench device has a collar with a first portion that is doped and a second portion that is undoped. Fabrication of the partially doped collar can be done by deposition of a doped insulator in the tren... | 02/05/2008 |
| 7326990 | Semiconductor device and method for fabricating the same A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least on... | 02/05/2008 |
