Celebrity Inventors
Penn Jillette of Penn and Teller fame has patented a "Hydro-Therapeutic Stimulator", which uses a hot tub for stimulation.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 6967365 | Ferroelectric memory cell with angled cell transistor active region and methods for fabricating the same Ferroelectric memory cells and fabrication methods are provided in which the memory cell comprises a ferroelectric capacitor in a capacitor layer above a semiconductor body, and a cell transistor with first and second source/drains formed in an active region of the ... | 11/22/2005 |
| 6967367 | Ferro-electric memory device and method of manufacturing the same A ferro-electric memory device includes a semiconductor substrate, a first transistor formed on the semiconductor substrate, and a first ferro-electric capacitor electrically connected to the first transistor and formed of a first capacitor material layer having a f... | 11/22/2005 |
| 6965140 | Semiconductor device including storage capacitor It is an object of the present invention to provide a high-reliability semiconductor device having a storage capacitor and wiring using copper for a main conductive film. Under the above object, the present invention provides a semiconductor device comprising: a sem... | 11/15/2005 |
| 6964908 | Metal-insulator-metal capacitor and method of fabricating same A metal-insulator-metal (MIM) capacitor including a metal layer, an insulating layer formed on the metal layer, at least a first opening and at least a second opening formed in the first insulating layer, a dielectric layer formed in the first opening, a conductive ... | 11/15/2005 |
| 6963483 | Self-aligned coaxial via capacitors The various embodiments of coaxial capacitors are self-aligned and formed in a via, including blind vias, buried vias and plated through holes. The coaxial capacitors are adapted to utilize the plating of a plated via as a first electrode. The dielectric layer is fo... | 11/08/2005 |
| 6962845 | Method for manufacturing semiconductor capacitor having double dielectric layer therein The method for manufacturing a DRAM capacitor is employed to enhance charge capacitance and electrical endurance of the DRAM capacitor by structuring a double dielectric layer of aluminum oxide (Al2O3) and hafnium oxide (HfO2). The m... | 11/08/2005 |
| 6963096 | Semiconductor element having a semi-magnetic contact The invention relates to a magnetoresistive semiconductor element, including a first contact and a second contact, and also a layer of a nonmagnetic semiconductor arranged between the first contact and the second contact. The first contact is composed of a semi-magn... | 11/08/2005 |
| 6963097 | Ferroelectric random access memory capacitor and method for manufacturing the same The method for manufacturing an FeRAM capacitor with a merged top electrode plate line (MTP) structure is employed to prevent a detrimental impact on the FeRAM and to secure a reliable FeRAM device. The method includes steps of: preparing an active matrix obtained b... | 11/08/2005 |
| 6960365 | Vertical MIMCap manufacturing method A method of manufacturing a vertical metal-insulator-metal capacitor (MIMCap) (10) in regions (19) of an insulating layer (14). Trenches for both conductive lines and vertical MIMCap's are formed in the insulating layer (14), and regions ... | 11/01/2005 |
| 6958503 | Nonvolatile magnetic memory device The MRAM has a transistor for selection, a lower insulating interlayer, a first connecting hole, a first wiring formed on the lower insulating interlayer, a tunnel magnetoresistance device formed on the first wiring through an insulating film, an upper insulating in... | 10/25/2005 |
| 6958505 | Integrated circuit including active components and at least one passive component associated fabrication method There is provided an integrated circuit having active components including junctions formed in a monocrystalline substrate doped locally, and at least one passive component situated above the active components. The integrated circuit includes a first insulating laye... | 10/25/2005 |
| 6958506 | High-dielectric constant insulators for feol capacitors Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor stru... | 10/25/2005 |
| 6955925 | Annealing A method and apparatus for annealing an integrated ferroelectric device (10) is disclosed in which the device (10) comprises a first layer of material capable of existing in a ferroelectric state and a second layer of material defining an integrated ci... | 10/18/2005 |
| 6956729 | Capacitor element and production thereof A capacitor element includes a lower electrode, a ferroelectric film, and an upper electrode that are formed on a substrate. In the capacitor element, the ferroelectric film is formed by a reaction rate-determining method, and the lower electrode has a thickness of ... | 10/18/2005 |
| 6956747 | Semiconductor device There is disclosed a semiconductor device comprising at least one first pad being formed above a substrate and given a first potential, at least one first conductive layer being formed between the first pad and the substrate so as to be electrically connected to the... | 10/18/2005 |
| 6956257 | Magnetic memory element and memory device including same Various embodiments of a magnetic memory element, including a storage layer and a reference layer, are disclosed. The storage layer includes two conjugate magnetic domain segments having opposing helicities. The reference layer is permanently magnetized. A non-magne... | 10/18/2005 |
| 6956259 | Semiconductor device and method of manufacturing the same Disclosed is a semiconductor device comprises a semiconductor substrate having on its surface a trench, a polycrystalline semiconductor film formed inside the trench, a diffusion layer deposited on a surface region of the semiconductor substrate, and a metal semicon... | 10/18/2005 |
| 6956256 | Vertical gain cell A high density vertical gain cell is realized for memory operation. The gain cell includes a vertical MOS transistor used as a sense transistor having a floating body between a drain region and a source region, and a second vertical MOS transistor merged with the se... | 10/18/2005 |
| 6956261 | Semiconductor device and method for manufacturing the same A first DRAM section including a first memory cell having a first capacitance and a second DRAM section including a second memory cell having a second capacitance different from the first capacitance are provided on the same semiconductor substrate. ... | 10/18/2005 |
| 6954194 | Semiconductor device and display apparatus A semiconductor device for individually controlling an element to be driven, such as an electroluminescence element, includes a switching TFT which operates when a selection signal is applied to its gate and which also captures a data signal, and an element-driving ... | 10/11/2005 |
| 6952028 | Ferroelectric memory devices with expanded plate line and methods in fabricating the same A ferroelectric memory device includes a lower interlayer dielectric on a semiconductor substrate, a plurality of ferroelectric capacitors, and a plate line. The ferroelectric capacitors are on the lower interlayer dielectric. The plate line extends across and elect... | 10/04/2005 |
| 6952029 | Thin film capacitor with substantially homogenous stoichiometry A method for ion implantation of high dielectric constant materials with dopants to improve sidewall stoichiometry is disclosed. Particularly, the invention relates to ion implantation of (Ba,Sr)TiO3 (BST) with Ti dopants. The invention also relates to va... | 10/04/2005 |
| 6952044 | Monolithic bridge capacitor According to the most preferred embodiments of the present invention, at least one of the two plates of a capacitor is formed in at least two different layers of an integrated circuit. The methods of the present invention uses “air bridges” or some other dielect... | 10/04/2005 |
| 6949815 | Semiconductor device with decoupling capacitors mounted on conductors A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface, metal foil leads 5 electrically connected to each of the pads and ... | 09/27/2005 |
| 6946698 | MRAM device having low-k inter-metal dielectric A magnetic random access memory (MRAM) device including a magnetic tunneling junction (MTJ) stack separated from one or more proximate conductive layers and/or one or more proximate MTJ stacks by a low-k dielectric material. ... | 09/20/2005 |
| 6946701 | Method for forming a memory integrated circuit with bitlines over gates and capacitors over bitlines A process for fabricating a crown-cell capacitor in a memory integrated circuit. The process includes the step of forming a transistor having a contact region 353 at a surface of a semiconductor substrate 300. The transistor, with the exception of the ... | 09/20/2005 |
| 6946357 | Conductive container structures having a dielectric cap Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating against bridging of conducti... | 09/20/2005 |
| 6943065 | Scalable high performance antifuse structure and process Systems and methods are provided for a scalable high-performance antifuse structure and process that has a low RC component, a uniform dielectric breakdown, and a very low, effective dielectric constant (keff) such that a programming pulse voltage is scal... | 09/13/2005 |
| 6943080 | Method of manufacturing the semiconductor device A method of manufacturing semiconductor device including a capacitor including a pair of electrodes and a ferroelectric flu with ferroelectricity sandwiched therebetween, by depositing the ferroelectric film on first substrate; forming the capacitor by grinding the ... | 09/13/2005 |
| 6943398 | Semiconductor device and method for fabricating the same A semiconductor device includes: a lower hydrogen-barrier film; a capacitor formed on the lower hydrogen-barrier film and including a lower electrode, a capacitive insulating film, and an upper electrode; an interlayer dielectric film formed so as to cover the perip... | 09/13/2005 |
| 6940112 | Integrated capacitors fabricated with conductive metal oxides A capacitor for a memory device is formed with a conductive oxide for a bottom electrode. The conductive oxide (RuOx) is deposited under low temperatures as an amorphous film. As a result, the film is conformally deposited over a three dimensional, foldin... | 09/06/2005 |
| 6940123 | Memory cell array In a matrix-shaped configuration of memory transistors, word lines are disposed on a top side of a semiconductor body and are parallel to one another. Bit lines run transversely with respect thereto and are formed by polysilicon strips which are applied on the top s... | 09/06/2005 |
| 6939762 | Semiconductor devices and methods for manufacturing the same It is an object of the present invention to provide a method for manufacturing a semiconductor device in which, when a cell capacitor of a DRAM and a capacitor element in an analog element region are mix-mounted on the same chip, the manufacturing steps can be simpl... | 09/06/2005 |
| 6940120 | Non-volatile semiconductor memory device and method of fabricating thereof A phosphorus-doped amorphous silicon film and a silicon nitride film are serially grown over a semiconductor substrate. The obtained stack is patterned so as to obtain word lines. A CVD oxide film is grown on the entire surface and then anisotropically etched to the... | 09/06/2005 |
| 6940115 | Memory cell having a second transistor for holding a charge value A memory cell has a transistor, a capacitor, and a second transistor that is formed as a parasitic field-effect transistor. The parasitic field-effect transistor is provided in order to produce an electrically conductive connection between a voltage source and the i... | 09/06/2005 |
| 6936878 | Semiconductor memory device with reduced memory cell area A semiconductor memory device includes a memory cell, and first and second capacitive elements. The memory cell has a pair of inverters each including first and second driver nMOS transistors and first and second TFTs, and first and second access nMQS transistors. T... | 08/30/2005 |
| 6933551 | Large value, compact, high yielding integrated circuit capacitors An integrated circuit capacitor and an integrated circuit are provided. The integrated circuit capacitor includes at least first, second and third conducting plates. The first conducting plate is positioned between the second and third plates. A first dielectric lay... | 08/23/2005 |
| 6933552 | High surface area capacitors and intermediate storage poly structures formed during fabrication thereof A honeycomb/webbed, high surface area capacitor formed by etching a storage poly using an etch mask having a plurality of micro vias. The etch mask is preferably formed by applying an HSG polysilicon layer on a surface of the storage poly with a mask layer being dep... | 08/23/2005 |
| 6930345 | Increase in deep trench capacitance by a central ground electrode A semiconductor device includes a trench formed in a substrate, and a diffusion region surrounding the trench to form a buried plate. A first conductive material is formed in the trench and connects to the buried plate through a bottom of the trench to form a first ... | 08/16/2005 |
| 6927431 | Semiconductor circuit constructions The invention includes a method of forming semiconductor circuitry wherein a first semiconductor structure comprising a first monocrystalline semiconductor substrate is bonded to a second semiconductor structure comprising a second monocrystalline semiconductor subs... | 08/09/2005 |
