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| Number | Title | Issue Date |
| 7671395 | Phase change memory cells having a cell diode and a bottom electrode self-aligned with each other Integrated circuit devices are provide having a vertical diode therein. The devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact hole penetrates the insulating layer. A vertical diode is in lower regi... | 03/02/2010 |
| 7655969 | Semiconductor device having a cylindrical capacitor A DRAM device has a stacked capacitor including a first capacitor section received in a thick insulation film and a second capacitor section overlying the first capacitor section. A portion of the bottom electrode in the second capacitor section has a thickness larg... | 02/02/2010 |
| 7642590 | Semiconductor device and method for making the same A method for forming a semiconductor device is provided. The method comprises providing a substrate with recessed gates and deep trench capacitor devices therein. Protrusions of the recessed gates and upper portions of the deep trench capacitor devices are revealed.... | 01/05/2010 |
| 7586143 | Semiconductor device A substrate is provided with a first wiring layer 111, an interlayer insulating film 132 on the first wiring layer 111, a hole 112A formed in the interlayer insulating film, a first metal layer 112 covering the hole 112A, a ... | 09/08/2009 |
| 7579642 | Gate-enhanced junction varactor A semiconductor junction varactor utilizes gate enhancement for enabling the varactor to achieve a high ratio of maximum capacitance to minimum capacitance. ... | 08/25/2009 |
| 7547938 | Semiconductor devices having elongated contact plugs A method of manufacturing a semiconductor device includes forming conductive structures on a substrate. Each of the conductive structures has a line shape that extends along a first direction parallel to the substrate. Insulating spacers are formed on upper sidewall... | 06/16/2009 |
| 7528431 | Semiconductor device having isolation pattern in interlayer insulating layer between capacitor contact plugs and methods of fabricating the same A semiconductor device having an isolation pattern inside an interlayer insulating layer between capacitor contact plugs and methods of fabrication the same: The semiconductor device includes an interlayer insulating layer covering a semiconductor substrate. At leas... | 05/05/2009 |
| 7508023 | Capacitor structure and fabricating method thereof A capacitor structure is described, including a substrate, a first metal layer in the substrate, an etching stop layer on the substrate having therein an opening that exposes a portion of the first metal layer, a connection layer on the portion of the first metal la... | 03/24/2009 |
| 7495276 | Radio frequency arrangement, method for producing a radio frequency arrangement and use of the radio frequency arrangement A radio frequency arrangement is disclosed, having a first semiconductor body with an integrated circuit formed therein and also with first and second terminal locations. A second semiconductor body with a charge store integrated therein and with a first and second ... | 02/24/2009 |
| 7485911 | Semiconductor device having decoupling capacitor and method of fabricating the same A semiconductor device having a decoupling capacitor and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate having a cell region, a first peripheral circuit region, and a second peripheral circuit region. At le... | 02/03/2009 |
| 7468534 | Localized masking for semiconductor structure development Container structures for use in integrated circuits and methods of their manufacture without the use of mechanical planarization such as chemical-mechanical planarization (CMP), thus eliminating CMP-induced defects and variations. The methods utilize localized maski... | 12/23/2008 |
| 7459745 | Methods of forming capacitors for semiconductor memory devices and resulting semiconductor memory devices Methods of forming capacitors include forming a first mold layer and a second mold layer on a substrate, forming storage electrodes through the mold layers, the storage electrodes arranged in rows extending in a first direction and spaced apart from adjacent storage... | 12/02/2008 |
| 7449741 | SRAM cell structure and manufacturing method thereof A static random access memory (SRAM) cell structure at least comprising a substrate, a transistor, an upper electrode and a capacitor dielectric layer. A device isolation structure is set up in the substrate to define an active region. The active region has an openi... | 11/11/2008 |
| 7446365 | Fabricated layered capacitor for a digital-to-analog converter A fabricated layered capacitor having three layers is provided. The first bottom layer comprises a first bottom plate portion, the second middle layer comprises a first top plate portion, and the third top layer comprises a second bottom plate portion of the layered... | 11/04/2008 |
| 7446366 | Process sequence for doped silicon fill of deep trenches A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in at a temperature, pressure and dopant to silane ratio such that film deposition occurs from the bottom of the trench up... | 11/04/2008 |
| 7442981 | Capacitor of semiconductor device and method of fabricating the same Provided is a capacitor of a semiconductor device and a method of fabricating the same. In one embodiment, the capacitor includes a lower electrode formed on a semiconductor substrate; a dielectric layer formed on the lower electrode; and an upper electrode that is ... | 10/28/2008 |
| 7442976 | DRAM cells with vertical transistors The invention includes a semiconductor structure having U-shaped transistors formed by etching a semiconductor substrate. In an embodiment, the source/drain regions of the transistors are provided at the tops of pairs of pillars defined by crossing trenches in the s... | 10/28/2008 |
| 7436014 | Method of fabricating storage capacitor in semiconductor memory device, and storage capacitor structure A storage capacitor has a double cylinder type structure, with a small cylinder in a lower part thereof and a cylindrical lower electrode structure disposed on the cylindrical contact plug. A method of fabricating the storage capacitor includes: forming a contact ho... | 10/14/2008 |
| 7436016 | MIM capacitor with a cap layer over the conductive plates A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a wafer including a MIM capacitor bottom plate, and depositing an insulating layer over the MIM capacitor bott... | 10/14/2008 |
| 7432597 | Semiconductor device and method of manufacturing the same In a semiconductor device including a memory region and a logic region, one or more of a plurality of logic transistor connection plugs, buried in a first insulating layer and connected to a diffusion layer of a logic transistor, are left unconnected to a first inte... | 10/07/2008 |
| 7432545 | Semiconductor device A capacity element with a simple configuration exhibits excellent production reliability. A semiconductor device 100 includes a capacity element consisting of a lower electrode 102, an SiCN film 107 and an upper electrode 113. In an insul... | 10/07/2008 |
| 7427793 | Sacrificial self-aligned interconnect structure A sacrificial, self-aligned polysilicon interconnect structure is formed in a region of insulating material to the side of an active region location and underlying a semiconductor device of a substrate assembly in order to electrically connect the active region and ... | 09/23/2008 |
| 7425724 | Memory device and method of production and method of use of same and semiconductor device and method of production of same A memory device able to be produced without requiring high precision alignment, a method of production of the same, and a method of use of a memory device produced in this way, wherein a peripheral circuit portion (first semiconductor portion) formed by a first mini... | 09/16/2008 |
| 7416953 | Vertical MIM capacitors and method of fabricating the same A method of fabricating a vertical MIM capacitor. An insulation layer is formed on the substrate. The insulation layer is patterned to form an opening in a predetermined area of a core electrode. Then, the opening is filled to form a sacrificial plug. Subsequently, ... | 08/26/2008 |
| 7416952 | Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer A dielectric interlayer, especially for a storage capacitor, is formed from a layer sequence subjected to a temperature process, wherein the layer sequence has at least a first metal oxide layer and a second metal oxide layer formed by completely oxidizing a metal n... | 08/26/2008 |
| 7414297 | Capacitor constructions The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is form... | 08/19/2008 |
| 7411256 | Semiconductor integrated circuit device capacitive node interconnect A semiconductor integrated circuit device is provided, which involves inhibiting a pattern change in the node interconnect and an increase of number of manufacturing process, when the capacitor is additionally installed in the SRAM, while providing higher reliabilit... | 08/12/2008 |
| 7405438 | Capacitor constructions and semiconductor structures The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is ... | 07/29/2008 |
| 7402488 | Method of manufacturing a semiconductor memory device A method of manufacturing a semiconductor memory device includes forming a carbon-containing layer on a semiconductor substrate, forming an insulating layer pattern on the carbon-containing layer, the insulating layer pattern partially exposing an upper surface of t... | 07/22/2008 |
| 7402860 | Method for fabricating a capacitor The present invention relates to a method of fabricating a capacitor in a semiconductor substrate. The capacitor is fabricated such that the capacitor comprises: a trench inside a substrate, the trench having a lower region and an upper region, wherein the trench's ... | 07/22/2008 |
| 7397078 | Non-volatile semiconductor memory A non-volatile semiconductor memory comprising at least one EPROM/EEPROM memory cell that includes a floating gate transistor and a coupling capacitor, said floating gate transistor comprising a field effect transistor and a polysilicon layer, the coupling capacitor... | 07/08/2008 |
| 7382012 | Reducing parasitic capacitance of MIM capacitor in integrated circuits by reducing effective dielectric constant of dielectric layer A memory device having improved sensing speed and reliability and a method of forming the same are provided. The memory device includes a first dielectric layer having a low k value over a semiconductor substrate, a second dielectric layer having a second k value ov... | 06/03/2008 |
| 7375376 | Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 05/20/2008 |
| 7365386 | Semiconductor device and method of manufacturing the semiconductor device A semiconductor device having improved reliability is provided. The semiconductor device has a pixel portion. The pixel portion has a TFT and a storage capacitor. The TFT and the storage capacitor has a semiconductor layer which includes first and second regions for... | 04/29/2008 |
| 7364979 | Capcitor with single crystal tantalum oxide layer and method for fabricating the same A capacitor and a method for fabricating the same are provided. The capacitor includes: a substrate; an inter-layer insulation layer formed over the substrate and including a contact hole; a storage node formed over the inter-layer insulation layer and filled into t... | 04/29/2008 |
| 7365412 | Vertical parallel plate capacitor using spacer shaped electrodes and method for fabrication thereof A capacitor structure uses an aperture located within a dielectric layer in turn located over a substrate. A pair of conductor interconnection layers embedded within the dielectric layer terminates at a pair of opposite sidewalls of the aperture. A pair of capacitor... | 04/29/2008 |
| 7361599 | Integrated circuit and method A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch. ... | 04/22/2008 |
| 7361950 | Integration of a MIM capacitor with a plate formed in a well region and with a high-k dielectric A MIM capacitor is formed on a semiconductor substrate having a top surface and including regions formed in the surface selected from a Shallow Trench Isolation (STI) region and a doped well having exterior surfaces coplanar with the semiconductor substrate. A capac... | 04/22/2008 |
| 7358133 | Semiconductor device and method for making the same A method for forming a semiconductor device is provided. The method comprises providing a substrate with recessed gates and deep trench capacitor devices therein. Protrusions of the recessed gates and upper portions of the deep trench capacitor devices are revealed.... | 04/15/2008 |
| 7358172 | Poly filled substrate contact on SOI structure Embodiments herein present a method for forming a poly filled substrate contact on a SOI structure. The method forms an insulator on a substrate and forms a substrate contact hole within the insulator. The insulator surface level is higher than final structure. Next... | 04/15/2008 |