...that a workman who left the soap mixing machine on too long was responsible for making Ivory Soap? He was so embarrassed by his mistake that he threw the mess in a stream. Imagine his dismay when the evidence of his error floated to the surface! Result: Ivory soap, the soap that floats.
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| Number | Title | Issue Date |
| 8183612 | Optical receiver and method of forming the same Provided are an optical receiver and a method of forming the same. The optical receiver includes a lens, a photo detector, and a hetero-junction bipolar transistor. The lens is attached to a backside of a substrate. The photo detector is disposed on a top surface of... | 05/22/2012 |
| 8159014 | Localized biasing for silicon on insulator structures A silicon-on-insulator device has a localized biasing structure formed in the insulator layer of the SOI. The localized biasing structure includes a patterned conductor that provides a biasing signal to distinct regions of the silicon layer of the SOI. The conductor... | 04/17/2012 |
| 8143658 | Charge storage nanostructure The present invention relates to a nanostructured device for charge storage. In particular the invention relates to a charge storage device that can be used for memory applications. According to the invention the device comprise a first nanowire with a first wrap ga... | 03/27/2012 |
| 8125012 | Non-volatile memory device with a silicon nitride charge holding film having an excess of silicon Performance of a non-volatile semiconductor storage device which performs electron writing by hot electrons and hole erasure by hot holes is improved. A non-volatile memory cell which performs a writing operation by electrons and an erasure operation by holes has a ... | 02/28/2012 |
| 8049260 | High-density integrated circuitry for semiconductor memory Processes are disclosed which facilitate improved high-density memory circuitry, most preferably dynamic random access memory (DRAM) circuitry. A semiconductor memory device includes i) a total of no more than 68,000,000 functional and operably addressable memory ce... | 11/01/2011 |
| 8030696 | Thin film transistor substrate, defect repairing method therefor, and display device A thin film transistor substrate includes: a substrate; a thin film transistor and a capacitor formed on the substrate; and a protective film for protecting an electrode on a back surface side of the capacitor when an electrode on a front surface side of the capacit... | 10/04/2011 |
| 7999297 | Semiconductor device having stacked decoupling capacitors A semiconductor device having transistors formed on different layers of a stack structure includes a stacked capacitor cluster, wherein a stacked capacitor of the stacked capacitor cluster includes an insulation layer of a transistor of the semiconductor device, and... | 08/16/2011 |
| 7989864 | Methods for enhancing capacitors having roughened features to increase charge-storage capacity Structures and methods for making a semiconductor structure are discussed. The semiconductor structure includes a rough surface having protrusions formed from an undoped silicon film. If the semiconductor structure is a capacitor, the protrusions help to increase th... | 08/02/2011 |
| 7977722 | Non-volatile memory with programmable capacitance Non-volatile memory with programmable capacitance is disclosed. Illustrative data memory units include a substrate including a source region and a drain region. A first insulating layer is over the substrate. A second insulating layer is over the substrate and betwe... | 07/12/2011 |
| 7977721 | High voltage tolerant metal-oxide-semiconductor device A method for increasing a voltage tolerance of a MOS device having a first capacitance value associated therewith is provided. The method includes the steps of: connecting at least a first capacitor in series with the MOS device, the first capacitor having a first c... | 07/12/2011 |
| 7968927 | Memory array for increased bit density and method of forming the same A memory array having a plurality of resistance variable memory units and method for forming the same are provided. Each memory unit includes a first electrode, a resistance variable material over the first electrode, and a first second-electrode over the resistance... | 06/28/2011 |
| 7968926 | Logic non-volatile memory cell with improved data retention ability A memory cell includes a semiconductor substrate; and a first, a second, and a third transistor. The first transistor includes a first dielectric over the semiconductor substrate; and a first floating gate over the first dielectric. The second transistor is electric... | 06/28/2011 |
| 7939875 | Pixel structure of a thin film transistor liquid crystal display and fabricating method thereof A method of fabricating a pixel structure of a thin film transistor liquid crystal display is provided. A transparent conductive layer and a first metallic layer are sequentially formed over a substrate. The first metallic layer and the transparent conductive layer ... | 05/10/2011 |
| 7939873 | Capacitor element and semiconductor device An object of the present invention is that the capacitance of MOS capacitors is changed without varying the kind of an impurity (a donor or an acceptor) in a channel formation region, and an n-type MOS capacitor and a p-type MOS capacitor are formed over a same subs... | 05/10/2011 |
| 7939874 | Semiconductor device A semiconductor device has semiconductor elements formed on a silicon substrate. A first one of the semiconductor elements has a region formed with a surface orientation of . A second one of the semiconductor elements has a region formed with a surface orientat... | 05/10/2011 |
| 7915658 | Semiconductor on insulator (SOI) device including a discharge path for a decoupling capacitor A silicon on insulator (SOI) device is provided. The device includes an MOS capacitor coupled between voltage busses and formed in a monocrystalline semiconductor layer overlying an insulator layer and a semiconductor substrate. The device includes at least one elec... | 03/29/2011 |
| 7880211 | Anti-fuse and method for forming the same, unit cell of nonvolatile memory device with the same An anti-fuse includes a gate dielectric layer formed over a substrate, a gate electrode including a body portion and a plurality of protruding portions extending from the body portion, wherein the body portion and the protruding portions are formed to contact on the... | 02/01/2011 |
| 7872290 | Recess transistor (TR) gate to obtain large self-aligned contact (SAC) open margin A memory cell of a semiconductor device and a method for forming the same, wherein the memory cell includes a substrate having active regions and field regions, a gate layer formed over the substrate, the gate layer including a plurality of access gates formed over ... | 01/18/2011 |
| 7800151 | Semiconductor integrated circuit and method of designing semiconductor integrated circuit In the present invention, a decoupling capacitance circuit, a first output terminal and a second output terminal are provided. The decoupling capacitance circuit comprises a TDDB control circuit consisting of a first Tr and a second Tr, and a third Tr. Conductivity ... | 09/21/2010 |
| 7759716 | Semiconductor device, method of fabricating the same, stacked module including the same, card including the same, and system including the stacked module A semiconductor device in which a plurality of chips can be reliably stacked without reducing integration thereof. The semiconductor device includes a substrate on which a circuit is provided. Pads are disposed on the substrate for testing the circuit. At least one ... | 07/20/2010 |
| 7750387 | Semiconductor device and method of fabricating the same Disclosed are a semiconductor device and method of fabricating the same. The semiconductor device includes a floating gate on a semiconductor layer; a first contact on the floating gate; a MIM capacitor including a lower electrode, an insulating layer, and an upper ... | 07/06/2010 |
| 7737481 | Semiconductor memory device A semiconductor memory device has bit lines, capacitors, bit contacts and capacitor contacts, wherein the bit lines are provided over a semiconductor substrate, the bit lines are connected to the semiconductor substrate through the bit contacts, the capacitors are c... | 06/15/2010 |
| 7723767 | High dielectric constant transition metal oxide materials A transition metal oxide dielectric material is doped with a non-metal in order to enhance the electrical properties of the metal oxide. In a preferred embodiment, a transition metal oxide is deposited over a bottom electrode and implanted with a dopant. In a prefer... | 05/25/2010 |
| 7709877 | High surface area capacitor structures and precursors A high surface area capacitor structure includes a storage electrode with recesses. An upper surface of the storage electrode has a maze-like appearance. Low elevation regions of a hemispherical grain polysilicon layer may remain on the upper surface of the storage ... | 05/04/2010 |
| 7696553 | Semiconductor storage device and method for manufacturing the same A semiconductor storage device is manufactured by the following steps. A cylindrical hole is formed in an interlayer insulating film. Then, a multilayer conductive layer including a first sublayer and a second sublayer is formed over the entire surface of the insula... | 04/13/2010 |
| 7687842 | Bit line structure and method for the production thereof A bit line structure and associated fabrication method are provided for a semiconductor element or circuit arrangement. The bit line structure contains a surface bit line and a buried bit line. The buried bit line is formed in an upper section of a trench and is con... | 03/30/2010 |
| 7663173 | Non-volatile memory cell with poly filled trench as control gate and fully isolated substrate as charge storage In a non-volatile memory cell, charge is stored in a fully isolated substrate or floating bulk that forms a storage capacitor with a first poly strip and includes a second poly strip defining a read gate and a poly-filled trench defining a control gate. ... | 02/16/2010 |
| 7638828 | Embedded capacitor The invention concerns a capacitor whereof one first electrode consists of a highly doped active region (D) of a semiconductor component (T) formed on one side of a surface of a semiconductor body, and whereof the second electrode consists of a conductive region (BR... | 12/29/2009 |
| 7633109 | DRAM structure and method of making the same A DRAM structure has a substrate, a buried transistor with a fin structure, a trench capacitor, and a surface strap on the surface of the substrate. The surface strap is used to electrically connect a drain region to the trench capacitor. ... | 12/15/2009 |
| 7622760 | MOS type variable capacitance device An n-well is formed in a p-type semiconductor substrate. A gate insulative film is formed to the p-type semiconductor substrate and the n-well, and a gate electrode is formed on the gate insulative film. A source layer selectively diffused with n-type impurities at ... | 11/24/2009 |
| 7608880 | Semiconductor memory device having a peripheral region including operating capacitors A semiconductor memory device comprises a cell region including a plurality of unit memory cells, and a peripheral circuit region, the peripheral circuit region including a plurality of peripheral circuit devices for operating the plurality of memory cells and at le... | 10/27/2009 |
| 7592659 | Field effect transistor and an operation method of the field effect transistor A field effect transistor includes a silicon substrate, a source electrode and a drain electrode which are formed in upper portions of the silicon substrate, and an insulator film, a PCMO film, and a gate electrode which are formed on part of the silicon substrate s... | 09/22/2009 |
| 7576380 | Methods for enhancing capacitors having roughened features to increase charge-storage capacity Structures and methods for making a semiconductor structure are discussed. The semiconductor structure includes a rough surface having protrusions formed from an undoped silicon film. If the semiconductor structure is a capacitor, the protrusions help to increase th... | 08/18/2009 |
| 7557398 | Semiconductor device having a compensation capacitor in a mesh structure The compensation capacitor includes: a charge accumulating element having a diffusion layer, a dielectric layer, and a gate electrode layer, wherein the gate electrode layer, the dielectric layer, and the diffusion layer are stacked in this order, and at least parti... | 07/07/2009 |
| 7504684 | Semiconductor device and manufacturing method therefor A semiconductor device comprising a capacitive element which is provided above the semiconductor substrate and which has a capacitive insulation film held between an upper electrode and a lower electrode, a conductor for upper electrode which is connected to the upp... | 03/17/2009 |
| 7501676 | High density semiconductor memory A memory cell, array and device include cross-shaped active areas and polysilicon gate areas disposed over arm portions of adjacent cross-shaped active areas. The polysilicon gate areas couple word lines with capacitors associated with each arm portion of the cross-... | 03/10/2009 |
| 7462900 | Phase changeable memory devices including nitrogen and/or silicon Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that may include nitrogen atoms and/or silicon atoms. First and second electrodes a... | 12/09/2008 |
| 7459743 | Dual port gain cell with side and top gated read transistor A DRAM memory cell and process sequence for fabricating a dense (20 or 18 square) layout is fabricated with silicon-on-insulator (SOI) CMOS technology. Specifically, the present invention provides a dense, high-performance SRAM cell replacement that is compatible wi... | 12/02/2008 |
| 7449740 | Semiconductor memory device having capacitors and method for forming the same A semiconductor substrate has a cell region and a peripheral circuit region surrounding the cell region. In the cell region a plurality of lower electrodes are connected to a conductive region of the semiconductor substrate, and are arrayed along row and column dire... | 11/11/2008 |
| 7436015 | Driver for driving a load using a charge pump circuit A charge pump circuit includes MOSFETs and MOS capacitors formed on the same substrate. Each of the MOS capacitors has a multiplicity of first electrodes formed in one region of the substrate, insulating layers formed on/above respective substrate regions between ne... | 10/14/2008 |