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A method of swing on a swing is disclosed, in which a user positioned on a standard swing suspended by two chains from a substantially horizontal tree branch induces side to side motion by pulling alternately on one chain and then the other.
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| Number | Title | Issue Date |
| 8178915 | Unitary floating-gate electrode with both N-type and P-type gates An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes n-type and p-... | 05/15/2012 |
| 8164130 | Nonvolatile memory device comprising one switching device and one resistant material and method of manufacturing the same A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage uni... | 04/24/2012 |
| 8164131 | Nonvolatile semiconductor memory device and method of manufacturing the same A nonvolatile semiconductor memory device includes: a first semiconductor region having first conductivity; a channel formation region in which a channel inversion layer having second conductivity is formed; a second semiconductor region having the second conductivi... | 04/24/2012 |
| 8143656 | High performance one-transistor DRAM cell device and manufacturing method thereof Provided are a high-performance one-transistor floating-body DRAM cell device and a manufacturing method thereof. The one-transistor floating-body DRAM cell device includes: a semiconductor substrate; a gate stack which is formed on the semiconductor substrate; a co... | 03/27/2012 |
| 8143657 | Discrete trap non-volatile multi-functional memory device A multiple layer tunnel insulator is fabricated between a substrate and a discrete trap layer. The properties of the multiple layers determines the volatility of the memory device. The composition of each layer and/or the quantity of layers is adjusted to fabricate ... | 03/27/2012 |
| 8120084 | Ferro-electric device and modulatable injection barrier Described is a modulatable injection barrier and a semiconductor element comprising same. More particularly, the invention relates to a two-terminal, non-volatile programmable resistor. Such a resistor can be applied in non-volatile memory devices, and as an active ... | 02/21/2012 |
| 8067792 | Memory device with memory cell including MuGFET and FIN capacitor One embodiment of the present invention relates to a memory cell. The memory cell includes a multi-gate field effect transistor associated with a first region of a semiconductor fin. The memory cell also includes a fin capacitor coupled to a drain of the multi-gate ... | 11/29/2011 |
| 8063425 | Semiconductor device having reduced thickness, electronic product employing the same, and methods of fabricating the same A semiconductor device capable of reducing a thickness, an electronic product employing the same, and a method of fabricating the same are provided. The method of fabricating a semiconductor device includes preparing a semiconductor substrate having first and second... | 11/22/2011 |
| 7999296 | Single gate nonvolatile memory cell with transistor and capacitor A nonvolatile memory integrated circuit has a semiconductor substrate and a nonvolatile memory device on the semiconductor substrate. The device has a transistor and a capacitor on the semiconductor substrate, and a shared floating gate connecting the gate regions o... | 08/16/2011 |
| 7960771 | Semiconductor device comprising a switching element and memory element having an organic compound A memory element is formed by providing an organic compound between a pair of upper and lower electrodes. However, when the electrode is formed over a layer containing an organic compound, a temperature is limited because the layer containing the organic compound ca... | 06/14/2011 |
| 7919801 | RF power transistor structure and a method of forming the same In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor and a portion of a bidirectional transistor in or over a semiconductor... | 04/05/2011 |
| 7910973 | Semiconductor storage device A non-volatile semiconductor storage device has: a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series; and a capacitor element area including capacitor elements. Each of the memory strings includes: a plurality o... | 03/22/2011 |
| 7868370 | Single gate nonvolatile memory cell with transistor and capacitor A nonvolatile memory integrated circuit has a semiconductor substrate and a nonvolatile memory device on the semiconductor substrate. The device has a transistor and a capacitor on the semiconductor substrate, and a shared floating gate connecting the gate regions o... | 01/11/2011 |
| 7868371 | Non-volatile memory device and fabrication method thereof In one embodiment, a non-volatile memory device includes an isolation film defining an active region in a semiconductor substrate; a tunnel insulating film located on the active region; a control gate located on the isolation film; an inter-gate dielectric film para... | 01/11/2011 |
| 7842991 | Nonvolatile memory devices including oxygen-deficient metal oxide layers and methods of manufacturing the same A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, o... | 11/30/2010 |
| 7829927 | Polyoxometallates in memory devices The invention relates to a DRAM memory device with a capacity associated with a field effect transistor, in which all or some of the molecules capable of storing the loads comprising a polyoxometallate are incorporated into the capacity, or a flash-type memory using... | 11/09/2010 |
| 7821050 | CRAM transistors with high immunity to soft error A transistor fabricated on a semiconductor substrate includes a source and a drain in the substrate; a gate on the substrate, the gate being insulated from the substrate by gate dielectric; barrier layers covering two sides of the gate and the gate dielectric; space... | 10/26/2010 |
| 7816719 | Nonvolatile magnetic memory device and photomask A nonvolatile magnetic memory device including a magntoresistance device having a recording layer formed of a ferromagnetic material for storing information by use of variation in resistance depending on the magnetization inversion state. The plan-view shape of the ... | 10/19/2010 |
| 7781816 | Nonvolatile magnetic memory device and photomask A nonvolatile magnetic memory device including a magnetoresistance device having a recording layer formed of a ferromagnetic material for storing information by use of variation in resistance depending on the magnetization inversion state. The plan-view shape of the... | 08/24/2010 |
| 7763921 | Semiconductor device and manufacturing method thereof The present invention provides a semiconductor device which is characterized as follows. The semiconductor device includes: an interlayer insulating film formed above a semiconductor substrate and provided with a hole above an impurity diffusion region; a conductive... | 07/27/2010 |
| 7714370 | Semiconductor storage device having an SOI structure A semiconductor storage device includes: a MOSFET formed on an SOI layer of the transistor forming region; and a MOS capacitor formed on the SOI layer of the capacitor forming region. The MOSFET includes: a gate insulating film formed; a floating gate electrode; a s... | 05/11/2010 |
| 7679119 | CMOS inverter based logic memory A single-poly electrically erasable/programmable CMOS logic memory cell for mobile applications includes a CMOS inverter that share a single polysilicon floating gate, and an enhanced control capacitor including a control gate capacitor and an optional isolated P-we... | 03/16/2010 |
| 7659566 | Method of fabricating a resistance based memory device and the memory device Example embodiments relate to a method of fabricating a memory device and a memory device. The method of fabricating a memory device comprises forming a lower electrode and an oxide layer on a lower structure and radiating an energy beam on a region of the oxide lay... | 02/09/2010 |
| 7646052 | DRAM and SRAM mixedly mounted semiconductor device A semiconductor device in which a DRAM and a SRAM are mixedly mounted is provided. The DRAM and the SRAM have a stack-type structure in which a bitline is formed below a capacitive element. A cross couple connection of the SRAM is formed in a layer or below the laye... | 01/12/2010 |
| 7612398 | Semiconductor storage device and method of manufacturing the same A semiconductor storage device wherein a plurality of ferroelectric capacitors are sufficiently covered with a hydrogen barrier film formed thereon comprises a field effect transistor formed on one surface side of a semiconductor substrate, a plurality of ferroelect... | 11/03/2009 |
| 7595522 | Nonvolatile semiconductor memory According to the invention, there is provided a nonvolatile semiconductor memory having: a floating gate electrode formed on a gate insulating film on an element region isolated by an element isolation region on a semiconductor sub... | 09/29/2009 |
| 7586141 | High speed memory device with reduced resistance and leakage current A semiconductor device including a semiconductor substrate having a logic formation region in which a memory device is formed and a logic formation region in which a logic device is formed; a first impurity region formed in an upper surface of said semiconductor sub... | 09/08/2009 |
| 7566926 | Nonvolatile semiconductor memory The present invention provides a nonvolatile semiconductor memory that allows simultaneous implementation of high performance transistors in a low-voltage circuit region and transistors with high withstand voltages in a high-voltage circuit region. The nonvolatile s... | 07/28/2009 |
| 7560760 | Ferroelectric memory devices having expanded plate lines A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of row and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferro... | 07/14/2009 |
| 7521746 | Ferroelectric random access memories (FRAMS) having lower electrodes respectively self-aligned to node conductive layer patterns and methods of forming the same A ferroelectric random access memory (FRAM) includes a semiconductor substrate and an interlayer insulating layer on the substrate. A diffusion preventive layer is on the interlayer insulating layer. The diffusion preventive layer and the interlayer insulating layer... | 04/21/2009 |
| 7470947 | Semiconductor memory and fabrication method for the same A semiconductor memory includes memory cell transistors comprising a tunnel insulating film, a floating gate electrode, a first insulating film, a control gate electrode, and a first metal salicide film; low-voltage transistors comprising a first p-type source regio... | 12/30/2008 |
| 7456460 | Phase change memory element and method of making the same Thin-film phase-change memories having small phase-change switching volume formed by overlapping thing films. Exemplary embodiments include a phase-change memory element, including a first phase change layer having a resistance, a second phase change layer having a ... | 11/25/2008 |
| 7442979 | Reduced cell-to-cell shorting for memory arrays Bottom electrodes of memory cell capacitors are recessed to prevent electrical shorts between neighboring memory cells. A partially fabricated memory cell capacitor has a bottom electrode comprising titanium nitride (TiN) and hemispherical grained (HSG) silicon. The... | 10/28/2008 |
| 7439567 | Contactless nonvolatile memory array An array of memory cells with non-volatile memory transistors having a compact arrangement of diagonally symmetric floating gates. The floating gates have portions extending in both X and Y directions, allowing them to be charged through a common tunnel oxide stripe... | 10/21/2008 |
| 7439544 | Structure and manufacturing method of an image TFT array The present invention provides a manufacturing method of an image TFT array, which includes providing a substrate including a thin film transistor region, a storage capacitor region, a pad region, and a common electrode region, forming a photoresist layer on the sub... | 10/21/2008 |
| 7429764 | Signal processing device and image pickup apparatus using the same A signal processing device is provided which is capable of suppressing a voltage change of a power supply when output signals from a plurality of signal sources are read, and capable of outputting a stable signal at a high sensitivity, and an image pickup apparatus ... | 09/30/2008 |
| 7414278 | Semiconductor device with shallow trench isolation which controls mechanical stresses The semiconductor device comprises a semiconductor substrate 10 with a trench 16a and a trench 16b formed in; a device isolation film 32a buried in the trench 16a and including a liner film including a s... | 08/19/2008 |
| 7411238 | Semiconductor integrated circuit device and a method of manufacturing the same In order to improve the soft error resistance of a memory cell of an SRAM without increasing its chip size in deep through-holes formed by perforating a silicon oxide film, there is a silicon nitride film and a silicon oxide film, a capacitor element having a TIN fi... | 08/12/2008 |
| 7411239 | Nand flash memory devices and methods of fabricating the same A NAND includes a device isolation pattern disposed in a region of a substrate defining a plurality of active regions. Memory transistors having memory gate patterns, constituting a cell string, cross the plurality of active regions. Select transistors are disposed ... | 08/12/2008 |
| 7402851 | Phase changeable memory devices including nitrogen and/or silicon and methods for fabricating the same Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that may include nitrogen atoms and/or silicon atoms. First and second electrodes a... | 07/22/2008 |
