Famous Patents
In 1608, Dutch eyeglass maker Hans Lipperhey filed the first patent for a working telescope. The patent was denied.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 4214252 | Semiconductor device having a MOS-capacitor A semiconductor element having a MOS-capacitor between a zone provided in an epitaxial layer on a substrate and a conductive layer on an insulating layer above the zone. The stray capacitance between the zone and the substrate of the opposite conductivity... | 07/22/1980 |
| 4208670 | One-transistor storage element and a process for the production thereof A one-transistor storage element system and a method for producing the same is disclosed wherein each storage element has a sselector field effect transistor and a storage capacitor. A doped semiconductor layer is provided having an oppositely doped bit l... | 06/17/1980 |
| 4206471 | Semiconductor storage element and a process for the production thereof A semiconductor storage element is disclosed having a storage capacitor whose storage electrode is arranged above a doped semiconductor layer. The storage electrode is formed of a portion of a strip-like reference potential line which is separated from th... | 06/03/1980 |
| 4194283 | Process for the production of a single transistor memory cell In the production of V-MOS single transistor memory cells a simplification of the previous technology is disclosed wherein a process is utilized without epitaxial processes and with a minimum of doping processes. First the source and the drain zone of a f... | 03/25/1980 |
| 4190854 | Trim structure for integrated capacitors A capacitor suitable for integration into a monolithic integrated circuit is fabricated in two parallel connected sections. One section, using a thin oxide, constitutes most of the capacitance. A second section fabricated on a thick oxide constitutes a sm... | 02/26/1980 |
| 4188671 | Switched-capacitor memory A memory cell comprising a single transistor and an associated capacitor constitutes the basic building block of a new and improved random-access-memory array. If, for example, the GIMIC-O technology is used for fabricating the cell, it is possible to ach... | 02/12/1980 |
| 4184124 | Operational amplifier An operational amplifier wherein each of the active elements is comprised of complimentary coupled pairs of insulated gate type field effect transistors is provided. A first active stage and a second active stage are coupled together to perform a predeter... | 01/15/1980 |
| 4167018 | MIS capacitance element A MIS capacitance element formed in a semiconductor substrate of p-(or n-) conductivity type comprises an n- (or p-) type well region formed in one principal surface of the semiconductor substrate and a polycrystalline region formed on the surface of the ... | 09/04/1979 |
| 4160987 | Field effect transistors with polycrystalline silicon gate self-aligned to both conductive and non-conductive regions and fabrication of integrated circuits containing the transistors A field effect transistor (FET) with a unique gate structure is disclosed wherein the polycrystalline silicon (polysilicon) gate is self-aligned on its ends with respect to the conductive source and drain regions, and is self-aligned on its sides with res... | 07/10/1979 |
| 4156939 | Integrated semiconductor memory device An integrated semiconductor memory device is formed on a semiconductor substrate of one conductivity type on which there are provided peripheral circuits consisting of a pluality of memory cells each containing a storage capacitor and an IG FET. The IG FE... | 05/29/1979 |
| 4156289 | Semiconductor memory A semiconductor memory has at least one V-MOS transistor which includes a trench and a storage capacitor. A semiconductor substrate is doped with concentration centers of a first conductivity type and has a buried layer which is doped with concentration c... | 05/22/1979 |
| 4152779 | MOS ram cell having improved refresh time In a microelectronic, metal-oxide-semiconductor dynamic random access memory cell having an MOS capacitance signal storage region, leakage current has been found to have a critical dependence upon the voltage level at which the storage gate is operated (V... | 05/01/1979 |
| 4151607 | Semiconductor memory device A semiconductor memory device consisting of a storage capacitance and an insulated gate field-effect transistor, wherein over a first conductive substance which lies in contact with a source of drain region constituting the transistor and which becomes a ... | 04/24/1979 |
| 4151610 | High density semiconductor memory device formed in a well and having more than one capacitor A semiconductor memory device comprising an N conductivity type semiconductor substrate, a P conductivity type well formed in a specified section of the surface of the semiconductor substrate, N conductivity type source and drain regions formed in the P c... | 04/24/1979 |
| 4143393 | High field capacitor structure employing a carrier trapping region A high field capacitor structure includes an insulating layer having a carrier trapping region between two electrodes. The trapping region improves electric breakdown characteristics of the capacitor structure and is particularly useful in avoiding the lo... | 03/06/1979 |
| 4135289 | Method for producing a buried junction memory device A method for making a metal oxide semiconductor field effect transistor (MOSFET) is disclosed that results in a semiconductor device structure in which the source and drain regions are buried in the structure beneath a typically thick oxide and bulge out ... | 01/23/1979 |
| 4131906 | Dynamic random access memory using MOS FETs and method for manufacturing same A dynamic Random Access Memory consisting of pairs of adjacent one transistor/one capacitor memory cells. The gate electrodes of the MOS FETs in each pair of adjacent memory cells are coupled and further connected to an address line at only a single conta... | 12/26/1978 |
| 4129887 | Solid stage imaging apparatus Relates to apparatus incorporating a two-dimensional array of image sensing devices arranged in rows and columns onto which a two-dimensional pattern of radiation having rows and columns of elements is scanned in the column direction. For each scan of a r... | 12/12/1978 |
| 4126900 | Random access junction field-effect floating gate transistor memory JFET memory structures, in particular for RAM's with non-destructive reading-out of the charge state of a floating gate electrode in which the primary selection is realized by means of capacitive coupling with the floating gate electrode. The secondary se... | 11/21/1978 |
| 4125933 | IGFET Integrated circuit memory cell An IGFET integrated circuit memory cell structure utilizing a capacitor with increased charge storage capability, and a method making the same. The capacitor includes a high impurity concentration region having the same conductivity type as the substrate.... | 11/21/1978 |
| 4116720 | Method of making a V-MOS field effect transistor for a dynamic memory cell having improved capacitance This disclosure relates to a method of making a V-MOS field effect transistor which does not require the extra steps of epitaxial growth in order to form the source area of the transistor. The formation of the source area is achieved by masking the silico... | 09/26/1978 |
| 4115871 | MOS random memory array This disclosure relates to an MOS random access memory array which utilizes a very small memory cell having a single MOS device and a small size, high capacitance, semiconductor capacitor device connected together to form one bit or memory cell of an MOS ... | 09/19/1978 |
| 4112575 | Fabrication methods for the high capacity ram cell Disclosed is a process for constructing an array of memory cells. Each cell is constructed to have a high storage capacity and low leakage current. The cells are formed on a surface of a semiconductor substrate. Each cell has a storage region and an adjac... | 09/12/1978 |
| 4105475 | Epitaxial method of fabricating single IGFET memory cell with buried storage element A semiconductor read/write memory comprised of an array of cells, each having a single active element that is a IGFET device formed in a recess with one source or drain region located directly above and its other source or drain region located within a bu... | 08/08/1978 |
| 4094057 | Field effect transistor lost film fabrication process This describes a process for fabricating transistor memory cell arrays which includes forming a thin oxide which is continuous over the entire area and which is continuously protected from the time it is deposited so that subsequent processing steps will ... | 06/13/1978 |
| 4084108 | Integrated circuit device A semiconductor integrated circuit 3 transistor/bit cell includes two MOS transistors having superposed and insulated gate electrodes overlying the substrate at the portion between the diffused regions, so that the memory can be fabricated in a reduced ar... | 04/11/1978 |
| 4080590 | Capacitor storage memory A semiconductor memory produced in a unipolar technology includes a cell which has an inversion capacitor with one terminal connected to a bit/sense line, the other terminal is coupled to a source of charges by a pulse from a word line. To provide a word ... | 03/21/1978 |
| 4075045 | Method for fabricating FET one-device memory cells with two layers of polycrystalline silicon and fabrication of integrated circuits containing arrays of the memory cells charge storage capacitors utilizing five basic pattern deliberating steps Fabricating an integrated circuit array of FET one-device memory cells which includes providing a semiconductive substrate of a first conductive type; delineating field insulation regions; delineating polycrystalline silicon gate regions employing an oxid... | 02/21/1978 |
| 4047091 | Capacitive voltage multiplier A voltage multiplier in which an n-phase circuit charges n-1 capacitors during the separate phases, then during the last or nth phase the capacitors are put in series to create n times the input voltage. MOS transistor devices are used to act as switches ... | 09/06/1977 |
| 4041474 | Memory matrix controller A device including a memory matrix comprising memory cells provided at crossings of rows and columns, wherein on selection of a given row of the matrix, selection means enable a memory element associated with a further row to be selected. The selection me... | 08/09/1977 |
| 4034239 | Capacitance memories operated with intermittently-energized integrated circuits Capacitance memories operated with intermittently-energized monolithic integrated circuits tend to lose information during periods between the spaced intervals the integrated-circuits are energized. This tendency, attributable to sneak conduction paths in... | 07/05/1977 |
| 4032947 | Controllable charge-coupled semiconductor device A charge-coupled device comprising a plurality of rows and columns of capacitively coupled electrodes are provided in which information can be read in by applying signals to certain of the electrodes and storing them in discrete individual elements of the... | 06/28/1977 |
| 4024626 | Method of making integrated transistor matrix for flat panel liquid crystal display Substantial advantages over existing integrated transistorized matrices for driving flat panel liquid crystal displays may be achieved by the use of silicon on sapphire (SOS) and related technologies. Among the advantages are good isolation to prevent cro... | 05/24/1977 |
| 4024562 | Radiation sensing and charge storage devices An array of radiation sensing devices, each including a pair of conductor-insulator-semiconductor capacitors, arranged in rows and columns in which the row stripes or lines form row connected capacitors in relation to selected surface regions of a semicon... | 05/17/1977 |
| 4021788 | Capacitor memory cell A dynamic capacitive memory cell having a storage node formed at the common junction of a fixed access capacitor and two MOS voltage variable capacitors. Data represented in the form of stored charge is written into the storage node through the fixed acce... | 05/03/1977 |
| 4003034 | Sense amplifier circuit for a random access memory An improved sense amplifier circuit for a Random Access Memory (RAM) having 1-transistor memory cells which is completely dynamic in that it does not dissipate D.C. power during operation and is suitable for location at one end of a memory cell array. The... | 01/11/1977 |
| 3986180 | Depletion mode field effect transistor memory system The present invention relates to an integrated memory system comprising an array of depletion mode field effect transistors operated in a common control electrode mode to provide an array with the density of metal oxide semiconductor field effect transist... | 10/12/1976 |
