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Lord Kelvin, British mathematician and physicist ; 1897
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| Number | Title | Issue Date |
| 8188521 | Power semiconductor device A power semiconductor device has semiconductor layers, including: first layer of first type; second and third layers respectively of first and second types alternately on the first layer; fourth layers of second type on the third layers; fifth layers of first type o... | 05/29/2012 |
| 8188522 | Back-illuminated type solid-state imaging device A back-illuminated type solid-state imaging device including (a) a semiconductor layer on a front surface side of a semiconductor substrate with an insulation film between them; (b) a photoelectric conversion element that constitutes a pixel in the semiconductor sub... | 05/29/2012 |
| 8183606 | Semiconductor device and method of manufacturing the same A semiconductor device comprises an insulated gate field effect transistor and a protection diode. The insulated gate field effect transistor has a gate electrode formed on a gate insulating film, a source and a drain. The source and the drain are formed in a first ... | 05/22/2012 |
| 8183607 | Semiconductor device A semiconductor device features a semiconductor chip including a MOSFET, a first electrode of the MOSFET disposed on an obverse surface of the chip, a second, control electrode of the MOSFET disposed on the obverse surface, a third electrode of the MOSFET disposed o... | 05/22/2012 |
| 8174058 | Integrated circuits with split gate and common gate FinFET transistors An integrated circuit includes common gate FinFET and split gate FinFET devices formed from different height fins at a semiconductor surface of a substrate. A patterned layer of gate electrode material formed over sides and unconnected over the tops of the taller fi... | 05/08/2012 |
| 8169009 | Semiconductor device A semiconductor device includes N fins made of semiconductor regions aligned in parallel with each other in the top view plain, a gate electrode formed on both side surfaces of each of the N fins to cross the fins, source/drain layers formed in each of the N fins by... | 05/01/2012 |
| 8164124 | Photodiode with multi-epi films for image sensor The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate; a first epitaxy semiconductor layer disposed on the semiconductor substrate and having a first type of dopant and a first doping concen... | 04/24/2012 |
| 8164125 | Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit A semiconductor device includes an N type well region in a P type substrate. A source region of a MOSFET is laterally separated from a boundary of the well region, which includes the drain of the MOSFET. An insulated gate of the MOSFET extends laterally from the sou... | 04/24/2012 |
| 8159009 | Semiconductor device having strain material A semiconductor device having strain material is disclosed. In a particular embodiment, the semiconductor device includes a first cell including a first gate between a first drain and a first source. The semiconductor device also includes a second cell adjacent to t... | 04/17/2012 |
| 8134189 | Semiconductor device and method of manufacturing the same Aimed at providing a highly reliable semiconductor device appropriately increased in stress at the channel region so as to improve carrier injection rate, thereby dramatically improved in transistor characteristics, and made adaptable also to recent narrower channel... | 03/13/2012 |
| 8129763 | Metal-oxide-semiconductor device including a multiple-layer energy filter A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the device between the first and second source/drains and proximate the chann... | 03/06/2012 |
| 8125009 | Mounting circuit substrate A semiconductor package containing a field effect transistor (FET) used in a high frequency band includes a mounting circuit substrate on which the semiconductor device is mounted. The mounting circuit substrate has a gate wiring conductor, a drain wiring conductor,... | 02/28/2012 |
| 8120074 | Bipolar semiconductor device and manufacturing method A bipolar semiconductor device with a hole current redistributing structure and an n-channel IGBT are provided. The n-channel IGBT has a p-doped body region with a first hole mobility and a sub region which is completely embedded within the body region and has a sec... | 02/21/2012 |
| 8120075 | Semiconductor device with improved trenches A semiconductor device exhibiting enhanced carrier mobility within a channel region of the semiconductor device is disclosed. The semiconductor device includes a gate stack having first and second sidewall spacers, where the gate stack is implemented above the chann... | 02/21/2012 |
| 8120073 | Trigate transistor having extended metal gate electrode A trigate device having an extended metal gate electrode comprises a semiconductor body having a top surface and opposing sidewalls formed on a substrate, an isolation layer formed on the substrate and around the semiconductor body, wherein a portion of the semicond... | 02/21/2012 |
| 8110858 | Thin film transistor array, method for manufacturing the same, and active matrix type display using the same One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present i... | 02/07/2012 |
| 8106430 | Preparation of thin film transistors (TFTs) or radio frequency identification (RFID) tags or other printable electronics using ink-jet printer and carbon nanotube inks The invented ink-jet printing method for the construction of thin film transistors using all SWNTs on flexible plastic films is a new process. This method is more practical than all of existing printing methods in the construction TFT and RFID tags because SWNTs hav... | 01/31/2012 |
| 8101980 | Graphene device and method of manufacturing the same Provided is a graphene device and a method of manufacturing the same. The graphene device may include an upper oxide layer on at least one embedded gate, and a graphene channel and a plurality of electrodes on the upper oxide layer. The at least one embedded gate ma... | 01/24/2012 |
| 8093634 | In situ formed drain and source regions in a silicon/germanium containing transistor device By repeatedly applying a process sequence comprising an etch process and a selective epitaxial growth process during the formation of drain and source areas in a transistor device, highly complex dopant profiles may be generated on the basis of in situ doping. Furth... | 01/10/2012 |
| 8084795 | Resonant cavity complementary optoelectronic transistors The CMOS field effect transistors, used in microprocessors and other digital VLSI circuits, face major challenges such as thin gate dielectrics leakage and scaling limits, severe short channel effects, limited performance improvement with scaling, complicated fabric... | 12/27/2011 |
| 8080838 | Contact scheme for FINFET structures with multiple FINs A FINFET-containing structure having multiple FINs that are merged together without source/drain contact pads or a local interconnect is provided. The structure includes a plurality of semiconducting bodies (i.e., FINs) which extend above a surface of a substrate. A... | 12/20/2011 |
| 8080837 | Memory devices, transistors, and memory cells A memory device includes an array of memory cells and peripheral devices. At least some of the individual memory cells include carbonated portions that contain SiC. At least some of the peripheral devices do not include any carbonated portions. A transistor includes... | 12/20/2011 |
| 8080839 | Electro-mechanical transistor An electro-mechanical transistor includes a source electrode and a drain electrode spaced apart from each other. A source pillar is between the substrate and the source electrode. A drain pillar is between the substrate and the drain electrode. A moveable channel is... | 12/20/2011 |
| 8076702 | CMOS image sensor and fabricating method thereof A CMOS image sensor and fabricating method thereof by which capacitance of a floating diffusion region (FD) can be increased. The CMOS image sensor can include an epitaxial layer formed over a semiconductor substrate; a gate electrode formed over the epitaxial layer... | 12/13/2011 |
| 8076703 | Semiconductor device and methods for fabricating same A semiconductor device is provided which includes a substrate including an inactive region and an active region, a gate electrode structure having portions overlying the active region, a compressive layer overlying the active region, and a tensile layer overlying th... | 12/13/2011 |
| 8072014 | Polarity dependent switch for resistive sense memory A memory unit includes a resistive sense memory cell configured to switch between a high resistance state and a low resistance state upon passing a current through the resistive sense memory cell and a semiconductor transistor in electrical connection with the resis... | 12/06/2011 |
| 8072013 | Trench polysilicon diode Embodiments of the present invention include a method of manufacturing a trench transistor. The method includes forming a substrate of a first conductivity type and implanting a dopant of a second conductivity type, forming a body region of the substrate. The method... | 12/06/2011 |
| 8072012 | Tunnel effect transistors based on elongate monocrystalline nanostructures having a heterostructure Tunnel field-effect transistors (TFETs) are regarded as successors of metal-oxide semiconductor field-effect transistors (MOSFETs), but silicon-based TFETs typically suffer from low on-currents, a drawback related to the large resistance of the tunnel barrier. To ac... | 12/06/2011 |
| 8067791 | Semiconductor device and method for fabricating the same A semiconductor device formed by the steps of: forming a dummy electrode 22n and a dummy electrode 22p; forming a metal film 32 on the dummy electrode 22p; conducting a thermal treatment at a first temperature to subs... | 11/29/2011 |
| 8053820 | Semiconductor device and method of manufacturing the same A semiconductor device has a first conductivity type semiconductor substrate, a second conductivity type buried layer formed in a predetermined region on the semiconductor substrate, and a first conductivity type epitaxial growth layer formed on the buried layer and... | 11/08/2011 |
| 8049254 | Semiconductor device with gate-undercutting recessed region A semiconductor device comprises a gate structure on a semiconductor substrate and a recessed region in the semiconductor substrate. The recessed region has a widest lateral opening that is near a top surface of the semiconductor substrate. The widest lateral openin... | 11/01/2011 |
| 8049253 | Semiconductor device and method for manufacturing the same A semiconductor device and a method for manufacturing a semiconductor device are provided. A semiconductor device comprises a first single-crystal semiconductor layer including a first channel formation region and a first impurity region over a substrate having an i... | 11/01/2011 |
| 8035141 | Bi-layer nFET embedded stressor element and integration to enhance drive current A semiconductor structure including a bi-layer nFET embedded stressor element is disclosed. The bi-layer nFET embedded stressor element can be integrated into any CMOS process flow. The bi-layer nFET embedded stressor element includes an implant damaged free first l... | 10/11/2011 |
| 8035140 | Method and layout of semiconductor device with reduced parasitics An semiconductor device is disclosed. The device includes a semiconductor body, a layer of insulating material disposed over the semiconductor body, and a region of gate electrode material disposed over the layer of insulating material. Also included are a source re... | 10/11/2011 |
| 8026539 | Metal oxide semiconductor devices having doped silicon-compromising capping layers and methods for fabricating the same Methods are provided for forming a semiconductor device comprising a semiconductor substrate. In accordance with an exemplary embodiment, a method comprises the steps of forming a high-k dielectric layer overlying the semiconductor substrate, forming a metal-compris... | 09/27/2011 |
| 8022446 | Integrated Schottky diode and power MOSFET A semiconductor structure includes a semiconductor substrate; a first well region of a first conductivity type in the semiconductor substrate; a metal-containing layer on the first well region, wherein the metal-containing layer and the first well region form a Scho... | 09/20/2011 |
| 8022447 | Metal-oxide-semiconductor device including an energy filter A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the device between the first and second source/drains and proximate the chann... | 09/20/2011 |
| 8022448 | Apparatus and methods for evaporation including test wafer holder Apparatus and methods for evaporating metal onto semiconductor wafers are disclosed. One such apparatus can include an evaporation chamber that includes a wafer holder, such as a dome, and a test wafer holder that is separate and spaced apart from the wafer holder. ... | 09/20/2011 |
| 8013367 | Structure and method for compact long-channel FETs A compact semiconductor structure including at least one FET located upon and within a surface of a semiconductor substrate in which the at least one FET includes a long channel length and/or a wide channel width and a method of fabricating the same are provided. In... | 09/06/2011 |
| 8013368 | Replacement gates to enhance transistor strain Some embodiments of the present invention include apparatuses and methods relating to NMOS and PMOS transistor strain. ... | 09/06/2011 |