Class 257/281 - Schottky gate to silicon semiconductor

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein the semiconductor material contacting
No. of patents: 107
Last issue date: 02/28/2012

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Number	Title	Issue Date
8125008	Schottky device and process of making the same comprising a geometry gap A Schottky device and a semiconductor process of making the same are provided. The Schottky device comprises a substrate, a deep well, a Schottky contact, and an Ohmic contact. The substrate is doped with a first type of ions. The deep well is doped with a second ty...	02/28/2012
7939865	Metal semiconductor field effect transistor (MESFET) silicon-on-insulator structure having partial trench spacers In one embodiment, a metal-semiconductor field effect transistor (MESFET) comprises a first silicon layer, an insulator layer formed on the first silicon layer, and a second silicon layer formed on the insulator layer. A gate region, a source region, and a drain reg...	05/10/2011
7777257	Bipolar Schottky diode and method A low leakage bipolar Schottky diode (20, 40, 87) is formed by parallel lightly doped N (32, 52, 103) and P (22, 42, 100) regions adapted to form superjunction regions. First ends of the P regions (22, 42, 100) are terminated by P+ layers...	08/17/2010
7547932	Vertical gate-depleted single electron transistor A vertical gate-depleted single electron transistor (SET) is fabricated on a conducting or insulating substrate. A plurality of lightly doped basic materials and tunneling barriers are fabricated on top of a substrate, wherein at least two of the layers of basic mat...	06/16/2009
7432179	Controlling gate formation by removing dummy gate structures A method of forming semiconductor structures comprises following steps. A gate dielectric layer is formed over a substrate in an active region. A gate electrode layer is formed over the gate dielectric layer. A first photo resist is formed over the gate electrode la...	10/07/2008
7345350	Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias A method for forming a conductive via in a semiconductor component is disclosed. The method includes providing a substrate having a first surface and an opposing, second surface. At least one hole is formed in the substrate extending between the first surface and th...	03/18/2008
7342307	Semiconductor device A semiconductor device includes: a package; two semiconductor chip fixing parts located adjacently to each other in the package; and first and the second semiconductor chips, each of which is fixed on the semiconductor chip fixing part and has a field effect transis...	03/11/2008
7332754	Semiconductor switch In the semiconductor switch of the present invention, the gate electrode, source electrode and drain electrode are formed such that the distance between the gate and the drain of an MESFET, assuming a shunt FET, is longer than the distance between the gate and the d...	02/19/2008
7250643	Semiconductor device and method of manufacturing the same A semiconductor device includes: a gate electrode that is provided on a semiconductor layer; a source electrode and a drain electrode that are provided on the semiconductor layer so as to interpose the gate electrode; a source wall that extends from the source elect...	07/31/2007
7202528	Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single-or multi-chip wide bandgap power...	04/10/2007
7183573	Disposable spacer for symmetric and asymmetric Schottky contact to SOI mosfet A silicon on insulator transistor is disclosed which has a Schottky contact to the body. The Schottky contact may be formed on the source and/or drain side of the gate conductor. A spacer, with at least a part thereof being disposable, is formed on the sidewalls of ...	02/27/2007
7173333	Semiconductor device A semiconductor device includes: a package; two semiconductor chip fixing parts located adjacently to each other in the package; and first and the second semiconductor chips, each of which is fixed on the semiconductor chip fixing part and has a field effect transis...	02/06/2007
7138318	Method of fabricating body-tied SOI transistor having halo implant region underlying hammerhead portion of gate A method for fabricating a body-tied SOI transistor with reduced body resistance is presented. During the wafer fabrication process, a semiconductor wafer is placed in an ion implantation device and oriented to a first position relative to a beam path of the ion imp...	11/21/2006
7101745	Method of forming ladder-type gate structure for four-terminal SOI semiconductor device A ladder-type gate structure for a silicon-on-insulator (SOI) four-terminal semiconductor device is disclosed. The structure includes a gate having a first and second portion, a body region, which is under the first portion of the gate, a body contact, which is adja...	09/05/2006
7084475	Lateral conduction Schottky diode with plural mesas A lateral conduction Schottky diode includes multiple mesa regions upon which Schottky contacts are formed and which are at least separated by ohmic contacts to reduce the current path length and reduce current crowding in the Schottky contact, thereby reducing the ...	08/01/2006
7023027	Diode package having an anode and a cathode formed on one surface of a diode chip A small semiconductor package having two electrodes, which can be produced at reduced cost and which features high reliability. The package has a structure in which an anode and a cathode are arranged on one surface of a semiconductor chip, each electrode having a b...	04/04/2006
6953955	InGaAs/GaAs high electron mobility transistor An InGaAs/GaAs High Electron Mobility Transistor (HEMT) comprises a buffer layer, a main conducting channel, an InGaAs/GaAs thickness-graded superlattice structure, a mono atom δ-doped carrier supply layer, a Schottky cap layer of gate electrode and an Ohmic cap la...	10/11/2005
6940130	Body contact MOSFET A body contact structure utilizing an insulating structure between the body contact portion of the active area and the transistor portion of the active area is disclosed. In one embodiment, the present invention substitutes an insulator for at least a portion of the...	09/06/2005
6929987	Microelectronic device fabrication method In a method of forming a semiconductor device with a first channel layer formed over a portion of a second channel layer, a portion of the second channel underlying the first channel is etched so as to form an overhanging ledge in the first channel, and then a metal...	08/16/2005
6919606	Semiconductor device comprising an insulating mask formed on parts of a gate electrode and semiconductor layer crossing an active region A semiconductor device includes a semiconductor layer of a first conductive type formed in an active region, a first gate electrode formed on the semiconductor layer via a gate insulating film in a predetermined pattern, a first insulating mask formed on at least a ...	07/19/2005
6900483	Semiconductor device and method for manufacturing the same A Schottky diode includes a semiconductor substrate made of 4H—SiC, an epitaxially grown 4H—SiC layer, an ion implantation layer, a Schottky electrode, an ohmic electrode, and an insulative layer made of a thermal oxide film. The Schottky electrode and the insul...	05/31/2005
6876034	Semiconductor device having active grooves A semiconductor device having grooves uniformly filled with semiconductor fillers is provided. Both ends of each of narrow active grooves are connected to an inner circumferential groove surrounding the active grooves. The growth speed of semiconductor fillers on bo...	04/05/2005
6770902	Charge carrier extracting transistor An extracting transistor (10)—an FET—includes a conducting channel extending via a p-type InSb quantum well (22) between p-type InAlSb layers (20, 24) of wider band-gap. One of the InAlSb layers (24) incorporates an ultra-thin n-type ...	08/03/2004
6768146	III-V nitride semiconductor device, and protection element and power conversion apparatus using the same A GaN-based Schottky diode includes a sapphire substrate on which are formed a GaN buffer layer, an n+-type GaN layer, and an n-type GaN layer that has a surface portion thereof shaped to form a protrusion having an upper face with which a Ti electrode fo...	07/27/2004
6690040	Vertical replacement-gate junction field-effect transistor A vertical JFET architecture. Generally, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and a first source/drain doped region formed in the surface. A second doped region forming a channel of differ...	02/10/2004
6642552	Inductive storage capacitor A device includes an element (e.g. in the shape of a sleeve) and a core located in an interior volume defined by the element and at least partially surrounded by the element. The element has two portions: one portion overlaps at least a region of the core...	11/04/2003
6603159	System and methods for manufacturing and using a mask The present invention provides a mask for use in forming a thin-layer pattern of an organic electroluminescence element having high-precision pixels. The mask is manufactured by wet-etching a (100) silicon wafer (single crystal silicon substrate) in a cry...	08/05/2003
6580107	Compound semiconductor device with depletion layer stop region The conventional compound semiconductor switching device is prone to have a large chip size as the gate width needs to be large for achieving a low insertion loss and the separation between the connecting pad and the circuit wiring needs to be larger than...	06/17/2003
6573529	Semiconductor switching device A semiconductor switching device includes two FETs with different device characteristics, a common input terminal, and two output terminals. A signal transmitting FET has a gate width of 500 μm and a signal receiving FET has a gate width of 400 μm. A re...	06/03/2003
6541768	Multiple sample introduction mass spectrometry Multiple sample introduction means have been configured in Atmospheric Pressure Ion sources which are interfaced to mass analyzers. Different samples can be introduced through multiple Electrospray (ES) or Atmospheric Pressure Chemical Ionization (APCI) p...	04/01/2003
6538273	Ferroelectric transistor and method for fabricating it A ferroelectric transistor is disclosed which has two source/drain regions and a channel region disposed in between in a semiconductor substrate. A metallic intermediate layer is disposed on the surface of the channel region and forms a Schottky diode wit...	03/25/2003
6498381	Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same In some embodiments, a circuit structure comprises a semiconductor substrate, an opening passing through the substrate between a first side of the substrate and a second side of the substrate, and a plurality of conductive layers in the opening. In some e...	12/24/2002
6492669	Semiconductor device with schottky electrode having high schottky barrier A carrier travel layer is formed on the substrate of a semiconductor device with a buffer layer interposed, and a spacer layer and carrier supply layer are then formed on this carrier travel layer. On the carrier supply layer are provided a source electro...	12/10/2002
6452221	Enhancement mode device An enhancement mode FET device (10) that employs a strained N-doped InAlAs charge shield layer (22) disposed on an intrinsic InAlAs barrier layer (20). A gate metal electrode (38) of the FET device (10) is controllably diffused through a recess (36) into ...	09/17/2002
6410951	Structure for improving static refresh A double blanket ion implant method for forming diffusion regions in memory array devices, such as a MOSFET access device is disclosed. The method provides a semiconductor substrate with a gate structure formed on its surface. Next, a first pair of diffus...	06/25/2002
6373081	Field effect transistor and method of fabricating the same A field effect transistor includes (a) a semi-insulating GaAs substrate, (b) a step-doped structured active layer including an n type GaAs layer deposited on the substrate, and an n- type GaAs layer or a non-doped GaAs layer deposited on the n ...	04/16/2002
6303947	Silicon carbide vertical FET and method for manufacturing the same A silicon carbide vertical field-effect transistor is provided wherein a first conductivity type drift layer formed of silicon carbide is laminated on a first conductivity type silicon carbide drain layer, and a second conductivity type gate region and a ...	10/16/2001
6262468	Inductor formed at least partially in a substrate A method of making an inductor and the inductor. The inductor comprises a plurality of serially connected transistors at least partially formed in a substrate, preferably a silicon on insulator substrate, and comprises a gate common to the plurality of tr...	07/17/2001
6235626	Method of forming a gate electrode using an insulating film with an opening pattern The present invention provides a method of forming a gate recess in an insulating film on a substrate for depositing a gate electrode film being in contact with a part of the substrate and also extending at least within the gate recess. The method compris...	05/22/2001
6218222	Method of manufacturing a semiconductor device with a schottky junction Devices with Schottky junctions are manufactured in that a semiconductor body with a substrate is provided with a first, for example n-type semiconductor region in the form of an epitaxial layer. A Schottky metal is locally provided thereon. A second semi...	04/17/2001

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Class 257/281 - Schottky gate to silicon semiconductor