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| Number | Title | Issue Date |
| 8169008 | Semiconductor device The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 com... | 05/01/2012 |
| 8120072 | JFET devices with increased barrier height and methods of making same Devices and methods for providing JFET transistors with improved operating characteristics are provided. Specifically, one or more embodiments of the present invention relate to JFET transistors with a higher diode turn-on voltage. For example, one or more embodimen... | 02/21/2012 |
| 8063420 | Field-effect transistor and method of manufacturing the same A field-effect transistor with improved moisture resistance without an increase in gate capacitance, and a method of manufacturing the field-effect transistor are provided. The field-effect transistor includes: a T-shaped gate electrode on a semiconductor layer; and... | 11/22/2011 |
| 7943972 | Methods of fabricating transistors having buried P-type layers coupled to the gate A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The MESFET has a source, a drain and a gate. The gate is between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath... | 05/17/2011 |
| 7928480 | Semiconductor device A semiconductor device has a semiconductor layer, and a first electrode (Schottky electrode or MIS electrode) and a second electrode (ohmic electrode) which are formed on the semiconductor layer apart from each other. The first electrode has a cross section in the s... | 04/19/2011 |
| 7893467 | Silicon carbide semiconductor device having junction barrier Schottky diode A silicon carbide semiconductor device includes a substrate; a drift layer having a first conductivity type; an insulating layer; a Schottky electrode; an ohmic electrode; a resurf layer; and second conductivity type layers. The drift layer and the second conductivi... | 02/22/2011 |
| 7851831 | Transistor A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. ... | 12/14/2010 |
| 7838914 | Semiconductor device The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 com... | 11/23/2010 |
| 7737476 | Metal-semiconductor field effect transistors (MESFETs) having self-aligned structures Metal-semiconductor field-effect transistors (MESFETS) are provided. A MESFET is provided having a source region, a drain region and a gate. The gate is between the source region and the drain region. A p-type conductivity layer is provided beneath the source region... | 06/15/2010 |
| 7723761 | Tiered gate structure devices In one embodiment, a tiered gate structure is provided having a substrate including a source, a drain and a gate thereon. The gate includes an elongated gate foot having a first deposition gate material extending from the substrate, the elongated gate foot having a ... | 05/25/2010 |
| 7646043 | Transistors having buried p-type layers coupled to the gate A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The MESFET has a source, a drain and a gate. The gate is between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath... | 01/12/2010 |
| 7612394 | Thin film transistor array substrate A thin film transistor array (TFT) substrate and a method for manufacturing the same are provided. The manufacturing method needs only or even less than six mask processes for manufacturing the TFT array substrate integrated with a color filter pattern. Therefore, t... | 11/03/2009 |
| 7598548 | Semiconductor device and field-effect transistor A Schottky electrode including a WNx layer on an n-type GaN layer. A crystal plane of the n-type GaN layer is in contact with a crystal plane of the WNx layer. The crystal plane of the n-type GaN layer is a (0001)-plane, and the crystal plane of the WNx layer is (11... | 10/06/2009 |
| 7411226 | High electron mobility transistor (HEMT) structure with refractory gate metal An InP high electron mobility transistor (HEMT) structure in which a gate metal stack includes an additional thin layer of a refractory metal, such as molybdenum (Mo) or platinum (Pt) at a junction between the gate metal stack and a Schottky barrier layer in the HEM... | 08/12/2008 |
| 7394112 | Heterostructure with rear-face donor doping The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar ma... | 07/01/2008 |
| 7361518 | Semiconductor element, semiconductor device, and method for fabrication thereof A nitride semiconductor growth layer is laid on a substrate having an engraved region provided with a depressed portion. ... | 04/22/2008 |
| 7352008 | Heterostructure with rear-face donor doping The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar ma... | 04/01/2008 |
| 7348612 | Metal-semiconductor field effect transistors (MESFETs) having drains coupled to the substrate and methods of fabricating the same The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a MESFET having a source region, a drain region and a gate contact. The gate contact is disposed between the source region and ... | 03/25/2008 |
| 7345350 | Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias A method for forming a conductive via in a semiconductor component is disclosed. The method includes providing a substrate having a first surface and an opposing, second surface. At least one hole is formed in the substrate extending between the first surface and th... | 03/18/2008 |
| 7339444 | Methods for providing bias to a monolithic microwave integrated circuit In general, in accordance with an exemplary aspect of the present invention, a method is provided for providing DC bias to an MMIC power amplifier, the method comprising the steps of: attaching a first end of a bond wire directly to a matching structure; and, attach... | 03/04/2008 |
| 7339273 | Semiconductor device with a via hole having a diameter at the surface larger than a width of a pad electrode The invention is directed to a semiconductor device having a penetrating electrode and a manufacturing method thereof in which reliability and a yield of the semiconductor device are enhanced. A semiconductor substrate is etched to form a via hole from a back surfac... | 03/04/2008 |
| 7332754 | Semiconductor switch In the semiconductor switch of the present invention, the gate electrode, source electrode and drain electrode are formed such that the distance between the gate and the drain of an MESFET, assuming a shunt FET, is longer than the distance between the gate and the d... | 02/19/2008 |
| 7326962 | Transistors having buried N-type and P-type regions beneath the source region and methods of fabricating the same The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a source, a drain and a gate. The gate is disposed between the source and the drain and on an n-type conductivity channel layer... | 02/05/2008 |
| 7307298 | Semiconductor device The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 com... | 12/11/2007 |
| 7304337 | Semiconductor device A semiconductor device includes: a semiconductor element provided on a semiconductor layer; a light-blocking wall provided around the semiconductor element; and a wiring layer electrically coupled to the semiconductor element and extended from an aperture not having... | 12/04/2007 |
| 7304329 | Field effect transistor A field effect transistor includes a semiconductor substrate having an active region, a source region, and a drain region at an upper portion of the substrate. The active region is located between the source and drain regions. A gate electrode is located on the acti... | 12/04/2007 |
| 7297580 | Methods of fabricating transistors having buried p-type layers beneath the source region The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a source, a drain and a gate. The gate is disposed between the source and the drain and on an n-type conductivity channel layer... | 11/20/2007 |
| 7294900 | Compound semiconductor device and manufacturing method thereof A pad electrode of a field effect transistor is formed solely of a pad metal layer without providing a gate metal layer. A high concentration impurity region is provided below the pad electrode, and the pad electrode is directly contacted to a substrate. Predetermin... | 11/13/2007 |
| 7250666 | Schottky barrier diode and method of forming a Schottky barrier diode Disclosed is a silicon-on-insulator-based Schottky barrier diode with a low forward voltage that can be manufactured according to standard SOI process flow. An active silicon island is formed using an SOI wafer. One area of the island is heavily-doped with an n-type... | 07/31/2007 |
| 7250643 | Semiconductor device and method of manufacturing the same A semiconductor device includes: a gate electrode that is provided on a semiconductor layer; a source electrode and a drain electrode that are provided on the semiconductor layer so as to interpose the gate electrode; a source wall that extends from the source elect... | 07/31/2007 |
| 7245018 | Wiring material, semiconductor device provided with a wiring using the wiring material and method of manufacturing thereof A semiconductor device having good TFT characteristics is realized. By using a high purity target as a target, using a single gas, argon (Ar), as a sputtering gas, setting the substrate temperature equal to or less than 300° C., and setting the sputtering gas press... | 07/17/2007 |
| 7242040 | Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making, and integrated circuits incorporating the transistors A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel,... | 07/10/2007 |
| 7233028 | Gallium nitride material devices and methods of forming the same The invention provides gallium nitride material devices, structures and methods of forming the same. The devices include a gallium nitride material formed over a substrate, such as silicon. Exemplary devices include light emitting devices (e.g., LED's, lasers), ligh... | 06/19/2007 |
| 7229866 | Non-activated guard ring for semiconductor devices A guard ring is formed in a semiconductor region that is part of a Schottky junction or Schottky diode. The guard ring is formed by ion implantation into the semiconductor contact layer without completely annealing the semiconductor contact layer to form a high resi... | 06/12/2007 |
| 7226822 | Wiring material, semiconductor device provided with a wiring using the wiring material and method of manufacturing thereof By using a high purity target as a target, using a single gas, argon (Ar), as a sputtering gas, setting the substrate temperature at 300° C. or less, setting the sputtering power from 1 kW to 9 kW, and setting the sputtering gas pressure from 1.0 Pa to 3.0 Pa, the ... | 06/05/2007 |
| 7214971 | Semiconductor light-receiving device A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the b... | 05/08/2007 |
| 7208803 | Method of forming a raised source/drain and a semiconductor device employing the same A method of forming a raised source/drain proximate a spacer of a gate of a transistor on a substrate, and a semiconductor device of an integrated circuit employing the same. In one embodiment, the method includes orienting the gate substantially along a direc... | 04/24/2007 |
| 7208785 | Self-aligned Schottky-barrier clamped planar DMOS transistor structure and its manufacturing methods The self-aligned Schottky-barrier clamped planar DMOS transistor structure comprises a self-aligned source region being surrounded by a planar gate region. The self-aligned source region comprises a moderately-doped p-base diffusion ring being formed in a lightly-do... | 04/24/2007 |
| 7205569 | Thin film transistor with microlens structures A thin film transistor with a microlens. A metal gate is formed on a substrate. A gate dielectric covers the metal gate. A semiconductor layer is formed on the gate dielectric. Source/drain metal layers respectively overlap ends of the top surface of the semiconduct... | 04/17/2007 |
| 7205615 | Semiconductor device having internal stress film A semiconductor device includes a first-type internal stress film formed of a silicon oxide film over source/drain regions of an nMISFET and a second-type internal stress film formed of a TEOS film over source/drain regions of a pMISFET. In a channel region of the n... | 04/17/2007 |
