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| Number | Title | Issue Date |
| 8084794 | Semiconductor device and manufacturing method thereof A semiconductor device includes a first wiring extending in a first direction and a second wiring extending in a second direction which crosses the first direction and being disposed with a space interposed between the first wiring and the second wiring, and includi... | 12/27/2011 |
| 7968918 | Semiconductor package A semiconductor package includes a semiconductor chip having two or more regions that partially overlap so as to define an overlapping region. Through-holes are defined through the two or more partially overlapping regions. One or more first electrodes are disposed ... | 06/28/2011 |
| 7935991 | Semiconductor components with conductive interconnects A semiconductor component includes a semiconductor substrate having at least one conductive interconnect on the backside thereof bonded to an inner surface of a substrate contact. A stacked semiconductor component includes multiple semiconductor components in a stac... | 05/03/2011 |
| 7923760 | Dielectric spacers for metal interconnects and method to form the same A plurality of metal interconnects incorporating dielectric spacers and a method to form such dielectric spacers are described. In one embodiment, the dielectric spacers adjacent to neighboring metal interconnects are discontiguous from one another. In another embod... | 04/12/2011 |
| 7875911 | Semiconductor device and oscillator A semiconductor device includes a semiconductor substrate including an active element or an integrated circuit and a plurality of connection electrodes to be electrically connected to the integrated circuit; a first resin layer formed on a surface of the semiconduct... | 01/25/2011 |
| 7768043 | Semiconductor device having high frequency components and manufacturing method thereof A transistor is located on a GaAs substrate. An air bridge extends to provide a cavity above gate electrodes of the transistor. An opening is sealed by the end ball of a second wire. Further, the semiconductor device is wholly covered by sealing resin. ... | 08/03/2010 |
| 7763914 | Semiconductor device for high frequency A semiconductor device for high frequency includes a channel region fabricated on a compound semiconductor substrate, a gate electrode fabricated on the channel region, a source electrode and a drain electrode alternately fabricated on the channel region by sandwich... | 07/27/2010 |
| 7723759 | Stacked wafer or die packaging with enhanced thermal and device performance An apparatus includes a metallization region including a plurality of metal layers on a device layer of a substrate, a via extending through the substrate and the device layer, and a heat spreading and stress engineering region in the substrate and adjacent to the d... | 05/25/2010 |
| 7723760 | Semiconductor-based porous structure enabled by capillary force The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon ... | 05/25/2010 |
| 7696541 | Structure for a latchup robust gate array using through wafer via A structure, method and a design structure for preventing latchup in a gate array. The design structure including: a NFET gate array and a PFET gate array in a substrate; an electrically conductive through via extending from a bottom surface of the substrate toward ... | 04/13/2010 |
| 7573081 | Method to fabricate horizontal air columns underneath metal inductor A new method is provided for creating an inductor on the surface of a silicon substrate. The invention provides overlying layers of oxide fins beneath a metal inductor. The oxide fins provide the stability support for the overlying metal inductor while also allowing... | 08/11/2009 |
| 7498622 | Latchup robust gate array using through wafer via A structure and a method for preventing latchup in a gate array. The structure including: a NFET gate array and a PFET gate array in a substrate; an electrically conductive through via extending from a bottom surface of the substrate toward a top surface of the subs... | 03/03/2009 |
| 7476918 | Semiconductor integrated circuit device and vehicle-mounted radar system using the same A semiconductor integrated circuit device includes a HFET formed on part of a substrate made of sapphire and including a Group III-V nitride semiconductor layer, a dielectric film formed on the substrate to cover the top and side surfaces and upper corners of the Gr... | 01/13/2009 |
| 7465977 | Method for producing a packaged integrated circuit There is described a method for producing a packaged integrated circuit. The method comprises a first step of building an integrated circuit having a micro-structure suspended above a micro-cavity, and having a heating element on the micro-structure capable of heati... | 12/16/2008 |
| 7391067 | Hybrid microwave integrated circuit An integrated microwave transistor amplifier includes a AlGaN/GaN active transistor arrangement on a thinned Si 1-mil heat spreader. Elongated, plated-through vias extend from the source portions of the transistor arrangement through the spreader to a thick gold sup... | 06/24/2008 |
| 7388277 | Chip and wafer integration process using vertical connections A process is described for semiconductor device integration at chip level or wafer level, in which vertical connections are formed through a substrate. A metallized feature is formed in the top surface of a substrate, and a handling plate is attached to the substrat... | 06/17/2008 |
| 7372128 | Integrated circuit anti-interference outline structure The invention discloses an integrated circuit anti-interference outline structure for applications of integrated circuits capable of shielding the integrated circuit from invasions of external electromagnetic waves and leaks of internal electromagnetic waves, wherei... | 05/13/2008 |
| 7352019 | Capacitance reduction by tunnel formation for use with a semiconductor device A method used during the manufacture of a semiconductor device comprises providing at least first, second, and third spaced conductive structures, where the second conductive structure is interposed between the first and third conductive structures. A first dielectr... | 04/01/2008 |
| 7338840 | Method of forming a semiconductor die with heat and electrical pipes Thermal hot spots in the substrate of a semiconductor die, and the required surface area of the semiconductor die, are substantially reduced by forming thermal or thermal and electrical pipes in the substrate that extend from a bottom surface of the substrate to a p... | 03/04/2008 |
| 7335931 | Monolithic microwave integrated circuit compatible FET structure A field effect transistor structure includes a single crystal substrate having: a source, gate and drain electrodes disposed on an upper surface of the substrate, the gate electrode having a region thereof disposed between a region of the drain electrode and a regio... | 02/26/2008 |
| 7335983 | Carbon nanotube micro-chimney and thermo siphon die-level cooling A method, apparatus and system with a semiconductor package including a microchimney or thermosiphon using carbon nanotubes to modify the effective thermal conductivity of an integrated circuit die. ... | 02/26/2008 |
| 7335965 | Packaging of electronic chips with air-bridge structures A circuit assembly for fabricating an air bridge structure and a method of fabricating an integrated circuit package capable of supporting a circuit assembly including an air bridge structure. A circuit assembly comprises an electronic chip and a conductive structur... | 02/26/2008 |
| 7335599 | Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate A semiconductor processing method includes providing a substrate, forming a plurality of semiconductor layers in the substrate, each of the semiconductor layers being distinct and selected from different groups of semiconductor element types. The semiconductor layer... | 02/26/2008 |
| 7332034 | Coating apparatus and coating method using the same To provide a coating apparatus, which can surely prevent a coating solution from spreading, to simplify a manufacturing process and reduce the manufacturing cost and provide a coating method using the same. The coating apparatus includes a holding table holding a pl... | 02/19/2008 |
| 7332806 | Thin, thermally enhanced molded package with leadframe having protruding region A semiconductor die package. It includes (a) a semiconductor die including a first surface and a second surface, (b) a source lead structure including protruding region having a major surface, the source lead structure being coupled to the first surface, (c) a gate ... | 02/19/2008 |
| 7329943 | Microelectronic devices and methods for forming interconnects in microelectronic devices Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backs... | 02/12/2008 |
| 7327412 | Liquid crystal electro-optic device In a horizontal electric field drive type liquid crystal electro-optic device wherein a liquid crystal material is driven by controlling the strength of an electric field parallel to a substrate, noncontinuity of the electric field strength around each pixel electro... | 02/05/2008 |
| 7285839 | Coating of copper and silver air bridge structures to improve electromigration resistance and other applications An improved electrical interconnect for an integrated circuit and methods for providing the same are disclosed. The electrical interconnect includes an air bridge extending through a gaseous medium so as to reduce the capacitance of the interconnect. The air bridge ... | 10/23/2007 |
| 7279377 | Method and structure for shallow trench isolation during integrated circuit device manufacture A method suitable for use during fabrication of a semiconductor device such as a dynamic random access memory or a flash programmable read-only memory comprises etching through silicon nitride and pad oxide layers and into a semiconductor wafer to form a trench into... | 10/09/2007 |
| 7268413 | Bipolar transistors with low-resistance emitter contacts Many integrated circuits include a type of transistor known as a bipolar junction transistor, which has an emitter contact formed of polysilicon. Unfortunately, polysilicon has a relatively high electrical resistance that poses an obstacle to improving switching spe... | 09/11/2007 |
| 7262440 | Light emitting diode package and fabrication method thereof The present invention provides a light emitting diode (LED) package and the fabrication method thereof. The LED package includes a lower metal layer, and a first silicon layer, a first insulation layer, a second silicon layer, a second insulation layer, and a packag... | 08/28/2007 |
| 7262505 | Selective electroless-plated copper metallization Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including depositing a thin film seed layer of Palladium (Pd) or Copper (Cu) on... | 08/28/2007 |
| 7250643 | Semiconductor device and method of manufacturing the same A semiconductor device includes: a gate electrode that is provided on a semiconductor layer; a source electrode and a drain electrode that are provided on the semiconductor layer so as to interpose the gate electrode; a source wall that extends from the source elect... | 07/31/2007 |
| 7244956 | Self-aligned process for manufacturing a phase change memory cell and phase change memory cell thereby manufactured A process for manufacturing a phase change memory cell, comprising the steps of: forming a resistive element; forming a delimiting structure having an aperture over the resistive element; forming a memory portion of a phase change material in the aperture, the resis... | 07/17/2007 |
| 7242073 | Capacitor having an anodic metal oxide substrate In one embodiment, a structure and method including an anodic metal oxide substrate used to form a capacitor are described herein. ... | 07/10/2007 |
| 7238959 | Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same A phase change memory device, and method of making the same, that includes a trench formed in insulation material having opposing sidewalls that are inwardly sloping with trench depth. A first electrode is formed in the trench. Phase change memory material is formed... | 07/03/2007 |
| 7235857 | Power semiconductor device A semiconductor device is provided in which a plurality of MOSFETs including a vertical MOSFET is formed on a substrate. The device includes a silicon carbide substrate having front and back surfaces facing each other, an isolating region formed in the substrate to ... | 06/26/2007 |
| 7232754 | Microelectronic devices and methods for forming interconnects in microelectronic devices Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backs... | 06/19/2007 |
| 7230319 | Electronic substrate A substrate for mounting a device is disclosed. The substrate includes at least one transition for providing an RF connection to a lead of the device, the lead extending from a device input to an otherwise free end. The transition comprises two spaced apart electric... | 06/12/2007 |
| 7227171 | Small area contact region, high efficiency phase change memory cell and fabrication method thereof A contact structure, including a first conducting region having a first thin portion with a first sublithographic dimension in a first direction; a second conducting region having a second thin portion with a second sublithographic dimension in a second direction tr... | 06/05/2007 |