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| Number | Title | Issue Date |
| 4516037 | Control circuitry for high voltage solid-state switches A gated diode switch (GDS1, GDS3, GDS4, GDS10) requires a voltage applied to the gate which is more positive than that of the anode and cathode in order to break current flow between the anode and cathode. In addition, a current of at least the same order... | 05/07/1985 |
| 4496963 | Semiconductor device with an ion implanted stabilization layer A semiconductor device wherein surface stabilization is provided by a shallow layer of ion implanted doping material on the surface of the semiconductor and beneath the passivating oxide layer. One embodiment is a bipolar transistor including a collector ... | 01/29/1985 |
| 4492972 | JFET Monolithic integrated circuit with input bias current temperature compensation Temperature variation of the input bias current of a monolithic integrated circuit junction field-effect transistor (JFET) is provided by a compensation diode formed concurrently with the JFET in the monolithic integrated circuit. The compensation diode h... | 01/08/1985 |
| 4485392 | Lateral junction field effect transistor device A lateral junction field effect transister device includes both a surface semiconductor layer located between the gate and drain contact regions of the device and a buried semiconductor layer which extends beneath at least the drain contact region and the... | 11/27/1984 |
| 4484208 | Junction-type field-effect transistor and its manufacture The channel region and gate region of a junction-type field-effect transistor have substantially the same outline and can be produced by successive implantation through the same mask. A highly doped contact zone ensures an ohmic connection between this ga... | 11/20/1984 |
| 4456918 | Isolated gate JFET structure A JFET having the top gate isolated from the bottom gate by an annulus source region and thin channel region and a top gate ohmic contact region isolated from the bottom gate by a deep isolation region. The isolation region and the top gate contact region... | 06/26/1984 |
| 4423431 | Semiconductor integrated circuit device providing a protection circuit A protective semiconductor integrated circuit device for protecting an internal circuit against an excessively high voltage has a first resistor of a low value resistance interposed between an input terminal and an input gate of the internal circuit. One ... | 12/27/1983 |
| 4422089 | Semiconductor device having a reduced surface field strength A semiconductor device of the "RESURF" type has a substrate region and a superimposed semiconductor layer which forms a p-n junction with the substrate region. The semiconductor layer has an island-shaped region which is depleted at least locally up to th... | 12/20/1983 |
| 4402126 | Method for fabrication of a non-volatile JRAM cell A non-volatile memory storage cell utilizing a single vertical junction field-effect transistor is fabricated by a method, which is compatible with the fabrication of MOSFET interface and logic circuits on the same chip. Assembly of a multi-dielectric sta... | 09/06/1983 |
| 4379001 | Method of making semiconductor devices In a semiconductor device such as a bipolar transistor and a field effect transistor of the type having a substrate, a doped polycrystalline silicon region selectively formed on the substrate and an insulating film overlying the polycrystalline silicon re... | 04/05/1983 |
| 4366567 | Semiconductor laser device Disclosed is a semiconductor laser device comprising a layered semiconductor region capable of laser oscillation and including at least an optical confinement region consisting of stacked semiconductor layers, means for injecting current into the optical ... | 12/28/1982 |
| 4349751 | Control circuitry using a pull-down transistor for high voltage solid-state switches To switch a first gated diode switch (GDS1) to the "OFF" state requires a voltage applied to the gate which is more positive than that of the anode or cathode and a sourcing of current into the gate of substantially the same order of magnitude as flows be... | 09/14/1982 |
| 4322738 | N-Channel JFET device compatible with existing bipolar integrated circuit processing techniques A buried n-channel junction field-effect transistor (JFET) fabricated in standard bipolar integrated circuit starting material. The transistor has a deep p-well as the bottom gate formed in an n-type body. The source is surrounded by the p-well while the ... | 03/30/1982 |
| 4321613 | Field effect devices and their fabrication A method of fabricating a field effect transistor comprising the steps of forming an active layer of semiconductor material, e.g. GaAs over the surface of a first substrate of semiconductor material, e.g., also GaAs, forming source, drain and gate electro... | 03/23/1982 |
| 4295058 | Radiant energy activated semiconductor switch Various circuits and combinations of radiant energy responsive transducer means such as photovoltaic diodes connected to the gate of a depletion mode FET whose source and drain are connected to the gate and cathode of a thyristor, are disclosed to provide... | 10/13/1981 |
| 4219828 | Multidrain metal-oxide-semiconductor field-effect A metal-oxide-semiconductor field-effect device for constituting a single logic inverter stage. It includes a multidrain transistor operating in enhancement mode and a load transistor, both of monochannel metal-oxide-semiconductor structure. The inverter ... | 08/26/1980 |
| 4205334 | Integrated semiconductor device An integrated semiconductor device including at least one first vertical-type junction field effect transistor (vertical JFET) having a triode-like unsaturated voltage-current characteristic and at least one second vertical JFET having a bipolar-transisto... | 05/27/1980 |
| 4202001 | Semiconductor device having grid for plating contacts A semiconductor device includes a body of semiconductor material on which are formed a plurality of spaced semiconductor elements. Each of the semiconductor elements includes a plurality of contacts, some of which are separated from each other by recesses... | 05/06/1980 |
| 4179310 | Laser trim protection process An element of an integrated circuit, such as an ion implanted region or a metal layer, may be laser trimmed without exposing P-N junctions or other circuit elements not to be trimmed to damage by the laser through use of the present protection process and... | 12/18/1979 |
| 4176368 | Junction field effect transistor for use in integrated circuits A junction field effect transistor is incorporated into a conventional monolithic bipolar integrated circuit using compatible processing steps. The transistor source and drain regions are produced during IC base diffusion and the gate contact during IC em... | 11/27/1979 |
| 4172741 | Method for laser trimming of bi-FET circuits Radiant energy, preferably that of a laser, is focused onto the surface of a silicon integrated circuit that contains a thin layer doped to the opposite conductivity type of the underlying silicon. The thin layer can be trimmed so as to tailor its conduct... | 10/30/1979 |
| 4135168 | Reverse channel GaAsFET oscillator A common-drain high frequency power oscillator is configured by electrically reversing the channel of a GaAsFET transistor. Such an oscillator can be flip-chip mounted for reduced thermal resistance and has superior oscillation characteristics as compared... | 01/16/1979 |
| 4126900 | Random access junction field-effect floating gate transistor memory JFET memory structures, in particular for RAM's with non-destructive reading-out of the charge state of a floating gate electrode in which the primary selection is realized by means of capacitive coupling with the floating gate electrode. The secondary se... | 11/21/1978 |
| 4092660 | High power field effect transistor A field effect transistor is provided wherein conductive mesas are topped by source and drain electrodes, respectively, and rise out of a semiconductor epitaxial layer onto which there is formed a Schottky barrier layer. A heat sink metal layer backs the ... | 05/30/1978 |
| 4063271 | FET and bipolar device and circuit process with maximum junction control Disclosed are improved field-effect and bipolar semiconductor devices and the method of making them, wherein maximum junction control provides highly predictable device parameters. Low temperature epitaxial depositions provide tight junction thickness and... | 12/13/1977 |
| 4048647 | Solid state disconnect device A solid state disconnect or isolating device for disconnecting a subscriber on his premises, replaces a relay with associated circuitry and items. It can be coupled with a surge protection device to provide disconnect signalling, plus loop testing if desi... | 09/13/1977 |
| 4041517 | Vertical type junction field effect semiconductor device A vertical type junction field effect transistor is disclosed having a body of semiconductor material of a first conductive type, a source region of the first conductive type provided in a main face of the body and a drain region of the first conductive t... | 08/09/1977 |
| 4038563 | Symmetrical input NOR/NAND gate circuit An electrical circuit is shown having first and second pluralities of junction field effect transistors connected with an output transistor to provide NOR/NAND gate logic operation. The junction field effect transistors are preferably enhancement mode jun... | 07/26/1977 |
| 4020365 | Integrated field-effect transistor switch A monolithic switching circuit has a junction field-effect transistor controlled through a capacitive diode and a small field-effect transistor. The physical structure of the switch includes a junction field-effect transistor with a gate region connected ... | 04/26/1977 |
| 4009401 | Fade-in and fade-out switching circuit A switching circuit using first and second semiconductor devices each having a semiconductive substrate with a current path portion, first and second semiconductive regions forming a PN junction therebetween, the first region being capacitively coupled to... | 02/22/1977 |
| 4004950 | Method for improving the doping of a semiconductor material In a first step, the semiconductor material is doped in a known manner with impurities having a given conductivity type and a given concentration profile. In a second step, the material is maintained at a high temperature, bombarded with a beam of particl... | 01/25/1977 |
| 4000504 | Deep channel MOS transistor A semiconductor charge storage and detection device is provided in which an ion implanted conductive channel is buried between source and drain regions in the bulk of a semiconductor substrate. A charge storage region extends between the channel and the s... | 12/28/1976 |
| 3999207 | Field effect transistor with a carrier injecting region A semiconductor device includes a first semiconductive region of one conductivity type, a first electrode and a second electrode formed on said first semiconductive region, a second semiconductive region of the opposite conductivity type contiguous to a c... | 12/21/1976 |
| 3994755 | Liquid phase epitaxial process for growing semi-insulating GaAs layers Disclosed is a process for fabricating chromium-doped semi-insulating epitaxial layers of gallium arsenide which includes contacting a gallium arsenide substrate with a chromium-doped saturated solution of gallium arsenide in gallium and maintaining the s... | 11/30/1976 |
| 3986180 | Depletion mode field effect transistor memory system The present invention relates to an integrated memory system comprising an array of depletion mode field effect transistors operated in a common control electrode mode to provide an array with the density of metal oxide semiconductor field effect transist... | 10/12/1976 |
| 3979764 | Controlled fading switching circuit A switching circuit using a field effect transistor having a semiconductive substrate with a current path portion, first and second semiconductive regions forming a PN junction therebetween, the first region being capacitively coupled to the current path ... | 09/07/1976 |
| 3971055 | Analog memory circuit utilizing a field effect transistor for signal storage An analog memory circuit using a field effect transistor having a semiconductive substrate, first and second semiconductive regions forming a PN junction therebetween, the first region being capacitively coupled to the current path portion to form a capac... | 07/20/1976 |
| 3947761 | Peak level indicator A peak level indicator using a field effect transistor having a semiconductive substrate with a current path portion, first and second semiconductive regions forming a PN junction therebetween, the first region being capacitively coupled to the current pa... | 03/30/1976 |