Did You Know...
...that the Eveready Battery began as an invention called the "electric flowerpot," which was a tube with a battery and light bulb inside? The idea was to fasten this gizmo to the side of a flowerpot so it would illuminate the flowers from the bottom. The idea died on the vine and the businessman who licensed the flower pot, Conrad Huber, was left with a pile of useless tubes -- until he found a way to market them as batteries to light the world!
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| Number | Title | Issue Date |
| 5734181 | Semiconductor device and manufacturing method therefor A semiconductor device having a MISFET includes: a silicon substrate (2) having a semiconductor region on a surface thereof; a source region (10a) and a drain region (10b) formed in the semiconductor region separately; a channel region formed in the semic... | 03/31/1998 |
| 5731598 | Single electron tunnel device and method for fabricating the same The single electron tunnel device of this invention includes: a multiple tunnel junction layer including multiple tunnel junctions; and first and second electrodes for applying a voltage to the multiple tunnel junction layer, wherein the multiple tunnel j... | 03/24/1998 |
| 5714766 | Nano-structure memory device A memory device and memory incorporating a plurality of the memory devices is described wherein each memory device has spaced apart source and drain regions, a channel, a barrier insulating layer, a nanocrystal or a plurality of nanocrystals, a control ba... | 02/03/1998 |
| 5701016 | Semiconductor device and method for its manufacture A semiconductor device according to the invention is characterized by comprising a stacked structure which has a plurality of layers for providing rear barrier confinement potentials, an oblique side surface intersecting edges of the plurality of layers, ... | 12/23/1997 |
| 5701017 | Semiconductor device and method for its manufacture A semiconductor device according to the invention is characterized by comprising a heterostructure which comprises an active layer in which carriers can flow within a conduction channel, the heterostructure including a recessed region in which part of the... | 12/23/1997 |
| 5693955 | Tunnel transistor A tunnel transistor including source and drain and a silicon oxide tunneling layer overlying the source. A polysilicon quantum well layer positioned on the tunneling layer and in contact with the drain. The quantum well layer having a thickness which plac... | 12/02/1997 |
| 5686735 | Silicon-on-insulator (SOI) transistor An SOI transistor whose source region and/or drain region have a heterostructure made up of at least two different semiconductor materials, to thereby prevent a bipolar-induced breakdown.... | 11/11/1997 |
| 5679962 | Semiconductor device and a single electron device A semiconductor device includes a semi-insulating semiconductor substrate, a semiconductor layer structure including at least an undoped layer of a first semiconductor, an undoped spacer layer of a second semiconductor having an electron affinity smaller ... | 10/21/1997 |
| 5679961 | Correlation tunnel device According to the present invention, there is provided a correlation tunnel device capable of achieving a low power consumption without decreasing a drive force when a large-scale-integrated circuit is constituted. A correlation tunnel device according to ... | 10/21/1997 |
| 5670790 | Electronic device An electronic device which includes, a couple of first conduction regions which are capable of confining carriers, a second conduction region having a higher energy level than those of the first conduction regions, and a first electrode for impressing a v... | 09/23/1997 |
| 5665981 | Thin film transistors and method of promoting large crystal grain size in the formation of polycrystalline silicon alloy thin films A thin film transistor includes, a) a thin film source region; b) a thin film drain region; c) a polycrystalline thin film channel region intermediate the thin film source region and the thin film drain region; d) a transistor gate and gate dielectric ope... | 09/09/1997 |
| 5665979 | Coulomb-blockade element and method of manufacturing the same A Coulomb-blockade element includes a silicon layer formed on a substrate through an insulating film. The silicon layer includes a narrow wire portion and first and second electrode portions. The narrow wire portion serves as a conductive island for confi... | 09/09/1997 |
| 5659179 | Ultra-small semiconductor devices having patterned edge planar surfaces Ultra-small semiconductor devices and a method of fabrication including patterning the planar surface of a substrate to form a pattern edge (e.g. a mesa) and consecutively forming a plurality of layers of semiconductor material in overlying relationship t... | 08/19/1997 |
| 5646418 | Quantum effect switching device A quantum effect switching device comprising a substrate 12, first and second tunnel barriers 14 and 18, and a quantum well 16. The current between a drain region 20 and the substrate 12 can be switched by placing a potential on a gate layer 24. The poten... | 07/08/1997 |
| 5646420 | Single electron transistor using protein The single electron transistor can be operated at room temperature. The distance between the electrodes 5, 5 can be adjusted by the length of the protein and/or the wideness of the lipid bilayer and the distance between the quantum dot 4 and one of the el... | 07/08/1997 |
| 5640022 | Quantum effect device A quantum effect device which operates in a mesoscopic region and eliminates the need for making monochromatic electron waves for the operation and moreover can operate in a high temperature region. The quantum effect device comprises a first waveguide fo... | 06/17/1997 |
| 5608231 | Field effect transistor having channel with plural quantum boxes arranged in a common plane A field effect transistor has a quantum dot array in its channel region. The quantum dot array is composed of a plurality of quantum dots arranged adjacent to each other on a common plane. Each quantum dot may be made of heterojunction of compound semicon... | 03/04/1997 |
| 5606178 | Bipolar resonant tunneling transistor Base contacts are made to one or both barrier layers of a resonant tunneling bipolar transistor, rather than to the quantum well. This is made possible with the use of a type II rather than a type I energy band alignment in the active region.... | 02/25/1997 |
| 5604357 | Semiconductor nonvolatile memory with resonance tunneling A semiconductor device comprising a substrate having thereon a capacitance part and an electrode, the capacitance part having two storage regions for conductive carriers, the storage regions having therebetween a first barrier region of a multi-tunneling ... | 02/18/1997 |
| 5583353 | Heterojunction field effect transistor A heterojunction FET includes an electron supply layer formed on a non-doped semiconductor layer serving as a channel forming layer and a current path forming layer formed on the electron supply layer. The electron supply layer has an energy band gap grea... | 12/10/1996 |
| 5561302 | Enhanced mobility MOSFET device and method An enhanced mobility MOSFET device (10) comprises a channel layer (12) formed on a monocrystalline silicon layer (11). The channel layer (12) comprises an alloy of silicon and a second material with the second material substitutionally present in silicon ... | 10/01/1996 |
| 5559343 | Semiconductor device with metallic precipitate and its manufacture A superlattice of LT-GaAs layers and another semiconductor layers such as LT-AlGaAs or HT-GaAs is grown on a substrate. Lattice imperfectness such as strain or crystal defects is selectively introduced. Then, the superlattice is annealed to produce As pre... | 09/24/1996 |
| 5557141 | Method of doping, semiconductor device, and method of fabricating semiconductor device A group III-V compound semiconductor doped with an impurity, having an undoped film of SiOx and a film for preventing the diffusion of Group V atoms (e.g., an SiN film) are formed on a crystal of Group III-V compound semiconductor in which the silicon in ... | 09/17/1996 |
| 5550388 | Heterojunction FET having barrier layer consisting of two layers between channel and buffer layers A heterojunction FET disclosed herein includes a semi-insulating GaAs substrate, a buffer layer composed of an undoped Iny/2 Al1-y/2 As layer (0 | 08/27/1996 |
| 5539214 | Quantum bridges fabricated by selective etching of superlattice structures A quantum bridge structure including wires of a semiconductor material such as silicon which are formed by selectively etching a superlattice of alternating layers of at least two semiconductor materials. The quantum bridge is useful as a photo emission d... | 07/23/1996 |
| 5534714 | Integrated field effect transistor and resonant tunneling diode This is an integrated device which comprises an integrated transistor and resonant tunneling diode where the transistor comprises a substrate 10, a buffer layer 12 over the substrate 10, and a channel layer 14 over the buffer layer 12; and the resonant tu... | 07/09/1996 |
| 5534713 | Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers A method and a layered planar heterostructure comprising one of or both n and p-channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate wherein one layer is silicon or silicon germanium ... | 07/09/1996 |
| 5530263 | Three dot computing elements There is provided by this invention logic and memory elements of atomic or near-atomic scale useful in computer central processing units. These elements consist of two quantum dots having opposite states and a third quantum dot situated between the two qu... | 06/25/1996 |
| 5523585 | Semiconductor device having a superlattice structure A semiconductor device according to the invention has a channel layer, which is sandwiched by a first and a second barrier layers, and an electron supply layer for supplying the channel layer with electrons through at least one of the barrier layers. The ... | 06/04/1996 |
| 5521735 | Electron wave combining/branching devices and quantum interference devices Novel electron wave combining and/or branching devices and Aharonov-Bohm type quantum interference devices are proposed, which have no curved electron waveguide structures to form an electron branching or decoupling part or ring geometry. But instead the ... | 05/28/1996 |
| 5521404 | Group III-V interdiffusion prevented hetero-junction semiconductor device A high electron mobility transistor type group III-V compound semiconductor device includes a substrate of a group III-V compound semiconductor, an electron transfer layer of a group III-V compound semiconductor formed on the substrate, an impurity doped ... | 05/28/1996 |
| 5508530 | Field effect transistor The invention provides a FET by forming a channel layer in a layer including "n" type impurity at high concentration, which is sandwiched by a first semiconductor layer and a second semiconductor layer lightly doped with impurity. Therefore even when elec... | 04/16/1996 |
| 5504347 | Lateral resonant tunneling device having gate electrode aligned with tunneling barriers A resonant tunneling transistor (400) with lateral carrier transport through tunneling barriers (404, 408) grown as a refilling of trenches etched partially into a transverse quantum well (410) and defining a quantum wire or quantum dot (406). The fabrica... | 04/02/1996 |
| 5500537 | Field-effect transistor with at least two different semiconductive organic channel compounds A field effect transistor has a channel between a source electrode and a drain electrode made from an organic semiconductor. In one form of the invention, the channel is a mixture of at least two different organic compounds. In another form of the inventi... | 03/19/1996 |
| 5497015 | Quantum interference transistor A semiconductor device using interference effects of electron waves passing through a multichannel, wherein the multichannel is formed by a Dirac-delta-doped layer. A method of manufacturing a semiconductor device comprising the steps of: selectively form... | 03/05/1996 |
| 5489539 | Method of making quantum well structure with self-aligned gate Quantum well structures are fabricated by use of a process employing a Focused Ion Beam (FIB) scanning in the surface of a semiconductor substrate. The quantum well structures thus fabricated include Resonant Tunneling Transistors (RRTs) and one dimension... | 02/06/1996 |
| 5489785 | Band-to-band resonant tunneling transistor A band-to-band resonant tunneling transistor including GaSb and InAs resonant tunneling layers separated by a thin barrier layer and a second InAs layer separated from the GaSb layer by another thin barrier layer. A terminal on the InAs resonant tunneling... | 02/06/1996 |
| 5488237 | Semiconductor device with delta-doped layer in channel region A high speed transistor featured by a wide operation range and a high gain has a channel layer of a three-layer structure wherein undoped GaInAs layers are arranged above and beneath a GaAs layer. The GaAs layer includes at least one n-type delta doped la... | 01/30/1996 |
| 5486705 | Heterojunction field effect transistor A heterojunction FET comprises: a semi-insulation GaAs substrate; and a heterojunction structure, formed on the substrate, having: an active layer including: an undoped InGaAs layer including 10-254 of InAs composition; an undoped GaAs layer formed on the... | 01/23/1996 |
| 5485018 | Nanofabricated device for multiple-state logic operation A nanofabricated logic device, operable at multiple (more than two) logic levels comprises asymmetrically coupled quantum point contacts provided with respective sources and drains and a coupling region between gate electrodes. The quantum mechanical carr... | 01/16/1996 |
