Class 257/20 - Field effect device

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein the superlattice active layer forms
No. of patents: 384
Last issue date: 05/29/2012

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Number	Title	Issue Date
8188459	Devices based on SI/nitride structures A nitride-based semiconductor device is provided. The nitride-base semiconductor device includes a substrate comprising one or more locally etched regions and a buffer layer comprising one or multiple InAlGaN layers on the substrate. A channel layer includes GaN on ...	05/29/2012
8183556	Extreme high mobility CMOS logic A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate. ...	05/22/2012
8164086	Phase-controlled field effect transistor device and method for manufacturing thereof A phase controllable field effect transistor device is described. The device provides first and second scattering sites disposed at either side of a conducting channel region, the conducting region being gated such that on application of an appropriate signal to the...	04/24/2012
8026508	Semiconductor device and method of fabricating the same Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a single electron box including a first quantum dot, a charge storage gate on the first quantum dot, and a first gate electrode on the charge storage gate, t...	09/27/2011
8003975	Semiconductor integrated circuit device and method for fabricating the same A semiconductor integrated circuit device includes: a semiconductor layer having a principal surface on which a source electrode, a drain electrode and a gate electrode are formed and having a first through hole; an insulating film formed in contact with the semicon...	08/23/2011
7973304	III-nitride semiconductor device A III-nitride semiconductor device which includes a barrier body between the gate electrode and the gate dielectric thereof. ...	07/05/2011
7964866	Low power floating body memory cell based on low bandgap material quantum well Embodiments of the invention relate to apparatus, system and method for use of a memory cell having improved power consumption characteristics, using a low-bandgap material quantum well structure together with a floating body cell. ...	06/21/2011
7928425	Semiconductor device including a metal-to-semiconductor superlattice interface layer and related methods A semiconductor device which may include a semiconductor layer, and a superlattice interface layer therebetween. The superlattice interface layer may include a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semico...	04/19/2011
7847282	Vertical tunneling transistor The disclosed embodiments relate to a vertical tunneling transistor that may include a channel disposed on a substrate. A quantum dot may be disposed so that an axis through the channel and the quantum dot is substantially perpendicular to the substrate. A gate may ...	12/07/2010
7829883	Vertical carbon nanotube field effect transistors and arrays Carbon nanotube field effect transistors, arrays of carbon nanotube field effect transistors, device structures, and arrays of device structures. A stacked device structure includes a gate electrode layer and catalyst pads each coupled electrically with a source/dra...	11/09/2010
7800097	Semiconductor device including independent active layers and method for fabricating the same A semiconductor device includes a semiconductor substrate of n-type silicon including, in an upper portion thereof, a first polarity inversion region and a second polarity inversion regions spaced from each other and doped with a p-type impurity. A first HFET includ...	09/21/2010
7759673	Data recording system and method for using same A storage layer is arranged facing an array of micro-tips. The storage layer includes a plurality of insulated conductive dots designed to store electric charges. Each micro-tip includes a high-permittivity element integral to a transistor channel connecting a sourc...	07/20/2010
7741633	Ferroelectric oxide artificial lattice, method for fabricating the same and ferroelectric storage medium for ultrahigh density data storage device The present invention is related to a ferroelectric storage medium for ultrahigh density data storage device and a method for fabricating the same. A supercell having high anisotropy is formed by controlling crystal structure and symmetry of unit structure (supercel...	06/22/2010
7675056	Germanium phototransistor with floating body A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the i...	03/09/2010
7671358	Plasma implantated impurities in junction region recesses A transistor device having a conformal depth of impurities implanted by isotropic ion implantation into etched junction recesses. For example, a conformal depth of arsenic impurities and/or carbon impurities may be implanted by plasma immersion ion implantation in j...	03/02/2010
7633083	Metamorphic buffer on small lattice constant substrates A semiconductor device is supported by a substrate with a smaller lattice constant. A metamorphic buffer provides a transition from the smaller lattice constant of the substrate to the larger lattice constant of the semiconductor device. In one application, the semi...	12/15/2009
7615774	Aluminum free group III-nitride based high electron mobility transistors Aluminum free high electron mobility transistors (HEMTs) and methods of fabricating aluminum free HEMTs are provided. In some embodiments, the aluminum free HEMTs include an aluminum free Group III-nitride barrier layer, an aluminum free Group III-nitride channel la...	11/10/2009
7612366	Semiconductor device including a strained superlattice layer above a stress layer A semiconductor device may include a stress layer and a strained superlattice layer above the stress layer and including a plurality of stacked groups of layers. More particularly, each group of layers of the strained superlattice layer may include a plurality of st...	11/03/2009
7598515	Semiconductor device including a strained superlattice and overlying stress layer and related methods A semiconductor device may include a strained superlattice layer including a plurality of stacked groups of layers, and a stress layer above the strained superlattice layer. Each group of layers of the strained superlattice layer may include a plurality of stacked b...	10/06/2009
7547911	Gan-based field effect transistor and production method therefor A GaN-based heterostructure field effect transistor capable of accomplishing higher output, higher breakdown voltage, higher speed, higher frequency, and the like. A heterostructure field effect transistor including a channel layer (4) of GaN and a barrier la...	06/16/2009
7544963	Binary group III-nitride based high electron mobility transistors Binary Group III-nitride high electron mobility transistors (HEMTs) and methods of fabricating binary Group III-nitride HEMTs are provided. In some embodiments, the binary Group III-nitride HEMTs include a first binary Group III-nitride barrier layer, a binary Group...	06/09/2009
7535016	Vertical carbon nanotube transistor integration A hybrid semiconductor structure which includes a horizontal semiconductor device and a vertical carbon nanotube transistor, where the vertical carbon nanotube transistor and the horizontal semiconductor device have at least one shared node is provided. The at least...	05/19/2009
7531829	Semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance A semiconductor device may include a substrate and spaced apart source and drain regions defining a channel region therebetween in the substrate. The substrate may have a plurality of spaced apart superlattices in the channel and/or drain regions. Each superlattice ...	05/12/2009
7531828	Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions A semiconductor device may include at least one pair of spaced apart stress regions, and a strained superlattice layer between the at least one pair of spaced apart stress regions and including a plurality of stacked groups of layers. Each group of layers of the str...	05/12/2009
7521707	Semiconductor device having GaN-based semiconductor layer A semiconductor device includes, an AlGaN electron supply layer having a [000-1] crystalline orientation in a thickness direction to a substrate plane, a GaN electron traveling layer formed on the AlGaN electron supply layer, a gate electrode formed above the GaN el...	04/21/2009
7436026	Semiconductor device comprising a superlattice channel vertically stepped above source and drain regions A semiconductor device may include a semiconductor substrate and at least one metal oxide semiconductor field-effect transistor (MOSFET). The at least one MOSFET may include spaced apart source and drain regions in the semiconductor substrate, and a superlattice cha...	10/14/2008
7423292	Semiconductor device, EL display device, liquid crystal display device, and calculating device There is provided a semiconductor device able to increase the mobility of carriers and reduce the current in the OFF state. The semiconductor device includes a gate electrode, an insulating layer on the gate electrode, a first electrode on the insulating layer, a se...	09/09/2008
7420202	Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device An electronic device can include a transistor structure of a first conductivity type, a field isolation region, and a layer of a first stress type overlying the field isolation region. For example, the transistor structure may be a p-channel transistor structure and...	09/02/2008
7414260	Vertical tunneling transistor The disclosed embodiments relate to a vertical tunneling transistor that may include a channel disposed on a substrate. A quantum dot may be disposed so that an axis through the channel and the quantum dot is substantially perpendicular to the substrate. A gate may ...	08/19/2008
7415185	Buried-waveguide-type light receiving element and manufacturing method thereof A buried-waveguide light detecting element includes an n-type cladding layer on a Fe-InP substrate, a waveguide on a portion of the n-type cladding layer, and in which an n-type light guide layer, an i-light guide layer having a refractive index equal to or higher t...	08/19/2008
7368085	Analyte detector An analyte detector including a device having a surface, wherein the device is capable of detecting a charge adjacent to the surface. The surface includes a plurality of molecules bonded thereto, wherein the molecules have a structure (I):	05/06/2008
7364923	Dressed qubits A quantum computing method comprising constructing a dressing transformation V between a physical Hamiltonian H and an ideal Hamiltonian HID. The physical Hamiltonian H describes a physical quantum computer that comprises a plurality of qubits, including ...	04/29/2008
7361559	Manufacturing method for a MOS transistor comprising layered relaxed and strained SiGe layers as a channel region The invention includes non-volatile memory and logic devices associated with crystalline Si/Ge. The devices can include TFT constructions. The non-volatile devices include a floating gate or floating plate over the Si/Ge, and a pair of source/drain regions. The sour...	04/22/2008
7355215	Field effect transistors (FETs) having multi-watt output power at millimeter-wave frequencies High electron mobility transistors (HEMT) are provided having an output power of greater than 3.0 Watts when operated at a frequency of at least 30 GHz. The HEMT has a power added efficiency (PAE) of at least about 20 percent and/or a gain of at least about 7.5 dB. ...	04/08/2008
7354835	Method of fabricating CMOS transistor and CMOS transistor fabricated thereby In a method of fabricating a CMOS transistor, and a CMOS transistor fabricated according to the method, the characteristics of first and second conductivity type MOS transistors are both simultaneously improved. At the same time, the fabrication process is simplifie...	04/08/2008
7351448	Anti-reflective coating on patterned metals or metallic surfaces An apparatus and process for coating surfaces of metal or metallic components including providing at least one metal having a patterned outer surface exhibiting an optical reflection greater than about 40%, providing at least one anti-reflective coating material, th...	04/01/2008
7352008	Heterostructure with rear-face donor doping The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar ma...	04/01/2008
7351994	Noble high-k device At least one high-k device, and a method for forming the at least one high-k device, comprising the following. A structure having a strained substrate formed thereover. The strained substrate comprising at least an uppermost strained-Si epi layer. At least one diele...	04/01/2008
7351995	Floating body germanium phototransistor having a photo absorption threshold bias region A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a fir...	04/01/2008
7348611	Strained complementary metal oxide semiconductor (CMOS) on rotated wafers and methods thereof The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a ...	03/25/2008

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Class 257/20 - Field effect device