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| Number | Title | Issue Date |
| 8138523 | Semiconductor device having silicon on stressed liner (SOL) A method of fabricating an integrated circuit and an integrated circuit having silicon on a stress liner are disclosed. In one embodiment, the method comprises providing a semiconductor substrate comprising an embedded disposable layer, and removing at least a porti... | 03/20/2012 |
| 8044436 | Avalanche photodiode having controlled breakdown voltage Avalanche photodiodes and methods for forming them are disclosed. The breakdown voltage of an avalanche photodiode is controlled through the inclusion of a diffusion sink that is formed at the same time as the device region of the photodiode. The device region and d... | 10/25/2011 |
| 7968915 | Dual stress memorization technique for CMOS application A stress-transmitting dielectric layer is formed on the at least one PFET and the at least one NFET. A tensile stress generating film, such as a silicon nitride, is formed on the at least one NFET by blanket deposition and patterning. A compressive stress generating... | 06/28/2011 |
| 7893464 | Semiconductor photodiode and method of manufacture thereof A method of manufacture of an avalanche photodiode involving a step of making a recess in a top window layer of an avalanche photodiode layer stack, such that a wall surrounding the recess runs smoothly and gradually from the level of the recess to the level of the ... | 02/22/2011 |
| 7884395 | Semiconductor apparatus A semiconductor apparatus includes, a first silicon layer of a first conductivity type; a second silicon layer provided on the first silicon layer and having a higher resistance than the first silicon layer, a third silicon layer of a second conductivity type provid... | 02/08/2011 |
| 7781802 | Semiconductor device and manufacturing method thereof As semiconductor regions in contact with a first main surface of a semiconductor base composed by forming an N− silicon carbide epitaxial layer on an N+ silicon carbide substrate connected to a cathode electrode, there are provided both of an N+ polycrystalline si... | 08/24/2010 |
| 7755108 | Nitride-based semiconductor device A nitride-based semiconductor device includes a diode provided on a semiconductor substrate. The diode contains a first nitride-based semiconductor layer made of non-doped AlXGa1-XN (0≦X | 07/13/2010 |
| 7737470 | High-frequency diode A high-frequency diode has a first semiconductor area with a first conductivity type as well as a barrier area adjacent to the first semiconductor area, which has a second conductivity type, which differs from the first conductivity type. Further, the high-frequency... | 06/15/2010 |
| 7700977 | Integrated circuit with a subsurface diode An integrated circuit includes a first and second diode connected in parallel. The first diode has a first breakdown voltage and has first P type region and first N type region adjacent to each other at the surface of the substrate of a substrate to form a lateral d... | 04/20/2010 |
| 7696537 | Step-embedded SiGe structure for PFET mobility enhancement A device, and method for manufacturing the same, including a PFET having an embedded SiGe layer where a shallow portion of the SiGe layer is closer to the PFET channel and a deep portion of the SiGe layer is further from the PFET channel. Thus, the SiGe layer has a ... | 04/13/2010 |
| 7538367 | Avalanche photodiode The present invention provides an avalanche photodiode capable of raising productivity. An n-type InP buffer layer, an n-type GaInAs light absorption layer, an n-type GaInAsP transition layer, an n-type InP electric field adjusting layer, an n-type InP avalanche int... | 05/26/2009 |
| 7449730 | Nitride-based semiconductor device A nitride-based semiconductor device includes a diode provided on a semiconductor substrate. The diode contains a first nitride-based semiconductor layer made of non-doped AlXGa1-XN (0≦X | 11/11/2008 |
| 7432537 | Avalanche photodiode structure An avalanche photodiode (APD) includes an anode layer, a cathode layer, an absorption layer between the anode layer and the cathode layer, a first multiplying stage between the absorption layer and the cathode layer, a second multiplying stage between the first mult... | 10/07/2008 |
| 7429761 | High power diode utilizing secondary emission A high power diode includes a cathode for emitting a primary electron discharge, an anode, and a porous dielectric layer, e.g. a honeycomb ceramic, positioned between the cathode and the anode for receiving the primary electron discharge and emitting a secondary ele... | 09/30/2008 |
| 7381998 | Semiconductor integrated circuit device A semiconductor integrated circuit device according to the present invention includes a diode in a second island region. The anode region of the diode and the dividing region in a first island region having a horizontal PNP transistor are electrically connected to e... | 06/03/2008 |
| 7368762 | Heterojunction photodiode The present invention provides a heterojunction photodiode which includes a pn or Schottky-barrier junction formed in a first material region having a bandgap energy Eg1. When reverse-biased, the junction creates a depletion region which expands towards a... | 05/06/2008 |
| 7361943 | Silicon-based backward diodes for zero-biased square law detection and detector arrays of same A Si-based diode (10, 10′, 100) is formed by epitaxially depositing a Si-based diode structure on a silicon substrate. The Si-based diode structure includes a Si-based pn junction (16, 16′, 18, 18′, 30, 32, 160, 161) having a backward diode curre... | 04/22/2008 |
| 7358546 | Heterobipolar transistor and method of fabricating the same The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher t... | 04/15/2008 |
| 7354838 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency By removing an outer spacer, used for the formation of highly complex lateral dopant profiles, prior to the formation of metal silicide, a high degree of process compatibility with conventional processes is obtained, while at the same time a contact liner layer may ... | 04/08/2008 |
| 7345325 | Avalanche photodiode An avalanche photodiode has improved low-noise characteristics, high-speed response characteristics, and sensitivity. The avalanche photodiode includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, a semiconductor mul... | 03/18/2008 |
| 7341921 | Photodiode The invention provides a method of manufacturing an avalanche diode comprising the steps of applying a mask (6) over an active diode region (5) in a wafer (1), and damaging the region the surrounding the active diode region by breaking bonds in ... | 03/11/2008 |
| 7329941 | Creating increased mobility in a bipolar device The mobility of charge carriers in a bipolar (BJT) device is increased by creating compressive strain in the device to increase mobility of electrons in the device, and creating tensile strain in the device to increase mobility of holes in the device. The compressiv... | 02/12/2008 |
| 7314836 | Enhanced nitride layers for metal oxide semiconductors The performance of NMOS and PMOS regions of integrated circuits is improved. Embodiments of the invention include forming a first dielectric layer optimized for n-doped regions over the n-doped regions and forming a second dielectric layer optimized for p-doped regi... | 01/01/2008 |
| 7309638 | Method of manufacturing a semiconductor component A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth s... | 12/18/2007 |
| 7276746 | Metal-oxide-semiconductor varactors Integrated circuit varactors and methods for varactor fabrication are provided. Varactors are formed on integrated circuits that contain complementary metal-oxide-semiconductor (CMOS) transistors. The same semiconductor fabrication process steps are used to form bot... | 10/02/2007 |
| 7262468 | Method and system for reducing charge damage in silicon-on-insulator technology According to one embodiment of the invention, a silicon-on-insulator device includes an insulative layer formed overlying a substrate and a source and drain region formed overlying the insulative layer. The source region and the drain region comprise a material havi... | 08/28/2007 |
| 7253456 | Diode structure and integral power switching arrangement A diode structure having high ESD stability is described. Other embodiments provide an integral power switching arrangement having an integrated low leakage diode. ... | 08/07/2007 |
| 7238578 | Method of forming a semiconductor structure comprising transistor elements with differently stressed channel regions A semiconductor structure comprising a first transistor element and a second transistor element is provided. Stress in channel regions of the first and the second transistor element is controlled by forming stressed layers having a predetermined stress over the tran... | 07/03/2007 |
| 7223647 | Method for forming integrated advanced semiconductor device using sacrificial stress layer An integrated advanced method for forming a semiconductor device utilizes a sacrificial stress layer as part of a film stack that enables spatially selective silicide formation in the device. The low-resistance portion of the device to be silicided includes NMOS tra... | 05/29/2007 |
| 7224949 | ESD protection circuit for radio frequency input/output terminals in an integrated circuit An integrated circuit comprises an ESD protection circuit including an inductor coupled between an input terminal and a ground terminal at which an RF signal is applied. The inductor is designed so as to provide a sufficient current capability required in typical ES... | 05/29/2007 |
| 7210002 | System and method for operating dual bank read-while-write flash The disclosed embodiments provide for a system and method for storing data in a flash memory device that has a code bank and a data bank. The method includes writing data to the data bank under control of a flash driver in the code bank when sufficient space is expe... | 04/24/2007 |
| 7190616 | In-service reconfigurable DRAM and flash memory device A memory cell that has both a DRAM cell and a non-volatile memory cell. The non-volatile memory cell might include a flash memory or an NROM cell. The memory cell is comprised of a vertical floating body transistor with dual gates, one on either side of a vertical p... | 03/13/2007 |
| 7186596 | Vertical diode formation in SOI application A method for making a semiconductor device is provided. The method comprises (a) providing a semiconductor stack comprising a semiconductor substrate (203), a first semiconductor layer (205), and a first dielectric layer (207) disposed between t... | 03/06/2007 |
| 7187013 | Avalanche photodiode An avalanche photodiode has improved low-noise characteristics, high-speed response characteristics, and sensitivity. The avalanche photodiode includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, a semiconductor mul... | 03/06/2007 |
| 7173310 | Lateral lubistor structure and method An ESD LUBISTOR structure based on FINFET technology employs a vertical fin (a thin vertical member containing the source, drain and body of the device) in alternatives with and without a gate. The gate may be connected to the external electrode being protected to m... | 02/06/2007 |
| 7170112 | Graded-base-bandgap bipolar transistor having a constant—bandgap in the base A bipolar transistor structure and process technology is described incorporating a emitter, a base, and a collector, with most of the intrinsic base adjacent the collector having a graded energy bandgap and a layer of the intrinsic base adjacent the emitter having a... | 01/30/2007 |
| 7141484 | Electrostatic discharge protection circuit of non-gated diode and fabrication method thereof A non-gated diode structure of a silicon-on-insulator, having a silicon-on-insulator substrate, a pair of isolating structures, a first type doped region and a second type doped region. The silicon-on-insulation substrate has a stack of a substrate, an insulation la... | 11/28/2006 |
| 7138668 | Heterojunction diode with reduced leakage current An aspect of the present invention provides a semiconductor device that includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, having a different band gap from the first semiconductor regio... | 11/21/2006 |
| 7119382 | Heterobipolar transistor and method of fabricating the same The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher t... | 10/10/2006 |
| 7067847 | Semiconductor element On a substrate made of e.g., sapphire single crystal is formed an Al underlayer having FWHM X-ray rocking curve value of 90 seconds or below. A buffer layer is formed on the AlN underlayer and has a composition of AlpGaqIn1−p−qN ... | 06/27/2006 |
