...that the x-ray was discovered purely by accident? When German physicist Wilhelm Konrad von Roentgen was experimenting with cathode rays in 1895, he put an activated Crookes tube in a book and went out to lunch. When he returned, he discovered that a key that had also been placed in the book showed up as an image on the developed film!
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| Number | Title | Issue Date |
| 6852602 | Semiconductor crystal film and method for preparation thereof A multi-layer film 10 is formed by stacking a Si1-x1-y1Gex1Cy1 layer (0≦x1 | 02/08/2005 |
| 6847063 | Semiconductor device In a semiconductor device acting as an HBT, an emitter/base laminate portion is provided on a Si epitaxially grown layer in the SiGeC-HBT. The emitter/base laminate portion includes a SiGeC spacer layer, a SiGeC core base layer containing the boron, a Si cap layer, ... | 01/25/2005 |
| 6847062 | Semiconductor device In a semiconductor device functioning as a SiGeC-HBT, an emitter/base stacked portion 20 is formed on a Si epitaxially grown layer 2. The emitter/base stacked portion 20 includes: a SiGeC spacer layer 21; a SiGeC core base layer 22 | 01/25/2005 |
| 6847098 | Non-floating body device with enhanced performance A method of forming a buried silicon oxide region in a semiconductor substrate with portions of the buried silicon oxide region formed underlying portions of a strained silicon shape, and where the strained silicon shape is used to accommodate a semiconductor device... | 01/25/2005 |
| 6838695 | CMOS device structure with improved PFET gate electrode A semiconductor device structure includes a substrate, a dielectric layer disposed on the substrate, first and second stacks disposed on the dielectric layer. The first stack includes a first silicon layer disposed on the dielectric layer, a silicon germanium layer ... | 01/04/2005 |
| 6831292 | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semi... | 12/14/2004 |
| 6828628 | Diffused MOS devices with strained silicon portions and methods for forming same A diffused MOS device comprises one or more strained silicon portions formed in a carrier transit path of the DMOS device. The one or more strained silicon portions may comprise a layer of strained silicon, generally formed above a layer of lattice mismatch material... | 12/07/2004 |
| 6815802 | Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe bas... | 11/09/2004 |
| 6815707 | Field-effect type semiconductor device for power amplifier In a semiconductor multi-layer structure in which a first SiGe layer having a first conductivity-type and high impurity concentration, a second SiGe layer having the first conductivity-type and a low impurity concentration and a Si layer having a low impurity concen... | 11/09/2004 |
| 6812495 | Ge photodetectors A photodetector device includes a plurality of Ge epilayers that are grown on a substrate and annealed in a defined temperature range. The Ge epilayers form a tensile strained Ge layer that allows the photodetector device to operate efficiently in the C-band and L-b... | 11/02/2004 |
| 6809380 | Semiconductor device formed on an SOI structure with a stress-relief layer A lower buried oxide film, a stress-relief film, an upper buried oxide film, and an SOI film are formed over a semiconductor substrate in this order. The thermal expansion coefficient of the stress-relief film is greater than the thermal expansion coefficient of the... | 10/26/2004 |
| 6791106 | Semiconductor device and method of manufacturing the same An aspect of the present invention includes a first conductive type semiconductor region; a gate electrode formed on the first conductive type semiconductor region; a channel region formed immediately below the gate electrode in the first conductive type semiconduct... | 09/14/2004 |
| 6787793 | Strained Si device with first SiGe layer with higher Ge concentration being relaxed to have substantially same lattice constant as second SiGe layer with lower Ge concentration A semiconductor device comprises a first Si1−αGeα film, a first cap film, a second Si1−βGeβ film (β | 09/07/2004 |
| 6784450 | Graded base GaAsSb for high speed GaAs HBT A heterojunction bipolar transistor is provided having an improved current gain cutoff frequency. The heterojunction bipolar transistor includes a graded base layer formed from antimony. The graded base allows the heterojunction bipolar transistor to establish a qua... | 08/31/2004 |
| 6784035 | Field effect transistor having source and/or drain forming Schottky or Schottky-like contact with strained semiconductor substrate The present invention is a field effect transistor having a strained semiconductor substrate and Schottky-barrier source and drain electrodes, and a method for making the transistor. The bulk charge carrier transport characteristic of the Schottky barrier field effe... | 08/31/2004 |
| 6774411 | Bipolar transistor with reduced emitter to base capacitance According to a disclosed embodiment, a base region is grown on a transistor region. A dielectric layer is next deposited over the base region. The dielectric layer can comprise, for example, silicon dioxide, silicon nitride, or a suitable low-k dielectric. Subsequen... | 08/10/2004 |
| 6774390 | Semiconductor device A semiconductor device includes an insulating layer, a semiconductor board formed on a selected portion of the insulating layer, a semiconductor layer formed on at least one of the major side surfaces of the semiconductor board, which is different from the semicondu... | 08/10/2004 |
| 6774460 | IMPATT diodes The present invention relates to an impact ionisation avalanche transit time (IMPATT) diode device comprising an avalanche region and a drift region, wherein at least one narrow bandgap region, with a bandgap narrower than the bandgap in the avalanche region, is loc... | 08/10/2004 |
| 6770912 | Semiconductor device and method for producing the same A semiconductor device includes a SiC substrate and an ohmic electrode, a semiconductor member including a SiC member and a SiGe member being formed between the SiC substrate and the ohmic electrode, wherein the semiconductor member is composed of a SiGe member form... | 08/03/2004 |
| 6768754 | Quantum dot tunable external cavity lasers (QD-TEC lasers) A laser system includes a laser diode with a low dimensional nanostructure, such as quantum dots or quantum wires, for emitting light over a wide range of wavelengths. An external cavity is used to generate laser light at a wavelength selected by a wavelength-select... | 07/27/2004 |
| 6765227 | Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer and method of fabrication using wafer bonding A semiconductor-on-insulator (SOI) wafer. The wafer includes a silicon substrate, a buried oxide (BOX) layer disposed on the substrate, and an active layer disposed on the box layer. The active layer has an upper silicon layer disposed on a silicon-germanium layer. ... | 07/20/2004 |
| 6759712 | Semiconductor-on-insulator thin film transistor constructions The invention includes SOI thin film transistor constructions, memory devices, computer systems, and methods of forming various structures, devices and systems. The structures typically comprise a thin crystalline layer of silicon/germanium formed over a wide range ... | 07/06/2004 |
| 6756604 | Si-Ge base heterojunction bipolar device A bipolar transistor is disclosed that is produced using a sacrificial mesa disposed over a layer of Si and SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the Si and SiGe layer forming the transistor base. After an ... | 06/29/2004 |
| 6737670 | Semiconductor substrate structure A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey | 05/18/2004 |
| 6734453 | Devices with optical gain in silicon A photonic device includes a silicon semiconductor based superlattice. The superlattice has a plurality of layers that form a plurality of repeating units. At least one of the layers in the repeating unit is an optically active layer with at least one species of rar... | 05/11/2004 |
| 6724008 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits Structures and methods for fabricating high speed digital, analog, and combined digital/analog systems using planarized relaxed SiGe as the materials platform. The relaxed SiGe allows for a plethora of strained Si layers that possess enhanced electronic properties. ... | 04/20/2004 |
| 6717213 | Creation of high mobility channels in thin-body SOI devices A method for fabricating a strained silicon film to a silicon on insulation (SOI) wafer. A layer of oxide is deposited onto a wafer that has a stack structure of a first base substrate, a layer of relaxed film and a second layer of strained film. The SOI wafer has a... | 04/06/2004 |
| 6713819 | SOI MOSFET having amorphized source drain and method of fabrication An integrated circuit formed in semiconductor-on-insulator format. The integrated circuit includes a layer of semiconductor material disposed on an insulating layer, where the insulating layer disposed on a substrate. A first and a second MOSFET are provided such th... | 03/30/2004 |
| 6713810 | Non-volatile devices, and electronic systems comprising non-volatile devices The invention includes non-volatile memory and logic devices associated with crystalline Si/Ge. The devices can include TFT constructions. The non-volatile devices include a floating gate or floating plate over the Si/Ge, and a pair of source/drain regions. The sour... | 03/30/2004 |
| 6713779 | Semiconductor device and method of manufacturing the same An object of the invention is to provide a complete depletion-mode SOI field-effect transistor in which transistors having different threshold voltages are integrated. A SiGe film having a high Ge composition and a SiGe film having a low Ge composition are formed on... | 03/30/2004 |
| 6710407 | Semiconductor device having smooth refractory metal silicide layers and process for fabrication thereof A p-channel type field effect transistor incorporated in a semiconductor device has a gate electrode on a gate insulating layer, and the gate electrode is constituted by an amorphous silicon layer on the gate insulating layer, a silicon-germanium layer on the amorph... | 03/23/2004 |
| 6710382 | Semiconductor device and method for fabricating the same A silicon germanium layer is deposited over a semiconductor substrate with a gate insulating film interposed between the substrate and the silicon germanium layer. Then, an upper silicon layer in an amorphous state is deposited on the silicon germanium layer. Therea... | 03/23/2004 |
| 6709912 | Dual Si-Ge polysilicon gate with different Ge concentrations for CMOS device optimization A method for forming a dual Si—Ge poly-gates having different Ge concentrations is described. An NMOS active area and a PMOS active area are provided on a semiconductor substrate separated by an isolation region. A gate oxide layer is grown overlying the semicondu... | 03/23/2004 |
| 6707062 | Transistor in a semiconductor device with an elevated channel and a source drain The present invention relates to a transistor in a semiconductor device and method of manufacturing the same, more particularly to a new dual gate P+ salicide forming technology having an elevated channel and a source/drain using the selective SiGe epi-si... | 03/16/2004 |
| 6707132 | High performance Si-Ge device module with CMOS technology A semiconductor device wherein some parts of a circuit are disposed on Si—Ge regions and others are implemented in Silicon substrate regions of the chip. The Si—Ge region provides that carrier flow is forced to the surface channel region which helps reduce short... | 03/16/2004 |
| 6690064 | Thin-film semiconductor device containing poly-crystalline Si-Ge alloy and method for producing thereof A thin film transistor is provided containing polycrystalline Si--Ge alloy. A high performance TFT may be provided having crystal structure restraining both current scattering in a grain boundary and surface roughness by introduction of Ge into Si. An ima... | 02/10/2004 |
| 6680496 | Back-biasing to populate strained layer quantum wells Transistors including a buried channel layer intermediate to a source and a drain and a surface layer intermediate to the buried layer and a gate are operated so as to cause current between the source and the drain to flow predominately through the buried... | 01/20/2004 |
| 6674099 | MISFET A metal insulator semiconductor field effect transistor (MISFET) is disclosed comprising a source layer being made with a material having a source band-gap (EG2) and a source mid-gap value (EGM2), the source layer having a source Fermi-Level (EF2). A drai... | 01/06/2004 |
| 6667491 | Semiconductor device A semiconductor device includes a silicon semiconductor substrate, having a main surface including a first region and a second region side-by-side, an epitaxially grown layer of high resistivity as a first layer on the main surface, and an epitaxially gro... | 12/23/2003 |
| 6667489 | Heterojunction bipolar transistor and method for production thereof A high-speed heterojunction bipolar transistor in a large injection of electrons from the emitter and a method for production thereof. In a typical example of the SiGeC heterojunction bipolar transistor, the collector has a layer of n-type single-crystal ... | 12/23/2003 |