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| Number | Title | Issue Date |
| 8115195 | Semiconductor wafer with a heteroepitaxial layer and a method for producing the wafer A multilayer semiconductor wafer has a substrate wafer having a first side and a second side; a fully or partially relaxed heteroepitaxial layer deposited on the first side of the substrate wafer; and a stress compensating layer deposited on the second side of the s... | 02/14/2012 |
| 8115196 | High performance SiGe:C HBT with phosphorous atomic layer doping A base structure for high performance Silicon Germanium:Carbon (SiGe:C) based heterojunction bipolar transistors (HBTs) with phosphorus atomic layer doping (ALD) is disclosed. The ALD process subjects the base substrate to nitrogen gas (in ambient temperature approx... | 02/14/2012 |
| 8053759 | Ion implantation for suppression of defects in annealed SiGe layers A substrate material including a Si-containing substrate and an insulating region that is resistant to Ge diffusion present atop the Si-containing substrate. The substrate material further includes a substantially relaxed SiGe alloy layer present atop the insulating... | 11/08/2011 |
| 8035098 | Transistor with asymmetric silicon germanium source region The present invention is directed to a transistor with an asymmetric silicon germanium source region, and various methods of making same. In one illustrative embodiment, the transistor includes a gate electrode formed above a semiconducting substrate comprised of si... | 10/11/2011 |
| 7999250 | Silicon-germanium-carbon semiconductor structure In accordance with one or more embodiments, a semiconductor structure includes a semiconductor substrate, a first semiconductor material over the semiconductor substrate, and a second semiconductor material over a portion the first semiconductor material, wherein th... | 08/16/2011 |
| 7964865 | Strained silicon on relaxed sige film with uniform misfit dislocation density A method for forming a semiconductor substrate structure is provided. A compressively strained SiGe layer is formed on a silicon substrate. Atoms are ion-implanted onto the SiGe layer to cause end-of-range damage. Annealing is performed to relax the strained SiGe la... | 06/21/2011 |
| 7884353 | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semi... | 02/08/2011 |
| 7884354 | Germanium on insulator (GOI) semiconductor substrates Germanium on insulator (GOI) semiconductor substrates are generally described. In one example, a GOI semiconductor substrate comprises a semiconductor substrate comprising an insulative surface region wherein a concentration of dopant in the insulative surface regio... | 02/08/2011 |
| 7884352 | Single-crystal semiconductor layer with heteroatomic macronetwork The invention relates to a single-crystal layer of a first semiconductor material including single-crystal nanostructures of a second semiconductor material, the nanostructures being distributed in a regular crystallographic network with a centered tetragonal prism.... | 02/08/2011 |
| 7868318 | Quantum well field-effect transistors with composite spacer structures, apparatus made therewith, and methods of using same A quantum well (QW) layer is provided in a semiconductive device. The QW layer is covered with a composite spacer above QW layer. The composite spacer includes an InP spacer first layer and an InAlAs spacer second layer above and on the InP spacer first layer. The s... | 01/11/2011 |
| 7858964 | Semiconductor device formed in a recrystallized layer A semiconductor device includes a substrate that includes a first layer and a recrystallized layer on the first layer. The first layer has a first intrinsic stress and the recrystallized layer has a second intrinsic stress. A transistor is formed in the recrystalliz... | 12/28/2010 |
| 7825401 | Strained layers within semiconductor buffer structures A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The a... | 11/02/2010 |
| 7825400 | Strain-inducing semiconductor regions A method to form a strain-inducing semiconductor region is described. In one embodiment, formation of a strain-inducing semiconductor region laterally adjacent to a crystalline substrate results in a uniaxial strain imparted to the crystalline substrate, providing a... | 11/02/2010 |
| 7816664 | Defect reduction by oxidation of silicon A high-quality, substantially relaxed SiGe-on-insulator substrate material which may be used as a template for strained Si is described. The substantially relaxed SiGe-on-insulator substrate includes a Si-containing substrate, an insulating region that is resistant ... | 10/19/2010 |
| 7791064 | Semiconductor device and fabrication method thereof A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewa... | 09/07/2010 |
| 7786469 | Thermal sensor with a silicon/germanium superlattice structure A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first subst... | 08/31/2010 |
| 7786468 | Layer transfer of low defect SiGe using an etch-back process A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polis... | 08/31/2010 |
| 7750338 | Dual-SiGe epitaxy for MOS devices A semiconductor includes a semiconductor substrate, a gate stack on the semiconductor substrate, and a stressor having at least a portion in the semiconductor substrate and adjacent to the gate stack. The stressor includes a first stressor region and a second stress... | 07/06/2010 |
| 7718993 | Pattern enhancement by crystallographic etching A method for producing predetermined shapes in a crystalline Si-containing material that have substantially uniform straight sides or edges and well-defined inside and outside corners is provided together with the structure that is formed utilizing the method of the... | 05/18/2010 |
| 7705345 | High performance strained silicon FinFETs device and method for forming same A strained Fin Field Effect Transistor (FinFET) (and method for forming the same) includes a relaxed first material having a sidewall, and a strained second material formed on the sidewall of the first material. The relaxed first material and the strained second mat... | 04/27/2010 |
| 7683362 | Semiconductor device and production method thereof A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially ... | 03/23/2010 |
| 7675055 | Strained complementary metal oxide semiconductor (CMOS) on rotated wafers and methods thereof The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a ... | 03/09/2010 |
| 7667227 | Semiconductor device and fabrication method thereof A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewa... | 02/23/2010 |
| 7659537 | Field effect transistor A field effect transistor comprises a source and a drain, and a channel layer of Si1-x-yGexCy crystal (1>x>0, 1>y≧0). Ge composition increases toward a drain end, in a vicinity of a source end of the channel layer. ... | 02/09/2010 |
| 7652282 | Semiconductor wafer, devices made therefrom, and method of fabrication A main semiconductor region of semiconducting nitrides is formed on a silicon substrate via a buffer region of semiconducting nitrides to provide devices such as HEMTs, MESFETs and LEDs. In order to render the wafer proof against warping, the buffer region is divide... | 01/26/2010 |
| 7619239 | Semiconductor device and method of manufacturing the same A semiconductor device includes an n-channel MIS transistor and a p-channel MIS transistor on a semiconductor layer formed on an insulating layer, in which the channel of the n-channel MIS transistor is formed of a strained Si layer having biaxial tensile strain and... | 11/17/2009 |
| 7612364 | MOS devices with source/drain regions having stressed regions and non-stressed regions A semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a stressor having at least a portion in the semiconductor substrate and adjacent to the gate stack, wherein the stressor comprises an impurity of a first condu... | 11/03/2009 |
| 7612365 | Strained silicon with elastic edge relaxation A thin blanket epitaxial layer of SiGe is grown on a silicon substrate to have a biaxial compressive stress in the growth plane. A thin epitaxial layer of silicon is deposited on the SiGe layer, with the SiGe layer having a thickness less than its critical thickness... | 11/03/2009 |
| 7592619 | Epitaxy layer and method of forming the same A method of forming an epitaxial layer of uniform thickness is provided to improve surface flatness. A substrate is first provided and a Si base layer is then formed on the substrate by epitaxy. A Si—Ge layer containing 5 to 10% germanium is formed on the Si base ... | 09/22/2009 |
| 7579617 | Semiconductor device and production method thereof A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially ... | 08/25/2009 |
| 7569848 | Mobility enhanced CMOS devices Compressive or tensile materials are selectively introduced beneath and in alignment with spacer areas and adjacent to channel areas of a semiconductor substrate to enhance or degrade electron and hole mobility in CMOS circuits. A process entails steps of creating d... | 08/04/2009 |
| 7507988 | Semiconductor heterostructure including a substantially relaxed, low defect density SiGe layer A heterostructure is provided which includes a substantially relaxed SiGe layer present atop an insulating region that is located on a substrate. The substantially relaxed SiGe layer has a thickness of from about 2000 nm or less, a measured lattice relaxation of fro... | 03/24/2009 |
| 7507989 | Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI) A semiconductor structure for use as a template for forming high-performance metal oxide semiconductor field effect transistor (MOSFET) devices is provided. More specifically, the present invention provides a structure that includes a SiGe-on-insulator substrate inc... | 03/24/2009 |
| 7498602 | Protecting silicon germanium sidewall with silicon for strained silicon/silicon mosfets Raised Si/SiGe source and drain regions include epitaxially grown silicon on SiGe sidewalls. The epi silicon prevents adverse effects of Ge during silicidation, including Ge out diffusion and silicide line breakage. The Si also increases the active area. ... | 03/03/2009 |
| 7495250 | Integrated circuit structures having a boron- and carbon-doped etch-stop and methods, devices and systems related thereto A method for forming an etch-stop layer and a resulting structure fabricated therefrom. The etch-stop layer is a silicon-germanium layer having a ratio of silicon to germanium of about 50:1 or less, a boron layer formed within the silicon-germanium layer where the b... | 02/24/2009 |
| 7491966 | Semiconductor substrate and process for producing it A process for producing a semiconductor substrate comprising a carrier wafer and a layer of single-crystalline semiconductor material: a) producing a layer containing recesses at the surface of a donor wafer of single-crystalline s... | 02/17/2009 |
| 7449712 | CMOS image sensor and method for fabricating the same A CMOS image sensor includes a substrate including silicon, a silicon germanium (SiGe) epitaxial layer formed over the substrate, the SiGe epitaxial layer formed through epitaxial growth and doped with a predetermined concentration level of impurities, an undoped si... | 11/11/2008 |
| 7442993 | Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer A method of forming a semiconductor structure comprising a first strained semiconductor layer over an insulating layer is provided in which the first strained semiconductor layer is relatively thin (less than about 500 Å) and has a low defect density (stacking fau... | 10/28/2008 |
| 7436035 | Method of fabricating a field effect transistor structure with abrupt source/drain junctions Microelectronic structures embodying the present invention include a field effect transistor (FET) having highly conductive source/drain extensions. Formation of such highly conductive source/drain extensions includes forming a passivated recess which is back filled... | 10/14/2008 |
| 7435987 | Forming a type I heterostructure in a group IV semiconductor In one embodiment, the present invention includes a method for forming a transistor that includes forming a first buffer layer of silicon germanium tin (SiGe(Sn)) on a silicon (Si) substrate, forming a barrier layer on the first buffer layer, the barrier layer compr... | 10/14/2008 |
