Bizarre Patents
Crispy Chip Sandwich and Process of Producing a Sandwich Product
A food product comprising a multilayer cookie or snack having outer layers formed from a crispy type edible food product such as a potato chip or corn chip, etc. with an intermediate marshmallow layer being in contact with the inner surface of each crispy chip and one or more filler substances.
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| Number | Title | Issue Date |
| 8110853 | Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication A semiconductor structure. The semiconductor structure includes a semiconductor substrate, a first transistor on the semiconductor substrate, and a guard ring on the semiconductor substrate. The semiconductor substrate includes a top substrate surface which defines ... | 02/07/2012 |
| 8076695 | Semiconductor device A semiconductor device comprises a semiconductor substrate having a first semiconductor region of a first semiconductor type, a second semiconductor region of a second conductivity type extended in the first semiconductor region, and a mesa area forming a slope alon... | 12/13/2011 |
| 7893459 | Seal ring structures with reduced moisture-induced reliability degradation A semiconductor chip includes a seal ring adjacent to edges of the semiconductor chip; an opening extending from a top surface to a bottom surface of the seal ring, wherein the opening has a first end on an outer side of the seal ring and a second end on an inner si... | 02/22/2011 |
| 7808014 | Semiconductor device having insulated gate bipolar transistor A semiconductor device includes a semiconductor layer including a base region of a second conductive type formed in a first surface of the semiconductor layer, an emitter region of the first conductive type formed in the base region, a buffer layer of the first cond... | 10/05/2010 |
| 7629626 | Semiconductor device having insulated gate bipolar transistor One of the aspects of the present invention is to provide a semiconductor device, which includes a semiconductor layer of a first conductive type having first and second surfaces. The semiconductor layer includes a base region of a second conductive type formed in t... | 12/08/2009 |
| 7491982 | Diode having low forward voltage drop A semiconductor device, including: a semiconductor substrate of the first conductivity type having a first surface and a second surface; a base region of the second conductivity type formed on the first surface of the semiconductor substrate; a guard ring region of ... | 02/17/2009 |
| 7408206 | Method and structure for charge dissipation in integrated circuits Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation ... | 08/05/2008 |
| 7409660 | Method and end cell library for avoiding substrate noise in an integrated circuit A method of avoiding substrate noise in an integrated circuit includes steps of receiving as input an integrated circuit design that includes at least a portion of a block for placement and routing on a substrate and an outer boundary of the block. An end cell is se... | 08/05/2008 |
| 7399999 | Semiconductor device In a conventional semiconductor device, there was a problem that, in a guard ring region, a shape of a depletion layer is distorted and stable withstand voltage characteristics cannot be obtained. In a semiconductor device of the present invention, a thermal oxide f... | 07/15/2008 |
| 7391093 | Semiconductor device with a guard-ring structure and a field plate formed of polycrystalline silicon film embedded in an insulating film A semiconductor device has a semiconductor device chip with upper and lower terminal electrodes, and upper and lower frames bonded to the upper and lower terminal electrodes, respectively, with solder material, wherein the semiconductor device chip includes: a semic... | 06/24/2008 |
| 7301179 | Semiconductor device having a high breakdown voltage transistor formed thereon An ion-through region 100, 102 is provided as a first opening in a passivation film 90 on a source electrode 70 and a drain electrode 80. The passivation film 90 is coated with a sealing resin to package the semiconductor device. A... | 11/27/2007 |
| 7282750 | Semiconductor component comprising areas with a high platinum concentration A structure formed in a semiconductor substrate having at least one area having a high concentration of atoms of a metal such as platinum or gold, in which the area is surrounded with at least one first trench penetrating into the substrate. ... | 10/16/2007 |
| 7280143 | CMOS image sensor with active reset and 4-transistor pixels A CMOS image sensor implementing a low noise active reset operation uses control circuitry outside a pixel sensor array and transistors in a pixel sensor as parts of an amplifier that charges a photodiode node. In one configuration, a reference transistor in the con... | 10/09/2007 |
| 7276743 | Retaining ring with conductive portion A retaining ring for use with electrochemical mechanical processing is described. The retaining ring has a generally annular body formed with a conductive portion and a non-conductive portion. The non-conductive portion contacts the substrate during polishing. The c... | 10/02/2007 |
| 7274077 | Trench transistor A trench transistor has a cell array, in which at least one cell array trench (2) is provided, and an edge structure framing the cell array. An edge trench (15) spaced apart from the cell array trenches (2) is provided in the edge structure.... | 09/25/2007 |
| 7260422 | Monolithic optical autocompensation read-out circuit for distance dependent loudness control in mobile phones A circuit and method are given, to realize a loudness control for mobile phone earpieces and speakers with the help of a proximity sensor, which is realized as an infrared photo-electric guard circuit, where only very few external parts are needed. As a novelty here... | 08/21/2007 |
| 7247888 | Film forming ring and method of manufacturing semiconductor device There is here disclosed a film forming ring including a ring main body being made of an insulating material and formed in an annular shape along an edge of a substrate on which a film forming process by using a material gas in a plasma state is applied, and an inner... | 07/24/2007 |
| 7193255 | Semiconductor device with floating conducting region placed between device elements Floating conducting regions at floating potentials are placed on a substrate surface between adjacent conducting regions to which predetermined potentials are applied. This makes it possible to block the spread of a depletion layer to the substrate between the condu... | 03/20/2007 |
| 7173310 | Lateral lubistor structure and method An ESD LUBISTOR structure based on FINFET technology employs a vertical fin (a thin vertical member containing the source, drain and body of the device) in alternatives with and without a gate. The gate may be connected to the external electrode being protected to m... | 02/06/2007 |
| 7161192 | Silicon controlled rectifier A silicon controlled rectifier is provided, including: a first conducting-type substrate; two second conducting-type deep wells separately disposed inside the first conducting-type substrate; a gate above the first conducting-type substrate and between the two secon... | 01/09/2007 |
| 7151302 | Method and apparatus for maintaining topographical uniformity of a semiconductor memory array A semiconductor device includes a memory array having a plurality of non-volatile memory cells. Each non-volatile memory cell of the plurality of non-volatile memory cells has a gate stack. The gate stack includes a control gate and a discrete charge storage layer s... | 12/19/2006 |
| 7135718 | Diode device and transistor device A semiconductor device having improved breakdown voltage is provided. A diode device of the present invention includes relay diffusion layers provided between guard ring portions. Therefore, a depletion layer expanded outward from the guard ring portions except the ... | 11/14/2006 |
| 7132696 | Intermeshed guard bands for multiple voltage supply structures on an integrated circuit, and methods of making same The present invention is generally directed to intermeshed guard bands for multiple voltage supply regions or structures on an integrated circuit, and methods of making same. In one illustrative embodiment, an integrated circuit is provided that comprises a pluralit... | 11/07/2006 |
| 7129544 | Vertical compound semiconductor field effect transistor structure In one embodiment, a compound semiconductor vertical FET device (11) includes a first trench (29) formed in a body of semiconductor material (13), and a second trench (34) formed within the first trench (29) to define a channel reg... | 10/31/2006 |
| 7110229 | ESD protection circuit and display panel using the same An ESD protection circuit for low temperature poly-silicon thin film transistor panel and a display panel using the same. The feature of the ESD protection circuit comprises an ESD detection circuit disposed between a first power line and a second power line, for ou... | 09/19/2006 |
| 7084044 | Optoelectronic device and method of manufacture thereof The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over... | 08/01/2006 |
| 7053453 | Substrate contact and method of forming the same A substrate contact and semiconductor chip, and methods of forming the same. The substrate contact is employable with a semiconductor chip formed from a semiconductor substrate and includes a seal ring region about a periphery of an integrated circuit region. In one... | 05/30/2006 |
| 7049675 | High withstand voltage semiconductor device A high withstand voltage semiconductor device does not show any significant fall of its withstand voltage if the impurity concentration of the RESURF layer of a low impurity concentration semiconductor region thereof varies from the optimal level and/or influenced b... | 05/23/2006 |
| 7030426 | Power semiconductor component in the planar technique In a power semiconductor component produced in a planar technique, a near-surface structure having at least one depression is formed in a surface region of an edge termination adjacent a main surface of the semiconductor body. The structure lies inside a space charg... | 04/18/2006 |
| 7009222 | Protective metal structure and method to protect low-K dielectric layer during fuse blow process A method to protect a low-K IMD layer underlying a fuse link during a fuse blowing process including a guarded fuse and method for forming the same including forming a fuse portion comprising two metal fuse interconnect structures and a guard ring comprising a metal... | 03/07/2006 |
| 6967356 | Vertical component with high-voltage strength The invention concerns a vertical component with a four-layered structure comprising a thick lightly-doped zone (1) of a first type of conductivity providing the component voltage strength, enclosed with a peripheral wall (2) of a second type of conduc... | 11/22/2005 |
| 6963088 | Semiconductor component A semiconductor component is arranged in a semiconductor body and has at least one integrated radially symmetrical lateral resistance having a location-dependent sheet resistance, the radial dependence of which is preferably configured such that the differential res... | 11/08/2005 |
| 6949766 | Method of deforming a pattern and semiconductor device formed by utilizing deformed pattern A method of deforming a pattern comprising the steps of: forming, over a substrate, a layered-structure with an upper surface including at least one selected region and at least a re-flow stopper groove, wherein the re-flow stopper groove extends outside the selecte... | 09/27/2005 |
| 6949775 | Semiconductor device having a guard ring A semiconductor device has a guard ring in a multilayer interconnection structure, wherein the guard ring includes a conductive wall extending zigzag in a plane parallel with a principal surface of a substrate. ... | 09/27/2005 |
| 6940131 | MOS ESD CDM clamp with integral substrate injection guardring and method for fabrication The present invention includes a MOS device (100) that has a P-type substrate (102) and an N-type drain region (104) formed within the substrate (102). An annular N-type source region (106) generally surrounds the drain region (... | 09/06/2005 |
| 6936911 | Semiconductor integrated circuit device A semiconductor integrated circuit device has a semiconductor integrated circuit chip, a package enclosing the chip, and a plurality of conductors connecting the bonding pads of the chip to the leads of the package. The chip has an internal circuit, a plurality of b... | 08/30/2005 |
| 6911692 | Semiconductor device A MOS semiconductor device includes n−-type surface regions, which are extended portions of an n−-type drift layer 12 extended to the surface of the semiconductor chip. Each n−-type surface region 14 is shaped wit... | 06/28/2005 |
| 6870201 | High voltage resistant edge structure for semiconductor components The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floatin... | 03/22/2005 |
| 6838771 | Semiconductor device having conductor layers stacked on a substrate As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked ... | 01/04/2005 |
| 6835997 | Thyristor-based device with trench dielectric material A thyristor-based semiconductor device includes a thyristor body that has at least one region in the substrate and a thyristor control port in a trenched region of the device substrate. According to an example embodiment of the present invention, the trench is at le... | 12/28/2004 |
