Bizarre Patents
A sealed crustless sandwich for providing a convenient sandwich without an outer crust which can be stored for long periods of time without a central filling from leaking outwardly.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8066894 | Substrate processing method and substrate processing apparatus A substrate can be appropriately oxidized, while oxidation of the substrate can be suppressed. The present invention includes a step of generating mixed plasma by causing a mixed gas of hydrogen (H2) gas and oxygen (O2) or oxygen-containing gas supplied to a ... | 11/29/2011 |
| 7359177 | Dual bias frequency plasma reactor with feedback control of E.S.C. voltage using wafer voltage measurement at the bias supply output A plasma reactor has a dual frequency plasma RF bias power supply furnishing RF bias power comprising first and second frequency components, f(1), f(2), respectively, and an RF power path having an input end coupled to the plasma RF bias power supply a... | 04/15/2008 |
| 7344996 | Helium-based etch process in deposition-etch-deposition gap fill Plasma etch processes incorporating helium-based etch chemistries can remove dielectric a semiconductor applications. In particular, high density plasma chemical vapor etch-enhanced (deposition-etch-deposition) gap fill processes incorporating etch chemistries which... | 03/18/2008 |
| 7335602 | Charge-free layer by layer etching of dielectrics A method for etching a dielectric film is provided herein. In accordance with the method, a device (201) is provided which comprises a first chamber (203) equipped with a first gas supply (209) and a second chamber (205) equipped with a s... | 02/26/2008 |
| 7311852 | Method of plasma etching low-k dielectric materials A semiconductor manufacturing process wherein a low-k dielectric layer is plasma etched with selectivity to an overlying mask layer. The etchant gas can be oxygen-free and include a fluorocarbon reactant, a nitrogen reactant and an optional carrier gas, the fluoroca... | 12/25/2007 |
| 7303999 | Multi-step method for etching strain gate recesses Methods of performing controllable lateral etches into the silicon layer using a plasma-enhanced etch-deposit-etch sequence are disclosed. The first etch step etches into the silicon layer. The deposition step passivates horizontal surfaces, including the bottom of ... | 12/04/2007 |
| 7288487 | Metal/oxide etch after polish to prevent bridging between adjacent features of a semiconductor structure Methods for eliminating and/or mitigating bridging and/or leakage caused by the contamination of a dielectric layer with fragments and/or residues of a conductive material are disclosed. The methods involve exposing a semiconductor substrate with a dielectric layer ... | 10/30/2007 |
| 7273566 | Gas compositions Processes, etchants, and apparatus useful for etching an insulating oxide layer of a substrate without damaging underlying nitride features or field oxide regions. The processes exhibit good selectivity to both nitrides and field oxides. Integrated circuits produced... | 09/25/2007 |
| 7270761 | Fluorine free integrated process for etching aluminum including chamber dry clean A fluorine-free integrated process for plasma etching aluminum lines in an integrated circuit structure including an overlying anti-reflection coating (ARC) and a dielectric layer underlying the aluminum, the process being preferably performed in a single plasma rea... | 09/18/2007 |
| 7262137 | Dry etching process for compound semiconductors Accordingly, this invention relates to an dry etching process for semiconductor wafers. More particularly, the present invention discloses a dry etching process including a halogen etchant (24) and a nitrogen gas (28) that selectively etches a compound... | 08/28/2007 |
| 7256135 | Etching method and computer storage medium storing program for controlling same An etching method of the present invention includes a first and a second process. In the first process, pattern widths of a pre-patterned mask layer are increased by depositing plasma reaction products on sidewalls of the mask layer. In the second process, a layer t... | 08/14/2007 |
| 7247573 | Process for forming tapered trenches in a dielectric material A process for forming a tapered trench in a dielectric material includes the steps of forming a dielectric layer on a semiconductor wafer, and plasma etching the dielectric layer; during the plasma etch, the dielectric layer is chemically and physically etched simul... | 07/24/2007 |
| 7247218 | Plasma density, energy and etch rate measurements at bias power input and real time feedback control of plasma source and bias power A plasma reactor process measurement instrument includes an input phase processor receiving wafer bias voltage, current and power and computing an input impedance, an input current and an input voltage to the transmission line; a transmission line processor for comp... | 07/24/2007 |
| 7229929 | Multi-layer gate stack A method of making a semiconductor structure, comprises etching a nitride layer with a plasma to form a patterned nitride layer. The nitride layer is on a semiconductor substrate, a photoresist layer is on the nitride layer, and the plasma is prepared from a gas mix... | 06/12/2007 |
| 7227244 | Integrated low k dielectrics and etch stops A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition condi... | 06/05/2007 |
| 7226868 | Method of etching high aspect ratio features A plasma processing system for and method of utilizing an improved etch chemistry for effectively etching high aspect ratio silicon features. The process chemistry employs precursor gases suitable for producing a fluorine/chlorine etch chemistry as well as precursor... | 06/05/2007 |
| 7223701 | In-situ sequential high density plasma deposition and etch processing for gap fill During microelectronic processing of a substrate, a gap on the substrate surface may be filled with a material by alternating deposition and etch processes while the substrate remains in the same process chamber. Alternating deposition and etch processes allows the ... | 05/29/2007 |
| 7220937 | Plasma reactor with overhead RF source power electrode with low loss, low arcing tendency and low contamination A gas distribution ceiling electrode for use as a capacitive source power applicator and gas distribution showerhead in a plasma reactor includes a metal base and a process-compatible protective layer on the interior surface of he electrode having a dopant impurity ... | 05/22/2007 |
| 7199046 | Structure comprising tunable anti-reflective coating and method of forming thereof An interconnect structure in back end of line (BEOL) applications comprising a tunable etch resistant anti-reflective (TERA) coating is described. The TERA coating can, for example, be incorporated within a single damascene structure, or a dual damascene structure. ... | 04/03/2007 |
| 7196283 | Plasma reactor overhead source power electrode with low arcing tendency, cylindrical gas outlets and shaped surface An overhead gas distribution electrode forming at least a portion of the ceiling of a plasma reactor has a bottom surface facing a processing zone of the reactor. The electrode includes a gas supply manifold for receiving process gas at a supply pressure at a top po... | 03/27/2007 |
| 7196017 | Method for etching smooth sidewalls in III-V based compounds for electro-optical devices III-V based compounds are etched to produce smooth sidewalls for electro-optical applications using BCl3 together with chemistries of CH4 and H2 in RIE and/or ICP systems. HI or IBr or some combination of group VII gaseous species (B... | 03/27/2007 |
| 7192880 | Method for line etch roughness (LER) reduction for low-k interconnect damascene trench etching The present invention provides a method for etching a substrate 100. The method includes conducting a first etch on an anti-reflective layer 170 and a portion of a hardmask layer 140, 150 to form an opening 162 in the substrate 100... | 03/20/2007 |
| 7186943 | MERIE plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression A plasma reactor for processing a semiconductor workpiece, includes a reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor support, the electrode comprising a portion of the chamber wall, an RF power generator for su... | 03/06/2007 |
| 7169440 | Method for removing photoresist and etch residues A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias ... | 01/30/2007 |
| 7169715 | Forming a dielectric layer using porogens In one embodiment, the present invention includes introducing a conventional precursor and an organic precursor having an organic porogen into a vapor deposition apparatus; and forming a dielectric layer having the organic porogen on a substrate within the vapor dep... | 01/30/2007 |
| 7166536 | Methods for plasma etching of silicon A method of plasma etching, in particular of anisotropic plasma etching, of laterally defined structures in a silicon substrate, using a process gas, includes having at least one passivating material precipitated on the side walls of the laterally defined structures... | 01/23/2007 |
| 7166816 | Inductively-coupled torodial plasma source Apparatus for dissociating gases includes a plasma chamber comprising a gas. A first transformer having a first magnetic core surrounds a first portion of the plasma chamber and has a first primary winding. A second transformer having a second magnetic core surround... | 01/23/2007 |
| 7166538 | Method for fabricating semiconductor device After forming a gate insulating film on a semiconductor substrate, a silicon film is deposited on the gate insulating film, and a high-melting point metal film is deposited on the silicon film. After forming a hard mask made of a silicon oxide film or a silicon nitr... | 01/23/2007 |
| 7160813 | Etch back process approach in dual source plasma reactors A method is disclosed for removing a polysilicon layer from a semiconductor wafer, in which a downstream plasma source is used first to planarize the wafer, removing contours in the polysilicon layer caused by deposition over lithographic features, such as via holes... | 01/09/2007 |
| 7161112 | Toroidal low-field reactive gas source An apparatus for dissociating gases includes a plasma chamber that may be formed from a metallic material and a transformer having a magnetic core surrounding a portion of the plasma chamber and having a primary winding. The apparatus also includes one or more switc... | 01/09/2007 |
| 7148151 | Dry etching method, fabrication method for semiconductor device, and dry etching apparatus When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically,... | 12/12/2006 |
| 7141757 | Plasma reactor with overhead RF source power electrode having a resonance that is virtually pressure independent A plasma reactor operable over a very wide process window of pressure, source power and bias power includes a resonant circuit consisting of an overhead electrode having a first impedance, a wafer support pedestal having a second impedance and a bulk plasma having a... | 11/28/2006 |
| 7132618 | MERIE plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression A plasma reactor for processing a semiconductor workpiece, includes reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor support, the electrode comprising a portion of the chamber wall, an RF power generator for supp... | 11/07/2006 |
| 7125496 | Etching method using photoresist etch barrier A method of etching is disclosed using a photoresist etch barrier formed by an exposure with a light source of which wavelength is in the range of 157 nm to 193 nm, such as an argon fluoride(ArF) laser or fluorine laser(F2 laser), the method includes the ... | 10/24/2006 |
| 7125645 | Composite photoresist for pattern transferring A composite photoresist structure includes an first organic layer located on a substrate, a sacrificial layer located on the first organic layer, and a second organic layer located on the sacrificial layer. The first organic layer is made of materials that can be ea... | 10/24/2006 |
| 7122125 | Controlled polymerization on plasma reactor wall An integrated etch process, for example as used for etching an anti-reflection layer and an underlying aluminum layer, in which the chamber wall polymerization is controlled by coating polymer onto the sidewall by a plasma deposition process prior to inserting the w... | 10/17/2006 |
| 7119009 | Semiconductor device with dual damascene wiring A semiconductor device having: an underlie having a conductive region in the surface layer of the underlie; an insulating etch stopper film covering the surface of the underlie; an interlayer insulating film formed on the insulating etch stopper film; a wiring trenc... | 10/10/2006 |
| 7115523 | Method and apparatus for etching photomasks A process is provided for etching a silicon based material in a substrate, such as a photomask, to form features with straight sidewalls, flat bottoms, and high profile angles between the sidewalls and bottom, and minimizing the formation of polymer deposits on the ... | 10/03/2006 |
| 7115519 | Method for plasma treatment A method for plasma treatment etches an SiC layer with an increased etching rate and enhanced selectivities of SiC with respect to SiO2 and an organic layer. An etching gas is converted into plasma to etch SiC. The etching gas may include CHF3;... | 10/03/2006 |
| 7098139 | Method of manufacturing a semiconductor device with copper wiring treated in a plasma discharge A substrate having a copper wiring is prepared. An insulating film is formed on the copper wiring. The insulating film is etched with a gas containing fluorine to form an opening reaching the copper wiring. A plasma treatment is carried out on a surface of copper ex... | 08/29/2006 |
