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| Number | Title | Issue Date |
| 7344604 | LED and a lighting apparatus using the LED Disclosed herein is a LED and a lighting apparatus, which employs a LED as a light source of low power and high efficiency for an optical projection system. The lighting apparatus comprises a reflection part together with the LED, and enhances light emitting directi... | 03/18/2008 |
| 7327541 | Operation of dual-directional electrostatic discharge protection device A two-terminal ESD protection structure formed by an arrangement of five adjacent semiconductor regions (112, 114, 116, 118, and 120) of alternating conductivity type provides protection against both positive and negative ESD voltages. The middle semic... | 02/05/2008 |
| 7285452 | Method to selectively form regions having differing properties and structure A semiconductor device is formed having two physically separate regions with differing properties such as different surface orientation, crystal rotation, strain or composition. In one form a first layer having a first property is formed on an insulating layer. The ... | 10/23/2007 |
| 7273788 | Ultra-thin semiconductors bonded on glass substrates A method for forming a semiconductor on insulator structure includes providing a glass substrate, providing a semiconductor wafer, and performing a bonding cut process on the semiconductor wafer and the glass substrate to provide a thin semiconductor layer bonded to... | 09/25/2007 |
| 7262428 | Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the... | 08/28/2007 |
| 7253454 | High electron mobility transistor A HEMT device including a GaN channel structure including a very thin (Al,In,Ga)N subchannel layer that is disposed between a first GaN channel layer and a second GaN channel layer, to effect band bending induced from the piezoelectric and spontaneous charges associ... | 08/07/2007 |
| 7221038 | Method of fabricating substrates and substrates obtained by this method Techniques are shown in which substrates having a first layer of a first material and second layer of a second material, wherein the second material is less noble than the first material, is provided by bonding the first and second layers together with an amorphous ... | 05/22/2007 |
| 7192844 | Glass-based SOI structures Semiconductor-on-insulator (SOI) structures, including large area SOI structures, are provided which have one or more regions composed of a layer (15) of a substantially single-crystal semiconductor (e.g., doped silicon) attached to a support substrate (20... | 03/20/2007 |
| 7176528 | Glass-based SOI structures Semiconductor-on-insulator (SOI) structures, including large area SOI structures, are provided which have one or more regions composed of a layer (15) of a substantially single-crystal semiconductor (e.g., doped silicon) attached to a support substrate (20... | 02/13/2007 |
| 7166523 | Silicon carbide and method of manufacturing the same In a method of manufacturing a silicon carbide substance, such as a film, a layer, a semiconductor, which is doped with an impurity, a carbonization process is executed after formation of a doped silicon substance which is obtained by carrying out a silicon depositi... | 01/23/2007 |
| 7153753 | Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the... | 12/26/2006 |
| 7154163 | Epitaxial structure of gallium nitride series semiconductor device utilizing two buffer layers An epitaxial structure of a gallium nitride series semiconductor device and a process of forming the same are described. A first buffer layer of gallium nitride is epitaxially formed on a substrate at a first temperature. A second buffer layer of indium gallium nitr... | 12/26/2006 |
| 7097718 | Single crystal silicon wafer having an epitaxial layer substantially free from grown-in defects Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerat... | 08/29/2006 |
| 7098487 | Gallium nitride crystal and method of making same There is provided a GaN single crystal at least about 2 millimeters in diameter, with a dislocation density less than about 104 cm−1, and having no tilt boundaries. A method of forming a GaN single crystal is also disclosed. The method includ... | 08/29/2006 |
| 7094668 | Annealing process and device of semiconductor wafer A device and method for annealing a wafer. The preferred embodiment includes applying a basic thermal budget to a weakened zone of a wafer, substantially evenly over the weakened zone. The basic thermal budget is insufficient to detach a detachment layer from a rema... | 08/22/2006 |
| 7067396 | Method of producing a thin layer of semiconductor material The invention relates to a method of producing a thin layer of semiconductor material including: a step of implanting ions through a flat face (2) of a semiconductor wafer in order to create a layer of microcavities, the ion... | 06/27/2006 |
| 7056815 | Narrow energy band gap gallium arsenide nitride semi-conductors and an ion-cut-synthesis method for producing the same A method for forming a semi-conductor material is provided that comprises forming a donor substrate constructed of GaAs, providing a receiver substrate, implanting nitrogen into the donor substrate to form an implanted layer comprising GaAs and nitrogen. The implant... | 06/06/2006 |
| 7045874 | Micromechanical strained semiconductor by wafer bonding One aspect disclosed herein relates to a method for forming a strained semiconductor structure. In various embodiments of the method, a number of recesses are formed in a surface of a first semiconductor wafer such that the surface of the first semiconductor wafer h... | 05/16/2006 |
| 7045836 | Semiconductor structure having a strained region and a method of fabricating same A semiconductor structure including a highly strained selective epitaxial top layer suitable for use in fabricating a strained channel transistor. The top layer is deposited on the uppermost of a series of one or more lower layers. The lattice of each layer is misma... | 05/16/2006 |
| 7033439 | Apparatus for fabricating a III-V nitride film and a method for fabricating the same A hydrogen chloride gas and an ammonia gas are introduced with a carrier gas into a reactor in which a substrate and at least an aluminum metallic material through conduits. Then, the hydrogen gas and the ammonia gas are heated by heaters, and thus, a III–V nitrid... | 04/25/2006 |
| 7026219 | Integration of high k gate dielectric Methods are provided herein for forming electrode layers over high dielectric constant (“high k”) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is protected from reduction during a subsequent deposition of silicon-... | 04/11/2006 |
| 7008854 | Silicon oxycarbide substrates for bonded silicon on insulator A method for forming a semiconductor on insulator structure includes forming a semiconductor layer on an insulating substrate, where the substrate is a different material than the semiconductor layer, and has a coefficient of thermal expansion substantially equal to... | 03/07/2006 |
| 6974757 | Method of forming silicon-on-insulator comprising integrated circuitry A wafer bonding method of forming silicon-on-insulator comprising integrated circuitry includes nitridizing at least a portion of an outer surface of silicon of a device wafer. After the nitridizing, the device wafer is joined with a handle wafer. A method of formin... | 12/13/2005 |
| 6962859 | Thin films and method of making them Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon-containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface rou... | 11/08/2005 |
| 6958253 | Process for deposition of semiconductor films Chemical vapor deposition processes utilize higher order silanes and germanium precursors as chemical precursors. The processes have high deposition rates yet produce more uniform films, both compositionally and in thickness, than films prepared using conventional c... | 10/25/2005 |
| 6956268 | MEMS and method of manufacturing MEMS The present invention relates to micro electro-mechanical systems (MEMS) and production methods thereof, and more particularly to vertically integrated MEMS systems. Manufacturing of MEMS and vertically integrated MEMS is facilitated by forming, preferably on a wafe... | 10/18/2005 |
| 6936482 | Method of fabricating substrates and substrates obtained by this method Techniques are shown in which substrates having a first layer of a first material and second layer of a second material, wherein the second material is less noble than the first material, is provided by bonding the first and second layers together with an amorphous ... | 08/30/2005 |
| 6930026 | Method of forming a semiconductor wafer having a crystalline layer thereon containing silicon, germanium and carbon A Si substrate 1 with a SiGeC crystal layer 8 deposited thereon is annealed to form an annealed SiGeC crystal layer 10 on the Si substrate 1. The annealed SiGeC crystal layer includes a matrix SiGeC crystal layer 7, which is lattic... | 08/16/2005 |
| 6929984 | Gettering using voids formed by surface transformation One aspect of this disclosure relates to a method for creating a gettering site in a semiconductor wafer. In various embodiments, a predetermined arrangement of a plurality of holes is formed in the semiconductor wafer through a surface of the wafer. The wafer is an... | 08/16/2005 |
| 6858094 | Silicon wafer and silicon epitaxial wafer and production methods therefor The present invention provides a silicon wafer having a DZ layer near a surface and an oxide precipitate layer in a bulk portion, wherein interstitial oxygen concentrations of the DZ layer, the oxide precipitate layer and a transition region between the DZ layer and... | 02/22/2005 |
| 6645836 | Method of forming a semiconductor wafer having a crystalline layer thereon containing silicon, germanium and carbon A Si substrate 1 with a SiGeC crystal layer 8 deposited thereon is annealed to form an annealed SiGeC crystal layer 10 on the Si substrate 1. The annealed SiGeC crystal layer includes a matrix SiGeC crystal layer 7, which is lattice-relieved and hardly ha... | 11/11/2003 |
| 6558802 | Silicon-on-silicon hybrid wafer assembly A hybrid silicon-on-silicon substrate. A thin film (2101) of single-crystal silicon is bonded to a target wafer (46). A high-quality bond is formed between the thin film and the target wafer during a high-temperature annealing process. It is believed that... | 05/06/2003 |
| 6533874 | GaN-based devices using thick (Ga, Al, In)N base layers A method of forming a (gallium, aluminum, indium) nitride base layer on a substrate for subsequent fabrication, e.g., by MOCVD or MBE, of a microelectronic device structure thereon. Vapor-phase (Ga, Al, In) chloride is reacted with a vapor-phase nitrogeno... | 03/18/2003 |
| 6294478 | Fabrication process for a semiconductor substrate SOI substrates are fabricated with sufficient quality and with good reproducibility. At the same time, conservation of resources and reduction of cost are realized by reuse of the wafer and the like. Carried out to achieve the above are a step of bonding a pri... | 09/25/2001 |
| 6284039 | Epitaxial silicon wafers substantially free of grown-in defects The present invention is directed to a set of epitaxial silicon wafers assembled in a wafer cassette, boat or other wafer carrier. Each wafer comprises a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitia... | 09/04/2001 |
| 6228181 | Making epitaxial semiconductor device An epitaxial semiconductor wafer characterized by making the P-N junction face which having either flat or uneven face in a manner of uniformed thickness from the top surface, due to making a P or N type first layer by the Chemical Vapor Deposition on the... | 05/08/2001 |
| 6221776 | Anti-reflective coating used as a disposable etch stop The present invention advantageously provides a method and apparatus in which a sacrificial anti-reflective coating is used as an etch stop layer to protect a material from being etched. The anti-reflective coating has a relatively high viscosity which al... | 04/24/2001 |
| 6059895 | Strained Si/SiGe layers on insulator An SOI substrate and method for forming is described incorporating the steps of forming strained layers of Si and/or SiGe on a first substrate, forming a layer of Si and/or Si O2 over the strained layers, bonding a second substrate h... | 05/09/2000 |
| 6048411 | Silicon-on-silicon hybrid wafer assembly A hybrid silicon-on-silicon substrate. A thin film (2101) of single-crystal silicon is bonded to a target wafer (46). A high-quality bond is formed between the thin film and the target wafer during a high-temperature annealing process. It is believed that... | 04/11/2000 |
| 6033490 | Growth of GaN layers on quartz substrates In a method of manufacturing a semiconductor device which includes a quartz substrate having a z-cut plane of (0001) plane on a surface, a GaN film is first deposited on the surface. Finally, the quartz substrate is removed from the GaN film. The removed ... | 03/07/2000 |
