Did You Know...
...that it was melting ice cream that inspired the invention of the outboard motor? It was a lovely August day and Ole Evinrude was rowing his boat to his favorite island picnic spot. As he rowed, he watched his ice cream melt and wished he had a faster way to get to the island. At that moment the idea for the outboard motor was born!
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| Application No. | Application Title | Issue Date |
| 20110302563 | PROGRAM STRUCTURE RECOVERY USING MULTIPLE LANGUAGES A parser parses an application that comprises two or more different modules; the modules are bytecodes, object codes, and/or modules compiled using different programming languages. The parser identifies code statements in the modules or source code for the modules that ... | 12/08/2011 |
| 20110271250 | Software Development Tool A system and method for providing a completion list associated with computer program source code and a dynamic expression. A static analysis is performed to find and aggregate one or more candidate types of the expression. The analysis may include one or more of a numbe... | 11/03/2011 |
| 20110225572 | COMPILER OPTIMISATION LIKE IDIOM RECOGNITION THROUGH PATTERN MATCHING USING VALUE NUMBERING A compiler and method for compiling source code comprising: a library of code patterns and control flow information for each code pattern, wherein each code pattern comprises one or more variable; and a processor arranged to: evaluate the control flow of an expression i... | 09/15/2011 |
| 20110225571 | STRUCTURAL ANALYSER A method and corresponding tool, the method comprising: generating a lower-level control flow structure representing a portion of an executable program, the lower-level control flow structure comprising a plurality of lower-level nodes representing operations occurring ... | 09/15/2011 |
| 20110191761 | Control Flow Analysis Using Deductive Reaching Definitions A computer-implemented process for deductive reaching definition analysis receives a control flow graph to form a set of received blocks and edges, performs traditional reaching definitions to produce bit-vectors OUT(b), GEN(b) and KILL(b) for each block in the set of r... | 08/04/2011 |
| 20110107315 | ABSTRACTING BENEFIT RULES FROM COMPUTER CODE A method that includes: obtaining a computer code usable to process insurance claims; building a computer readable directed graph representing a control flow of the code, by identifying decisions and actions in the code, the graph comprising nodes connected by edges, so... | 05/05/2011 |
| 20110099541 | Context-Sensitive Slicing For Dynamically Parallelizing Binary Programs In one embodiment of the invention a method comprising (1) receiving an unstructured binary code region that is single-threaded; (2) determining a slice criterion for the region; (3) determining a call edge, a return edge, and a fallthrough pseudo-edge for the region ba... | 04/28/2011 |
| 20110055819 | System and Method for Optimizing Compiler Performance by Object Collocation A computer-implemented method, system, and computer program product for performing object collocation on a computer system are provided. The method includes analyzing a sequence of computer instructions for object allocations and uses of the allocated objects. The metho... | 03/03/2011 |
| 20100325621 | PARTITIONING OPERATOR FLOW GRAPHS Techniques for partitioning an operator flow graph are provided. The techniques include receiving source code for a steam processing application, wherein the source code comprises an operator flow graph, wherein the operator flow graph comprises a plurality of operators... | 12/23/2010 |
| 20100325608 | GENERATION OF PARALLEL CODE REPRESENTATIONS A generated grouped representation of existing source code can define regions of the existing source code. A set of the regions that can run in parallel can be identified based on the grouped representation. The grouped representation can be converted into a modified re... | 12/23/2010 |
| 20100313190 | DETERMINING TARGET TYPES FOR GENERIC POINTERS IN SOURCE CODE A system described herein includes a receiver component that receives source code from a computer-readable medium of a computing device and a static analysis component that executes a points-to analysis algorithm over the source code to cause generation of a points-to g... | 12/09/2010 |
| 20100293535 | Profile-Driven Data Stream Processing Techniques for compiling a data stream processing application are provided. The techniques include receiving, by a compiler executing on a computer system, source code for a data stream processing application, wherein the source code comprises source code for a pluralit... | 11/18/2010 |
| 20100281240 | Program Code Simulator A system and method for facilitating simulation of a computer program. A program representation is generated from a computer program. A simulation of the program is performed. Simulation may include applying heuristics to determine program flow for selected instructions... | 11/04/2010 |
| 20100269103 | Method and device for multi-core instruction-set simulation The present invention discloses a method for multi-core instruction-set simulation. The proposed method identifies the shared data segment and the dependency relationship between the different cores and thus effectively reduces the number of sync points and lowers the s... | 10/21/2010 |
| 20100229162 | COMPILING APPARATUS, COMPILING METHOD, AND PROGRAM PRODUCT A compiling apparatus includes an instruction-sequence-hierarchy-graph generating unit that generates an instruction sequence hierarchy graph by arraying unit graphs, to each of which a data path realized by a plurality of microinstructions included in one instruction s... | 09/09/2010 |
| 20100095286 | REGISTER REDUCTION AND LIVENESS ANALYSIS TECHNIQUES FOR PROGRAM CODE A system and method for efficient architectural register liveness analysis and register usage reduction. A compiler within a computing system maintains a master liveness vector for each instruction in a program code and a path liveness vector for each path within a pred... | 04/15/2010 |
| 20100023931 | Method and System for Intermediate Representation of Source Code A method to provide effective control and data flow information in an Intermediate Representation (IR) form. A Path Sensitive single Assignment (PSA) IR form with effective and explicit control and data path information supports control flow sensitive optimizations such... | 01/28/2010 |
| 20090265696 | JUST-AHEAD-OF-TIME COMPILATION Pre-compiling postdominating functions. Some embodiments may be practiced in a computing environment including a runtime compilation. For example one method includes acts for compiling functions. The method includes determining that a function of an application has been... | 10/22/2009 |
| 20090217248 | SYSTEMS AND METHODS FOR INFORMATION FLOW ANALYSIS Computer-implemented methods for analyzing computer programs written in semi-structured languages are disclosed. The method is based on unification of the two classic forms of program flow analysis, control flow and data flow analysis. As such, it is capable of substant... | 08/27/2009 |
| 20090125894 | Highly scalable parallel static single assignment for dynamic optimization on many core architectures A method, system, and computer readable medium for converting a series of computer executable instructions in control flow graph form into an intermediate representation, of a type similar to Static Single Assignment (SSA), used in the compiler arts. The indeterminate r... | 05/14/2009 |
| 20090094590 | DETECTING CHANGE IN PROGRAM BEHAVIOR FOR ADAPTIVE CODE OPTIMIZATION A computer implemented method, apparatus, and computer program product for generating an optimization insensitive behavior profile. In one embodiment, a source identifier is assigned to each instruction in an original control flow graph representing a program code prior... | 04/09/2009 |
| 20090044181 | Graphics Tools for Interactive Analysis of Three-Dimensional Machine Data Methods for displaying machine data are described including a method for displaying machine data as a virtual three-dimensional image showing a three-dimensional graph having three axes such that the data in the graph may be rotated about one or more of the axes to give... | 02/12/2009 |
| 20090019433 | METHOD AND SYSTEM FOR DESCRIBING WHOLE-PROGRAM TYPE BASED ALIASING A compilation system for whole-program type based aliasing, the system includes: a set of hardware and networking resources; a front-end, a whole-program optimization component; a backend; an algorithm implemented on the set of hardware and networking resources; wherein... | 01/15/2009 |
| 20090007087 | PROGRAM ANALYZING METHOD, PROGRAM ANALYZING APPARATUS AND PROGRAM ANALYZING PROGRAM A dependent element group which is invertibly contractible is found by using program analysis information including a plurality of dependent elements representing dependent relationships of statement and control, the statement and the control being included in a program... | 01/01/2009 |
| 20080301655 | PROGRAM ABSTRACTION BASED ON PROGRAM CONTROL Embodiments described herein relate to determining an abstraction of a computer program and to the refinement of an abstraction of a computer program. The computer program may be a sequential program or may be a concurrent (parallel) program. A directed graph represents... | 12/04/2008 |
| 20080282237 | Method and Apparatus For Generating Execution Equivalence Information A method of compiling code includes identifying blocks of code that are execution equivalence pairs. Other embodiments are described and claimed.... | 11/13/2008 |
| 20080229297 | METHOD AND SYSTEM FOR REDUCING MEMORY REFERENCE OVERHEAD ASSOCIATED WITH TREADPRIVATE VARIABLES IN PARALLEL PROGRAMS A computer implemented method, system and computer program product for accessing threadprivate memory for threadprivate variables in a parallel program during program compilation. A computer implemented method for accessing threadprivate variables in a parallel program ... | 09/18/2008 |
| 20080092113 | SYSTEM AND METHOD FOR CONFIGURING A PROGRAMMABLE ELECTRONIC DEVICE TO INCLUDE AN EXECUTION ENGINE An electronic device configuration that models a dynamical system can be produced by compiling program code written in a specialized modeling language into directed flow graph data, and then transforming the directed flow graph data into device configuration data. The d... | 04/17/2008 |
| 20070214452 | DATA FLOW ANALYSIS OF TRANSACTIONAL PROCESSES A XLANG/s compilation method is provided that uses data flow analysis of a program's flow graph to determine lifetimes of a data object. A flowgraph is created according to abstract computer instructions. A depth-first order is assigned to basic blocks and a dominance r... | 09/13/2007 |
| 20070198971 | Reconfigurable processing A method of producing a reconfigurable circuit device for running a computer program of moderate complexity such as multimedia processing. Code for the application is compiled into Control Flow Graphs representing distinct parts of the application to be run. From those ... | 08/23/2007 |
| 20070169054 | Process of automatically translating a high level programming language into an extended activity diagram A process of automatically translating a high level programming language into an extended activity diagram (EAD), which can translate source codes coded by the high level programming language into a corresponding activity diagram (AD) before the high level language is t... | 07/19/2007 |
| 20070033582 | Transforming a Flow Graph Model to a Structured Flow Language Model The invention provides a solution for transforming a flow graph model to a structured flow language model. In particular, the nodes in the flow graph model are traversed, and each node is mapped to an activity in the structured flow language model. When a node comprises... | 02/08/2007 |
| 20070006151 | Method and apparatus for incremental analysis of one or more properties of a program Methods and apparatus are provided for incremental analysis of one or more properties of a program. According to one aspect of the invention, at least one property of a software program is evaluated, given one or more changes to the software program. Nodes in a derivati... | 01/04/2007 |
| 20060150168 | Annotating graphs to allow quick loading and analysis of very large graphs A method, information processing system, and computer readable medium for annotating graphs to allow for subsequent quick loading and analysis of very large graphs is described. The present invention encompasses a way to order and annotate nodes of a graph into a data s... | 07/06/2006 |
| 20060150169 | Object model tree diagram A designer tool that facilitates design of an object model. The tool takes as input a computer-readable representation of a graph of objects (e.g., classes), and creates automatically one or more diagrams that depict these classes as editable trees showing their relatio... | 07/06/2006 |
| 20050283768 | Data flow graph processing method, reconfigurable circuit and processing apparatus A data flow graph processing method divides at least one DFG generated into a plurality of sub-DFGs, in accordance with the number of logic circuits in a circuit set in a reconfigurable circuit. When the reconfigurable circuit is provided with a structure including mult... | 12/22/2005 |
| 20050246700 | Compiler with cache utilization optimizations A compiling program with cache utilization optimizations employs an inter-procedural global analysis of the data access patterns of compile units to be processed. The global analysis determines sufficient information to allow intelligent application of optimization tech... | 11/03/2005 |
| 20050216899 | Resource-aware scheduling for compilers Disclosed are embodiments of a compiler, methods, and system for resource-aware scheduling of instructions. A list scheduling approach is augmented to take into account resource constraints when determining priority for scheduling of instructions. Other embodiments are ... | 09/29/2005 |
| 20050198626 | Method, system and product for identifying and executing locked read regions and locked write regions in programming languages that offer synchronization without explicit means to distinguish between such regions A technique for identifying and executing synchronized read regions and synchronized write regions is provided. The technique processes program code with a software tool to convert the code to an internal representation for the software tool and constructs a control flo... | 09/08/2005 |
| 20050097536 | Method of graphically displaying and manipulating multiple workflow run instances of a software application Methods for graphically displaying multiple task workflow run instances associated with execution of a software application is disclosed. The software application can be associated with, in one embodiment, a network analyzer for monitoring data transmissions in a commun... | 05/05/2005 |
