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| Application No. | Application Title | Issue Date |
| 20110314353 | DIGITAL BROADCASTING SYSTEM AND METHOD OF PROCESSING DATA A digital receiving system, and a method of processing data are disclosed. The digital receiving system includes a receiving unit, a known sequence detector, and a channel equalizer. The receiving unit receives a broadcast signal including mobile service data and main s... | 12/22/2011 |
| 20110167322 | Methods to improve ACS performance In one embodiment, systems and methods of operating a SOVA system is disclosed that comprises determining the start and stop values for a trellis tree and using the start and stop values to determine the initial states of a plurality of branches within the trellis tree.... | 07/07/2011 |
| 20110138259 | High Performance Digital Signal Processing In Software Radios An extensive use of look-up table (LUT) and single instruction multiple data (SIMD) in different algorithms in a software-defined radio (SDR) system is described. In particular, the LUT is used during spreading modulation, mapping and spreading, scrambling, de-scramblin... | 06/09/2011 |
| 20110113309 | SYSTEM AND METHOD FOR DECODING A MESSAGE USING A PRIORI INFORMATION Methods and systems are disclosed for decoding digital data received by a correspondent device over a communication channel. The data includes a component corresponding to a plurality of values unknown to the correspondent device and a component corresponding to one or ... | 05/12/2011 |
| 20110099455 | Method and Arrangement for Decoding a Signal Encoded by a Tail-Biting Code A method of decoding a signal that has been encoded by a tail-biting code based on at least one encoding parameter is disclosed. The at least one encoding parameter may be a trellis size or a quantity of aggregated encoding elements or a code rate. The method is suitabl... | 04/28/2011 |
| 20110087952 | RECOVERY OF TRANSMISSION ERRORS A method for recovering transmission errors, comprising: receiving a data packet (50) comprising an error detection code (51) associated to data contained in the packet, wherein the data associated to the error detection code comprises primary data (52<... | 04/14/2011 |
| 20110026647 | SOFT BIT VALUE GENERATION IN A SEQUENCE ESTIMATOR Teachings presented herein offer reduced computational complexity for symbol sequence estimation, and also provide for the generation of soft bit values representing the reliability of that estimation. A demodulator is configured to generate these soft bit values by ide... | 02/03/2011 |
| 20110019781 | DEVICE AND METHOD FOR CALCULATING BACKWARD STATE METRICS OF A TRELLIS A method for calculating backward state metrics of a trellis, the method includes: performing a radix-K calculation of backward state matrices of multiple states of at least one time instance of a trellis; and performing a radix-J calculation of backward state matrices ... | 01/27/2011 |
| 20100313103 | Receiver Equipped with a Trellis Viterbi Decoder A receiver of a digital signal equipped with an N-state weighted-decision trellis Viterbi decoder, the signal received including a series of symbols, is provided. The receiver comprises a programmable logic circuit that includes a source memory A and a destination memor... | 12/09/2010 |
| 20100299582 | MULTI-TAP FREQUENCY DOMAIN EQUALIZATION WITH DECISION FEEDBACK AND TRELLIS DECODING An input estimator is based on a combined MFDQ-DF and trellis for use in, for example, an ADSL environment. In particular, for an ADSL implementation, the system will have one feedback tap for the decision feedback. However, it should be appreciated that the idea and ba... | 11/25/2010 |
| 20100293442 | MULTI-TAP FREQUENCY DOMAIN EQUALIZATION WITH DECISION FEEDBACK AND TRELLIS DECODING An input estimator is based on a combined MFDQ-DF and trellis for use in, for example, an ADSL environment. In particular, for an ADSL implementation, the system will have one feedback tap for the decision feedback. However, it should be appreciated that the idea and ba... | 11/18/2010 |
| 20100290551 | METHOD, APPARATUS AND SYSTEM FOR HIGH-SPEED TRANSMISSION ON FIBER OPTIC CHANNEL Multi-carrier modulation fiber optic systems constructed using a series of electrical carriers, modulating the data on the electrical carriers and combining the carriers to form a wideband signal. The wideband signal can then be intensity modulated on a laser and couple... | 11/18/2010 |
| 20100287453 | ENCODING AND DECODING METHODS FOR EXPURGATED CONVOLUTIONAL CODES AND CONVOLUTIONAL TURBO CODES A convolutional encoder (50) comprises an expurgation unit (22) and a first component convolutional encoder section (24). A convolutional turbo encoder (20) comprises an expurgation unit (22); a first component convolutional encoder se... | 11/11/2010 |
| 20100281345 | DTV TRANSMITTER AND METHOD OF CODING MAIN AND ENHANCED DATA IN DTV TRANSMITTER A DTV transmitter includes a pre-processor pre-processing enhanced data, a data formatter generating enhanced data packets including the pre-processed data and inserting known data place holders to the data packets, and a multiplexer multiplexing the enhanced data packe... | 11/04/2010 |
| 20100281346 | DTV TRANSMITTER AND METHOD OF CODING MAIN AND ENHANCED DATA IN DTV TRANSMITTER A DTV transmitter includes a pre-processor pre-processing enhanced data, a data formatter generating enhanced data packets including the pre-processed data and inserting known data place holders to the data packets, and a multiplexer multiplexing the enhanced data packe... | 11/04/2010 |
| 20100271557 | DIGITAL TELEVISION TRANSMITTER/RECEIVER AND METHOD OF PROCESSING DATA IN DIGITAL TELEVISION TRANSMITTER/RECEIVER A digital television (DTV) transmitter and a method of processing data in the DTV transmitter/receiver are disclosed. In the DTV transmitter, a pre-processor pre-processes the enhanced data by coding the enhanced data for forward error correction (FEC) and expanding the... | 10/28/2010 |
| 20100269026 | ERROR PATTERN GENERATION FOR TRELLIS-BASED DETECTION AND/OR DECODING The disclosed technology provides systems and methods for identifying potential error locations, patterns, and likelihood metrics in connection with trellis-based detection/decoding. In one aspect of the invention, the disclosed technology detects information that was p... | 10/21/2010 |
| 20100262896 | Signal mapper for reducing error coefficient An improved mapping policy, signal mapper, transmitter, receiver, and communication system are introduced. The improved signal mapping policy alternates between standard and inverted bit mapping functions at selected phase states to reduce the error coefficient of MSK a... | 10/14/2010 |
| 20100246733 | TRELLIS DECODER FOR DECODING DATA STREAM INCLUDING SYMBOLS CODED WITH MULTIPLE CONVOLUTIONAL CODES A trellis decoder decodes a stream of encoded symbols, including symbols of a first type (e.g. symbols encoded with a first trellis code) and symbols of a second type (e.g. encoded with a second, more robust, trellis code), without storing path indicators along a trelli... | 09/30/2010 |
| 20100226392 | DTV TRANSMITTING SYSTEM AND METHOD OF PROCESSING DATA IN DTV TRANSMITTING SYSTEM A DTV transmitting system includes two pre-processors. The first pre-processor codes high-priority enhanced data for forward error correction (FEC) and expands the FEC-coded data. The second pre-processor codes low-priority enhanced data for FEC and expands the FEC-code... | 09/09/2010 |
| 20100223536 | DTV TRANSMITTING SYSTEM AND METHOD OF PROCESSING DATA IN DTV TRANSMITTING SYSTEM A DTV transmitting system includes two pre-processors. The first pre-processor codes high-priority enhanced data for forward error correction (FEC) and expands the FEC-coded data. The second pre-processor codes low-priority enhanced data for FEC and expands the FEC-code... | 09/02/2010 |
| 20100211858 | Scalable VLIW Processor For High-Speed Viterbi and Trellis Coded Modulation Decoding An application specific processor to implement a Viterbi decode algorithm for channel decoding functions of received symbols. The Viterbi decode algorithm is at least one of a Bit Serial decode algorithm, and block based decode algorithm. The application specific proces... | 08/19/2010 |
| 20100205510 | QLM decoding A method for implementation of error correction decoding of quadrature layered modulation QLM communications. A bound on communications capacity derived using ideal QLM is approximated with QLM communications links which support data rates independent of the Shannon bou... | 08/12/2010 |
| 20100205512 | DIGITAL TELEVISION TRANSMITTER/RECEIVER AND METHOD OF PROCESSING DATA IN DIGITAL TELEVISION TRANSMITTER/RECEIVER A digital television (DTV) transmitter/receiver and a method of processing data in the DTV transmitter/receiver are disclosed. In the DTV transmitter, a pre-processor pre-processes the enhanced, data by coding the enhanced data for forward error correction (FEC) and exp... | 08/12/2010 |
| 20100185925 | Differential Locally Updating Viterbi Decoder The present invention relates to differential, locally updating Viterbi decoder characterized in that it contains connection management block (802, 810, 812) which enables decoding a bit per cycle by trellis diagram uniting (810) and distributing procedure... | 07/22/2010 |
| 20100180178 | Minimal hardware implementation of non-parity and parity trellis Minimal hardware implementation of non-parity and parity trellis. More than one type of trellis can be represented using a minimal amount of hardware. In magnetic recording systems and other communication systems types, there is oftentimes a need to switch between trell... | 07/15/2010 |
| 20100153825 | DIGITAL BROADCASTING SYSTEM AND METHOD A digital broadcasting system and method, where the digital broadcasting system includes: a transmission stream generator multiplexing a normal stream and a turbo stream to generate a dual transmission stream; a transmitter inserting an supplementary reference signal (S... | 06/17/2010 |
| 20100146360 | Unified Decoder for Convolutional, Turbo, and LDPC Codes A unified decoder (10) is capable of decoding data encoded with convolutional codes, Turbo codes and LDPC codes. The decoder comprises a first set (20, . . . ,44) and a second set (26, . . . ,30) of trellis processors for calculating path metrics du... | 06/10/2010 |
| 20100146366 | WIRELESS TERMINAL BASEBAND PROCESSOR HIGH SPEED TURBO DECODING MODULE A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX ... | 06/10/2010 |
| 20100107035 | APPARATUS AND METHOD FOR DETECTING AN END POINT OF AN INFORMATION FRAME A device (100) for locating an end of a received frame, the device comprises: at least one memory unit (120) for storing path metrics; at least one processor, adapted to: provide hypothetical trellis paths that end at different possible end points; perform... | 04/29/2010 |
| 20100100793 | DIGITAL TELEVISION SYSTEMS EMPLOYING CONCATENATED CONVOLUTIONAL CODED DATA In iterative-diversity (ID) transmission systems for signals with concatenated convolutional coding (CCC), paired iterative diversity signals each have ½ the code rate of the 8VSB DTV signals prescribed by the 1995 ATSC Digital Television Broadcast Standard. Known seri... | 04/22/2010 |
| 20100077282 | True bit level decoding of TTCM (Turbo Trellis Coded Modulation) of variable rates and signal constellations True bit level decoding of TTCM (Turbo Trellis Coded Modulation) of variable rates and signal constellations. A decoding approach is presented that allows for decoding on a bit level basis that allows for discrimination of the individual bits of a symbol. Whereas prior ... | 03/25/2010 |
| 20100061465 | SUB-CHANNEL ACQUISITION IN A DIGITAL TELEVISION RECEIVER DESIGNED TO RECEIVE MOBILE/HANDHELD SIGNALS When a change in sub-channel selection is made after a mobile/handheld (M/H) Frame is begun, an M/H receiver is for some time unable to correct byte errors by transverse Reed-Solomon (TRS) decoding of turbo decoding results. Despite this, later stages of the M/H receive... | 03/11/2010 |
| 20100050060 | Path Comparison Unit For Determining Paths In A Trellis That Compete With A Survivor Path A path comparison unit is disclosed for determining paths in a trellis that compete with a survivor path. The disclosed path comparison unit comprises a first type functional unit comprising a multiplexer and a register to store one or more survivor bits associated with... | 02/25/2010 |
| 20100017678 | Hierarchical Trellis Coded Modulation A system and method for encoding information is disclosed. In one embodiment, information is encoded using a high protection code for the least significant bit and a low protection code for the next three most significant bits. The remaining bits are uncoded. The high p... | 01/21/2010 |
| 20100017689 | VSB TRANSMISSION SYSTEM A vestigial sideband (VSB) modulation transmission system and a method for encoding an input signal in the system are disclosed. According to the present invention, the VSB transmission system includes a convolutional encoder for encoding an input signal, a trellis-code... | 01/21/2010 |
| 20090319874 | Reliability Unit For Determining A Reliability Value For At Least One Bit Decision A reliability unit is disclosed for determining a reliability value for at least one bit decision. The disclosed reliability unit comprises one or more functional elements, wherein each of the functional elements comprises at least four functional units and at least two... | 12/24/2009 |
| 20090319875 | Path Metric Difference Computation Unit For Computing Path Differences Through A Multiple-Step Trellis A path metric difference computation unit is disclosed for computing path differences through a multiple-step trellis. The disclosed path metric difference computation unit computes differences between paths through a multiple-step trellis, wherein a first of the plural... | 12/24/2009 |
| 20090313530 | Error correcting viterbi decoder Methods and corresponding systems in a Viterbi decoder include computing a maximum likelihood (ML) path in a Viterbi trellis in response to executing a first Viterbi algorithm. Thereafter, one or more merge points are selected on the ML path in a second Viterbi algorith... | 12/17/2009 |
| 20090313531 | Methods and Apparatus for Processing a Received Signal Using a Multiple-Step Trellis and Selection Signals for Multiple Trellis Paths Methods and apparatus are provided for performing SOVA detection at higher data rates than achievable with conventional designs. A received signal is processed by (i) determining at least three selection signals that define a plurality of paths through a multiple-step t... | 12/17/2009 |
