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| Application No. | Application Title | Issue Date |
| 20100229061 | Cell-Aware Fault Model Creation And Pattern Generation Cell-aware fault models directly address layout-based intra-cell defects. They are created by performing analog simulations on the transistor-level netlist of a library cell and then by library view synthesis. The cell-aware fault models may be used to generate cell-awa... | 09/09/2010 |
| 20080148119 | Apparatus for Built-in Speed Grading and Method for Generating Desired Frequency for the Same A method for Built-In Speed Grading (BISG) comprises a Circuit Under Test (CUT) with Built-In Self-Test (BIST) circuitry, an All-Digital Phase-Locked Loop (ADPLL), and a BISG, to automatically decide the maximum operating frequency of the CUT. The search process for thi... | 06/19/2008 |
| 20080141090 | QUANTIZED DATA-DEPENDENT JITTER INJECTION USING DISCRETE SAMPLES Methods, system, and computer programs for compensating for introducing data dependent jitter into a test signal using a testing instrument are disclosed. The method includes generating a test pattern that comprises a plurality of intervals. Each of the intervals includ... | 06/12/2008 |
| 20070245196 | Method for The Evaluation of a First Analog Signal and a Second Analog Signal, and Evaluation Circuit Corresponding Therewith Two analog signals are substantially sinusoidal and out-of-phase by about 90° relative to each other when an element moves in a temporally uniform manner in relation to a stationary element. The two analog signals make it possible to determine the actual position of th... | 10/18/2007 |
| 20060090113 | Design for test of analog module systems An apparatus for testing an integrated circuit that includes analog nodes is disclosed. In one aspect, an integrated circuit comprises testing circuitry and core logic circuitry. A memory in the testing circuitry stores data identifying analog nodes in the core logic ci... | 04/27/2006 |
| 20050240852 | Testing apparatus A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes operation order holding means for holding information indicating that a test operation by a fir... | 10/27/2005 |
