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| Application No. | Application Title | Issue Date |
| 20120110296 | ELECTRONIC APPARATUS A diagnostic tool sends a request format designating a virtual address, which is different from a real address for an EEPROM. When a microcomputer determines that an address designated by the received request format is a virtual address assigned to the EEPROM, the micro... | 05/03/2012 |
| 20120072694 | VIRTUALIZED STORAGE SYSTEM AND METHOD OF OPERATING THEREOF A storage system and method is provided including physical storage devices controlled by storage control devices constituting a storage control layer operatively coupled to the physical storage devices and hosts. The storage control layer includes a first virtual layer ... | 03/22/2012 |
| 20120072696 | METHOD FOR DIAGNOSING A MEMORY OF AN ELECTRONIC DEVICE A electronic device includes a diagnosing system, a processor, a storage system, a memory, and one or more programs. The one or more programs includes a determining module, an obtaining module, a processing module, and a display module. The determining module determines... | 03/22/2012 |
| 20120017064 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM An information processing apparatus is disclosed which is connected to a network and which includes: an address translation section configured such that when a virtual address assigned to a virtual storage area is held in an address translation module and associated the... | 01/19/2012 |
| 20120011299 | Memory device with dynamic controllable physical logical mapping table loading An apparatus includes a processor and a memory that includes computer program code. The memory and the computer program code are configured to, with the processor, cause the apparatus at least to send information from a host device to a mass storage memory device that i... | 01/12/2012 |
| 20120005444 | MICROCODE RENAME RECLAMATION A method of operating a processor includes reclaiming a physical register renamed as a microcode architectural register used by a microcode routine. The physical register is reclaimed according to an indicator corresponding to the microcode architectural register and in... | 01/05/2012 |
| 20120005451 | DATA STORAGE DEVICE AND BAD BLOCK MANAGING METHOD THEREOF A data storage device includes a storage unit, and a controller configured to control the storage unit, wherein the controller is configured to manage a mapping between a logical address space and a virtual address space of the storage unit, virtual address space of the... | 01/05/2012 |
| 20110320723 | METHOD AND SYSTEM TO REDUCE THE POWER CONSUMPTION OF A MEMORY DEVICE A method and system to reduce the power consumption of a memory device. In one embodiment of the invention, the memory device is a N-way set-associative level one (L1) cache memory and there is logic coupled with the data cache memory to facilitate access to only part o... | 12/29/2011 |
| 20110320661 | DIAGNOSE INSTRUCTION FOR SERIALIZING PROCESSING A system serialization capability is provided to facilitate processing in those environments that allow multiple processors to update the same resources. The system serialization capability is used to facilitate processing in a multi-processing environment in which gues... | 12/29/2011 |
| 20110314238 | COMMON MEMORY PROGRAMMING A method for unidirectional communication between tasks includes providing a first task having access to an amount of virtual memory, blocking a communication channel portion of said first task's virtual memory, such that the first task cannot access said portion, provi... | 12/22/2011 |
| 20110307681 | Apparatus and method for mapping architectural registers to physical registers An apparatus and method are provided for performing register renaming, whereby architectural registers from a set of architectural registers are mapped to physical registers from a set of physical registers. Available register identifying circuitry is provided which is ... | 12/15/2011 |
| 20110302224 | DATA STORAGE DEVICE WITH PRELOADED CONTENT Data storage devices and methods that maintain pre-loaded content in storage available to a user are disclosed. A method may include, in a data storage device with a non-volatile memory and a file system database, storing content at a first location in the non-volatile ... | 12/08/2011 |
| 20110296120 | VIRTUAL BUFFER INTERFACE METHODS AND APPARATUSES FOR USE IN WIRELESS DEVICES Techniques are provided which may be implemented in various methods and/or apparatuses that to provide a virtual buffer interface capability between a plurality of processes/engines and a memory pool.... | 12/01/2011 |
| 20110289295 | SYSTEM, METHOD, AND MEDIA FOR NETWORK TRAFFIC MEASUREMENT ON HIGH-SPEED ROUTERS A data structure is provided for storing network contact information based on an array of physical memory locations. Virtual vectors are constructed for each source, wherein each element in each virtual vector is assigned to a corresponding physical memory location with... | 11/24/2011 |
| 20110283083 | Configuring Surrogate Memory Accessing Agents Using Non-Priviledged Processes Configuring a surrogate memory accessing agent using an instruction for translating and storing a data value is described. In one embodiment, the instruction is received that includes a first operand specifying a data value to be translated and a second operand specifyi... | 11/17/2011 |
| 20110276776 | Addressing for Huge Direct-Mapped Object Systems A method, computing system, and computer program product are provided for quickly and space-efficiently mapping an object's address to its home node in a computing system with a very large (possibly multi-petabyte) data set. The addresses of objects comprise three field... | 11/10/2011 |
| 20110264886 | System and Method for Managing Memory Systems and methods that manage memory are provided. In one embodiment, a system for communications may include, for example, a memory management system that may handle a first application employing a virtual address based tagged offset and a second application employin... | 10/27/2011 |
| 20110238946 | Data Reorganization through Hardware-Supported Intermediate Addresses A virtual address scheme for improving performance and efficiency of memory accesses of sparsely-stored data items in a cached memory system is disclosed. In a preferred embodiment of the present invention, a special address translation unit is used to translate sets of... | 09/29/2011 |
| 20110225387 | Unified Virtual Contiguous Memory Manager Memory management methods and computing apparatus with memory management capabilities are disclosed. One exemplary method includes mapping an address from an address space of a physically-mapped device to a first address of a common address space so as to create a first... | 09/15/2011 |
| 20110225386 | DISPERSED STORAGE UNIT CONFIGURATION A dispersed storage (DS) unit for use within a dispersed storage network is capable of self-configuring using registry information provided to the DS unit. The registry information includes a slice name assignment indicating a range of slice names corresponding to a plu... | 09/15/2011 |
| 20110213912 | MEMORY MANAGEMENT AND WRITING METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE SYSTEM USING THE SAME A memory management and writing method for managing a memory module is provided. The memory module has a plurality of memory units and a plurality of data input/output buses corresponding to the memory units. The method includes configuring a plurality of logical units,... | 09/01/2011 |
| 20110202733 | SYSTEM AND/OR METHOD FOR REDUCING DISK SPACE USAGE AND IMPROVING INPUT/OUTPUT PERFORMANCE OF COMPUTER SYSTEMS The present invention provides a system and/or method for reducing disk space usage and/or improving I/O performance of a computer system through the use of data compression and mapping of data page blocks to reduced size data file blocks. The system and/or method can b... | 08/18/2011 |
| 20110197024 | PROVIDING REDUNDANCY IN A VIRTUALIZED STORAGE SYSTEM FOR A COMPUTER SYSTEM A method for providing redundancy in a virtualized storage system for a computer system is provided. The method includes determining a first set of first logical addresses to provide a virtual storage volume. A redundancy schema is then selected to provide redundancy da... | 08/11/2011 |
| 20110173371 | WRITING TO ASYMMETRIC MEMORY A memory controller writes to a virtual address associated with data residing within an asymmetric memory component of main memory that is within a computer system and that has a symmetric memory component, while preserving proximate other data residing within the asymm... | 07/14/2011 |
| 20110173411 | TLB EXCLUSION RANGE A system and method for accessing memory are provided. The system comprises a lookup buffer for storing one or more page table entries, wherein each of the one or more page table entries comprises at least a virtual page number and a physical page number; a logic circui... | 07/14/2011 |
| 20110167489 | Apparatus and Method for Securing Data on a Portable Storage Device A portable storage device including a microprocessor and a secure user data area, the microprocessor operable to perform on-the-fly encryption/decryption of secure data stored on the storage device under a user password, the microprocessor also operable to exclude acces... | 07/07/2011 |
| 20110161620 | SYSTEMS AND METHODS IMPLEMENTING SHARED PAGE TABLES FOR SHARING MEMORY RESOURCES MANAGED BY A MAIN OPERATING SYSTEM WITH ACCELERATOR DEVICES Systems and methods are provided that utilize shared page tables to allow an accelerator device to share physical memory of a computer system that is managed by and operates under control of an operating system. The computer system can include a multi-core central proce... | 06/30/2011 |
| 20110161619 | SYSTEMS AND METHODS IMPLEMENTING NON-SHARED PAGE TABLES FOR SHARING MEMORY RESOURCES MANAGED BY A MAIN OPERATING SYSTEM WITH ACCELERATOR DEVICES Systems and methods are provided that utilize non-shared page tables to allow an accelerator device to share physical memory of a computer system that is managed by and operates under control of an operating system. The computer system can include a multi-core central p... | 06/30/2011 |
| 20110161616 | ON DEMAND REGISTER ALLOCATION AND DEALLOCATION FOR A MULTITHREADED PROCESSOR A system for allocating and de-allocating registers of a processor. The system includes a register file having plurality of physical registers and a first table coupled to the register file for mapping virtual register IDs to physical register IDs. A second table is cou... | 06/30/2011 |
| 20110145541 | METHOD AND SYSTEM TO ACCELERATE ADDRESS TRANSLATION In a method to accelerate address translation into a physical address, a computer maps a virtual memory area with a large page, the virtual memory area including multiple virtual pages satisfying a predetermined condition and being handled in units of pages, the large p... | 06/16/2011 |
| 20110145480 | FLASH MEMORY STORAGE SYSTEM FOR SIMULATING REWRITABLE DISC DEVICE, FLASH MEMORY CONTROLLER, COMPUTER SYSTEM, AND METHOD THEREOF A flash memory storage system including a flash memory chip, a connector, and a controller is provided. The flash memory chip has a plurality of physical blocks. The connector is configured to couple to a host system. The controller is coupled to the flash memory chip a... | 06/16/2011 |
| 20110131365 | Data Storage System and Method A data storage system and method are disclosed. The data storage system includes a first and a second memory and a memory control unit. The first memory is non-volatile, and the second memory is designed to store dynamic information of the first memory. The memory contr... | 06/02/2011 |
| 20110125954 | DATA STORAGE METHOD FOR FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE SYSTEM USING THE SAME A data storage method for storing data into a flash memory chip is provided. The flash memory chip has a plurality of physical addresses, and these physical addresses include a plurality of fast physical addresses and a plurality of slow physical addresses. In the data ... | 05/26/2011 |
| 20110113214 | INFORMATION HANDLING SYSTEM MEMORY MANAGEMENT An information handling system (IHS) loads an application that may include startup code and steady state operation code. The IHS allocates one region of system memory to the startup code and another region of system memory to the steady state operation code. A programme... | 05/12/2011 |
| 20110107052 | Virtual Disk Mapping A storage area network can include a storage virtualization entity—intelligent storage application resource (iSAR)—either as a separate device in the fabric, or as an integrated module in one or more switches within the fabric. All I/O operations can be re-directed ... | 05/05/2011 |
| 20110107056 | METHOD FOR DETERMINING DATA CORRELATION AND A DATA PROCESSING METHOD FOR A MEMORY A method for determining data correlation and a data processing method for a memory are disclosed. The data with correlation is collected and stored in the same block. Also the data with correlation is determined based on a specific function to be executed by the user. ... | 05/05/2011 |
| 20110087856 | Memory Device with Serial Protocol and Corresponding Method of Addressing The memory device comprises a physical memory plane (PMP) comprising m first physical lines (RGP1i) extending along a first direction and n second physical lines (RGP2j) extending along a second direction, reception means for receiving a logi... | 04/14/2011 |
| 20110082967 | Data Caching In Non-Volatile Memory Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, can perform data caching. In some implementations, a method and system include receiving information that includes a logical address, allocating a physical page in a non-v... | 04/07/2011 |
| 20110082997 | VIRTUALIZED STORAGE SYSTEM AND METHOD OF OPERATING THEREOF There are provided a storage system and a method of operating thereof. The method comprises: a) representing to a plurality of hosts an available logical address space divided into one or more logical groups (e.g. logical volumes, virtual partitions, snapshots, combinat... | 04/07/2011 |
| 20110078358 | DEFERRED COMPLETE VIRTUAL ADDRESS COMPUTATION FOR LOCAL MEMORY SPACE REQUESTS One embodiment of the present invention sets forth a technique for computing virtual addresses for accessing thread data. Components of the complete virtual address for a thread group are used to determine whether or not a cache line corresponding to the complete virtua... | 03/31/2011 |
