Bizarre Patents
Microwave Oven With Removable Storage Cassette in Dashboard of Motor Vehicle
A microwave oven adapted for use within a motor vehicle dashboard area. The microwave oven has a removable storage cassette, and slidable platforms for securing and serving containers of beverages and foods.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Application No. | Application Title | Issue Date |
| 20120072637 | I/O BRIDGE DEVICE, RESPONSE-REPORTING METHOD, AND PROGRAM An I/O bridge device includes: a command receiver that receives a command signal indicating a command to a memory controller from a peripheral component; a converter that converts the command signal into a command packet including the command and identification informat... | 03/22/2012 |
| 20120047308 | METHOD FOR ADJUSTING LINK SPEED AND COMPUTER SYSTEM USING THE SAME A method for adjusting a link speed and a computer system using the same are provided. The method is used after executing a boot block code and before executing a bus enumeration procedure. A testing step is executed using a maximum link speed supported by both a bridge... | 02/23/2012 |
| 20120047307 | COMPUTING DEVICE AND METHOD FOR CLEARING DATA STORED IN COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR CHIP A method for clearing data stored in a complementary metal-oxide semiconductor (CMOS) chip of a computing device. The computing device further includes a CMOS jumper connected to the CMOS chip, and a general purpose input/output (GPIO) interface connected to the CMOS ju... | 02/23/2012 |
| 20120036304 | INJECTION OF I/O MESSAGES A data processing system includes a processor core, a system memory coupled to the processor core, an input/output adapter (IOA), and an input/output (I/O) host bridge coupled to the processor core and to the IOA. The I/O host bridge includes a register coupled to recei... | 02/09/2012 |
| 20120023280 | Atomic Operations with Page Migration in PCIe A method and data processing system enables scheduling of atomic operations within a Peripheral Component Interconnect Express (PCIe) architecture during page migration. In at least one embodiment, firmware detects the activation of a page migration operation. The firmw... | 01/26/2012 |
| 20120017022 | REGISTER ACCESS IN DISTRIBUTED VIRTUAL BRIDGE ENVIRONMENT Systems and methods to perform a register access are described. A particular method includes receiving a data frame at a bridge element of a plurality of bridge elements in communication with a plurality of server computers. The data frame may include a register access ... | 01/19/2012 |
| 20120005390 | SUPPORTING SYSTEM FOR REMOTE CONTROL A remote control support system provides a simple way to allow remote users to access a computer in a variety of circumstances, even when no software installed on the computer. In some cases, the system includes a hardware device to simulate most USB mice, keyboards, st... | 01/05/2012 |
| 20110302349 | METHOD AND SYSTEM TO IMPROVE THE OPERATIONS OF AN INTEGRATED NON-TRANSPARENT BRIDGE DEVICE A method and system to improve the operations of an integrated non-transparent bridge device (NTB) that is coupled to another NTB device or Root Port device. The integrated NTB device has logic to maintain ordering of interrupts to be sent to the remote Root Port or NTB... | 12/08/2011 |
| 20110191518 | VIRTUALIZATION OF AN INPUT/OUTPUT DEVICE FOR SUPPORTING MULTIPLE HOSTS AND FUNCTIONS Methods and apparatus are provided for simultaneously supporting multiple hosts with a single communication port; each host may host multiple functions. The input/output device comprises multiple buffers; each buffer stores packets for one host, but can be dynamically r... | 08/04/2011 |
| 20110125945 | COMMUNICATIONS MODULE APPARATUS, INTEGRATED CIRCUIT AND METHOD OF COMMUNICATING DATA A communications module apparatus for an automotive network comprises an input for receiving data to be transmitted. The apparatus also comprises a first output for coupling to a first bus line and a second output for coupling to a second bus line. An alternating voltag... | 05/26/2011 |
| 20110099310 | CONTROLLING PASSTHROUGH OF COMMUNICATION BETWEEN MULTIPLE BUSES A demodulator can include first data and clock pads to couple the demodulator to a host device via a first bus, and second data and clock pads to couple the demodulator to a radio frequency (RF) tuner via a second bus. The device may further include passthrough logic to... | 04/28/2011 |
| 20110047312 | CAPTURING READ DATA Various techniques are disclosed for providing data retrieved from a memory device and furnished to a memory bus in response to a read operation to a local bus interface. For instance, a set of conductive traces may be provided that forms a communication path between th... | 02/24/2011 |
| 20110040912 | APPARATUS AND METHOD FOR MULTIPLE ENDIAN MODE BUS MATCHING Apparatus and method for bus matching. The method includes: receiving data transfer characteristics at a first endian mode and at a second endian mode; determining a connectivity of multiple devices to an interfacing bus in response to the data transfer characteristics ... | 02/17/2011 |
| 20110035526 | Methods and Apparatuses For Serial Bus Sideband Communications Methods and apparatuses that utilize a serial bus, such as a universal serial bus (USB), for communications between a communications network, a computing device, and an auxiliary device are disclosed. Some embodiments comprise methods handling sideband communications us... | 02/10/2011 |
| 20110029710 | CONVERTING RESETS IN SHARED I/O SYSTEM Embodiments include methods, apparatus, and systems for converting resets in a shared I/O system. One embodiment includes a method that propagates a first type of reset from a host computer to a multi-function device that shares I/O operations with other hosts. The firs... | 02/03/2011 |
| 20110022768 | METHOD AND APPARATUS FOR ENHANCING UNIVERSAL SERIAL BUS APPLICATIONS A system for enhancing universal serial bus (USB) applications comprises an upstream processor, a downstream processor and a main controller. The upstream processor accepts standard USB signals from a USB host and independently provides responses required by USB specifi... | 01/27/2011 |
| 20100262747 | LOCATION-BASED BUS TERMINATION FOR MULTI-CORE PROCESSORS A multi-core bus termination apparatus includes a location array and a plurality of drivers. The location array generates a plurality of location signals that indicate locations on the bus of a corresponding plurality of nodes that are coupled to the bus, where the loca... | 10/14/2010 |
| 20100122009 | I/O SPACE REQUEST SUPPRESSING METHOD FOR PCI DEVICE To minimize the restriction on the number of available PCI devices although the assignable size of I/O space is limited, an arithmetic unit is provided with a configuration information acquisition device for acquiring the configuration information about PCI devices, an ... | 05/13/2010 |
| 20090292853 | APPARATUS AND METHOD FOR PRECLUDING EXECUTION OF CERTAIN INSTRUCTIONS IN A SECURE EXECUTION MODE MICROPROCESSOR An apparatus providing for a secure execution environment is presented. The apparatus includes a microprocessor and a secure non-volatile memory. The microprocessor is configured to execute non-secure application programs and a secure application program, where the non-... | 11/26/2009 |
| 20090292843 | Controlling passthrough of communications between multiple buses A demodulator can include first data and clock pads to couple the demodulator to a host device via a first bus, and second data and clock pads to couple the demodulator to a radio frequency (RF) tuner via a second bus. The device may further include passthrough logic to... | 11/26/2009 |
| 20090106475 | System and Method for Managing Metrics Table Per Virtual Port in a Logically Partitioned Data Processing System A method, computer program product, and distributed data processing system that allows a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, to track performance and reliability statistics per virtual upstream and downstream port, thereby allowing a sys... | 04/23/2009 |
| 20090094399 | Dynamic virtualization of switches and multi-ported bridges A virtualization of the internal interconnection bus, which results in a virtualized switch or virtualized multi-ported bridge. In the case of a PCI Express switch, one embodiment includes virtualization of the undefined interconnection bus. In the case of a Multi-porte... | 04/09/2009 |
| 20090070514 | PROGRAMMABLE CONTROLLER In a programmable controller including a special unit, a special-purpose integrated circuit element can be readily utilized for multiple purposes to extend the range of applications to reduce a manufacture cost. A special unit (130) connected to a microprocessor ... | 03/12/2009 |
| 20090070515 | PHY-LESS ULPI AND UTMI BRIDGES Embodiments of the present invention provide a unique capability of implementing a pair of pseudo-PHY interfaces using a bridge. From the host and device perspectives, the host and device communicate through a PHY interface. The bridge, however, avoids actually using a ... | 03/12/2009 |
| 20090055569 | Bridge device with page-access based processor interface An integrated circuit bridge device can include a first interface circuit coupled to a buffer circuit and configurable in response to configuration information to receive command information, address information, and data values on a same multi-bit input/output (I/O) bu... | 02/26/2009 |
| 20080313380 | RESOURCE MANAGEMENT IN MULTI-PROCESSOR SYSTEM Resource management techniques in multi-processor systems are described. Embodiments include a multi-processor system having a primary processor for communication with pipelined secondary processors. The secondary processors include registers containing status informati... | 12/18/2008 |
| 20080307147 | COMPUTER SYSTEM BUS BRIDGE A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface ... | 12/11/2008 |
| 20080276018 | SYSTEM ON A CHIP FOR NETWORKING A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more netwo... | 11/06/2008 |
| 20080228985 | Embedded Processor with Direct Connection of Security Devices for Enhanced Security An integrated circuit, a computer system and a method of operating an computer system is disclosed. The method includes receiving a request for an authentication, at a microcontroller and requesting security data from a security device. The method also includes receivin... | 09/18/2008 |
| 20080201514 | Method of locating peripheral component interconnect devices A method of locating peripheral component interconnect (PCI) devices is provided. The method includes analyzing peripheral component interconnect spaces (PCI spaces) of peripheral component interconnect-peripheral component interconnect bridges (PCI-PCI bridges) of a 0-... | 08/21/2008 |
| 20080140903 | COMPOSING ON-CHIP INTERCONNECTS WITH CONFIGURABLE INTERFACES Embodiments of apparatuses, systems, and methods are described for a machine-readable medium having instructions stored thereon, which, when executed by a machine, to cause the machine to generate a representation of an apparatus. The apparatus includes a bridge agent, ... | 06/12/2008 |
| 20080126663 | Storage system and logical unit checking method for the same In a situation where a host computer or storage system is an initiator and the storage system or another storage system is a target, when the initiator intends to check LUs in the target, if the initiator judges that the number of delay ACKs is set to more than one, it ... | 05/29/2008 |
| 20080052442 | Rack Interface Pod with intelligent platform control Rack Interface Pods can be augmented with non-KVM (keyboard, video and mouse) functionality that can enable greater analysis of the state of the computer to which the RIP is attached. A RIP can be augmented to include a non-KVM input connection (e.g., an Intelligent Pla... | 02/28/2008 |
| 20080016266 | Method And Apparatus For Smart Storage Devices A smart storage device that can be either used in conjunction with a conventional storage device or integrated into a conventional storage device to become a smart storage device is disclosed. The smart storage device of the present invention includes a transmission int... | 01/17/2008 |
| 20070245056 | Processor Component A chip arrangement comprising a first chip having at least one first signal interface with first coupling elements arranged along a first line in a first number density and at least one second chip with at least one second signal interface with second coupling elements ... | 10/18/2007 |
| 20070192526 | Apparatus and methods for controlling a data tapping session in a storage area network Disclosed is a a session modification mechanism for altering a data tapping process in a storage area network (SAN). In general, a data tapping mechanism is set up so that an appliance receives SAN data that is tapped from a particular SAN session. That is, the data tap... | 08/16/2007 |
| 20070186023 | INTERRUPTION CONTROL SYSTEM An interruption control system includes a PIC, an APIC and a power management unit disposed in a south bridge chip of a computer system. In response to the triggering of an interrupt status indicating signal received through an interrupt status indicating pin of a north... | 08/09/2007 |
| 20070168595 | System and method for memory hub-based expansion bus A system memory includes a memory hub controller, a memory module accessible by the memory hub controller, and an expansion module having a processor circuit coupled to the memory module and also having access to the memory module. The memory hub controller is coupled t... | 07/19/2007 |
| 20070168594 | Signal transmission method, bridge unit, and information processing apparatus An information processing apparatus having a fat tree structure, in which signal transmission across node columns managed by respective processor units is performed through end point bridges included in bridge chips. In this transmission method, the bridge chips perform... | 07/19/2007 |
| 20070101042 | Multimedia interface device, information processing method, corresponding information carrier and computer program A multimedia interface device for the transfer of information in a communications network comprises, at least two connection means to which, respectively, at least two sending devices can get connected by means respectively of two communications links compliant respecti... | 05/03/2007 |
