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| Application No. | Application Title | Issue Date |
| 20110320662 | IDENTIFICATION OF TYPES OF SOURCES OF ADAPTER INTERRUPTIONS A source identification facility is provided that enables identification of the one or more types of adapters requesting an interrupt in order to facilitate processing of the interrupt. The adapter types are accessible to the operating system and are used to tailor proc... | 12/29/2011 |
| 20110289249 | INTERRUPTION FACILITY FOR ADJUNCT PROCESSOR QUEUES Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an interruption is initiated. This interruption signals to a processor that a reply to a request is waiting on the queue. I... | 11/24/2011 |
| 20110131357 | Interrupt Queuing in a Media Controller Architecture Described embodiments provide a media controller for servicing contexts corresponding to data transfer requests from host devices. The media controller includes a context generator for generating contexts corresponding to the data transfer requests and a buffer for stor... | 06/02/2011 |
| 20110093637 | Interrupt Moderation A technique for interrupt moderation allows coalescing interrupts from a device into groups to be processed as a batch by a host processor. Receive and send completions may be processed differently. When the host is interrupted for receive completions, it may check for ... | 04/21/2011 |
| 20110082959 | TIMEOUT PREVENTING DEVICE, A TIMEOUT PREVENTING METHOD AND A PROGRAM THEREOF Preventing time out of an IO transaction during CPU re-initialization by controlling the IO transaction so that the time when the IO transaction is continuously stopped during the CPU re-initialization process is within a predetermined time that prevents complete time o... | 04/07/2011 |
| 20100274938 | PERIPHERAL ADAPTER INTERRUPT FREQUENCY CONTROL BY ESTIMATING PROCESSOR LOAD AT THE PERIPHERAL ADAPTER Interrupt frequency control by estimating processor load in the peripheral adapter provides adaptive interrupt latency to improve performance in a processing system. A mathematical function of the depth of one or more queues of the adapter is compared to its historical ... | 10/28/2010 |
| 20100262741 | COMPUTER SYSTEM, INTERRUPT RELAY CIRCUIT AND INTERRUPT RELAY METHOD A method for making it possible for a virtualization software (VMM) to generally identify a PCI function of an interrupt requester presupposing the existing I/O devices based on the PCI express is provided. An interrupt relay circuit is provided between an I/O device ba... | 10/14/2010 |
| 20100262740 | MULTIPLE COMMAND QUEUES HAVING SEPARATE INTERRUPTS A host device may include a driver that is arranged and configured to communicate commands to a data storage device and multiple pairs of queues, where each of the pairs of queues may include a command queue that is populated with commands for retrieval by the data stor... | 10/14/2010 |
| 20100217905 | Synchronization Optimized Queuing System A synchronization optimized queuing method and device to minimize software/hardware interaction in network interface hardware during an end-of-initiative process, including network adapter queue implementations for network interface hardware for optimized communication ... | 08/26/2010 |
| 20100169528 | Interrupt technicques Techniques are described that can be used by a message engine to notify a core or hardware thread of activity. For example, an inter-processor interrupt can be used to notify the core or hardware thread. The message engine may generate notifications in response to one o... | 07/01/2010 |
| 20100106877 | APPARATUS AND METHOD TO CONTROL ACCESS TO STORED INFORMATION A method is disclosed to control access to stored information. The method supplies a control unit in communication with a computing device and in communication with stored information. If the computing device requests access to that stored information, the method determ... | 04/29/2010 |
| 20100100656 | INTERRUPTION FACILITY FOR ADJUNCT PROCESSOR QUEUES Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an interruption is initiated. This interruption signals to a processor that a reply to a request is waiting on the queue. I... | 04/22/2010 |
| 20100077399 | Methods and Systems for Allocating Interrupts In A Multithreaded Processor A multithreaded processor capable of allocating interrupts is described. In one embodiment, the multithreaded processor includes an interrupt module and threads for executing tasks. The interrupt module can identify a priority for each thread based on a task priority fo... | 03/25/2010 |
| 20100030939 | REQUEST CONTROLLER, PROCESSING UNIT, ARRANGEMENT, METHOD FOR CONTROLLING REQUESTS AND COMPUTER PROGRAM PRODUCT An request controller for controlling requests of a processing unit. The request controller may include an request controller input for receiving an request and an request processing unit connected to the request controller input. The request may request to switch a con... | 02/04/2010 |
| 20090228625 | METHODS AND SYSTEM FOR INTERRUPT DISTRIBUTION IN A MULTIPROCESSOR SYSTEM A method for distributing interrupt load to processors in a multiprocessor system. The method includes executing current transactions with multiple processors (104, 106, 108) where each transaction is associated with one of the processors, generating an interrupt... | 09/10/2009 |
| 20090172230 | DISTRIBUTED REAL-TIME OPERATING SYSTEM A distributed control system and methods of operating such a control system are disclosed. In one embodiment, the distributed control system is operated in a manner in which interrupts are at least temporarily inhibited from being processed to avoid excessive delays in ... | 07/02/2009 |
| 20090083467 | Method and System for Handling Interrupts Within Computer System During Hardware Resource Migration A method and system for handling interrupts within a computer system during hardware resource migration are disclosed. In at least some embodiments, the method includes (a) programming an address conversion component so that incoming interrupt signals are directed to a ... | 03/26/2009 |
| 20080320194 | MONITORED NOTIFICATION FACILITY FOR REDUCING INTER-PROCESS / INTER-PARTITION INTERRUPTS Example operations related to deferring interrupts are herein disclosed. In one example embodiment, a method includes, but is not limited to, writing a message to a memory location shared between a sender and a receiver; and requesting that an interrupt be transmitted t... | 12/25/2008 |
| 20080276027 | INTERRUPT CONTROL APPARATUS, BUS BRIDGE, BUS SWITCH, IMAGE PROCESSING APPARATUS, AND INTERRUPT CONTROL METHOD An interrupt control apparatus that controls an interrupt process request caused by a predetermined interrupt factor is disclosed. The interrupt control apparatus includes: an obtaining unit configured to obtain an interrupt process request signal including an interrupt... | 11/06/2008 |
| 20080256280 | Splitting One Hardware Interrupt To Multiple Handlers A method and apparatus are provided for reducing latency associated with processing events of a hardware interrupt. Send and receive events share the same hardware interrupt. A receive handler and a separate send handler are provided to simultaneously process completion... | 10/16/2008 |
| 20080162763 | Interrupt mailbox in host memory Embodiments of an interrupt mailbox in host memory are described herein. In an implementation, a device connected to a host writes interrupt data corresponding to an interrupt generated by the device to host memory. Then, the host, when processing the interrupt, accesse... | 07/03/2008 |
| 20080155154 | Method and System for Coalescing Task Completions Certain aspects of a method and system for coalescing task completions may include coalescing a plurality of completions per connection associated with an I/O request. An event may be communicated to a global event queue, and an entry may be posted to the global event q... | 06/26/2008 |
| 20080136793 | Electronic Device Having A Position Sensor The present invention provides an electronic device comprising: —a position sensor (102; 302; 502), —a first integrated circuit component (106; 306; 506) coupled to the position sensor for acquisition of position data (112; 312), —a memory ( 06/12/2008 | |
| 20080133812 | Context based event handling and execution with prioritization and interrupt management Embodiments of the present invention provide improved event handling between systems. In one embodiment, the present invention includes software event handling method comprising receiving a first event from a first source system in a plurality of source systems, the fir... | 06/05/2008 |
| 20080091868 | Method and System for Delayed Completion Coalescing Certain aspects of a method and system for delayed completion coalescing may be disclosed. Exemplary aspects of the method may include accumulating a plurality of bytes of incoming TCP segments in a host memory until a number of the plurality of bytes of incoming TCP se... | 04/17/2008 |
| 20080046622 | Transmission control device and transmission control method An address crossbar switch temporarily buffers received requests while monitoring the requests, and counts requests of a predetermined type (for example, long-packet address requests). When a counter value exceeds a predetermined threshold value (for example, when a lon... | 02/21/2008 |
| 20080028116 | Event Queue in a Logical Partition An information processing system is provided which includes a plurality of system resources, and an event queue having a predetermined number of entries. An event recording mechanism of the information processing system is operable to make entries regarding events in th... | 01/31/2008 |
| 20070204086 | PRODUCT BASED CONFIGURATION AND CONTROL OF MANUFACTURING EQUIPMENT Methods and apparatus, including computer program products, for product based configuration and control of manufacturing equipment. The present invention provides a method for manufacturing. The method includes identifying components to be mounted on a printed circuit b... | 08/30/2007 |
| 20070106827 | Centralized interrupt controller A centralized interrupt controller with a single copy of APIC logic provides APIC interrupt delivery services for all processing units of a multi-sequencer chip or system. An interrupt sequencer block of the centralized interrupt controller schedules the interrupt servi... | 05/10/2007 |
| 20060271718 | Method of preventing error propagation in a PCI / PCI-X / PCI express link An embodiment is a method and apparatus to prevent the propagation of an error in a transmission from an I/O processor of a peripheral device to a host in a computer system utilizing a PCI, PCI-X, or PCI Express link. An embodiment detects an error in a transmission, ma... | 11/30/2006 |
| 20060230209 | Event queue structure and method An information processing system is provided which includes a plurality of system resources, and an event queue having a maximum number of entries. An event recording mechanism of the information processing system is operable to make entries regarding events in the even... | 10/12/2006 |
| 20060149878 | Efficient interrupt processing in systems with multiple serial protocol engines An apparatus and method for quickly processing latency-sensitive interrupts and for processing order-dependent interrupts in the proper order. ... | 07/06/2006 |
| 20050268014 | System for application priority based on device operating mode System for application priority based on device operating mode. A method is provided for allocating a top visible resource on a device. The method includes receiving a request requesting allocation of the top visible resource to a requesting application, and determining... | 12/01/2005 |
| 20050210174 | System and method for forwarding interrupt requests A method and system for forwarding interrupt requests from a source device to a destination device. A controller bridge receives data, from a source device, for a destination device and stores the incoming data in a data queue. An interrupt request is received from the ... | 09/22/2005 |
