A haircutting appliance comprises an enclosed housing having a hollow handle connecting the housing to a vacuum source to carry away cut hairs from a subject's head.
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| Application No. | Application Title | Issue Date |
| 20120109622 | EXTRACT CPU TIME FACILITY An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that do not require a call to operating system services. The facility includes an instruction that determines elap... | 05/03/2012 |
| 20110307238 | Methods for utilizing a javascript emulator in a web content proxy server and devices thereof A method, computer readable medium and apparatus that utilize a JavaScript emulator in a proxy server to create and store an object model of a web page which has one or more JavaScript instruction sets. At least one of the one or more JavaScript instruction sets are ext... | 12/15/2011 |
| 20110238403 | TRANSLATION BLOCK INVALIDATION PREHINTS IN EMULATION OF A TARGET SYSTEM ON A HOST SYSTEM In emulation of a target system on a host system one or more blocks of target system code may be translated with the host system to produce one or more corresponding blocks of translated code. Translating the target system code may include linking two or more blocks of ... | 09/29/2011 |
| 20110231179 | METHODS FOR CONVERTING INSTRUCTIONS WITH BASE REGISTER-RELATIVE ADDRESSING IN AN EMULATION An original processor uses addresses with a first length of n bits for addressing in a cyclical address space and a target processor uses addresses with a second length of m bits, where the second length m is greater than the first length n. In the original processor, d... | 09/22/2011 |
| 20110208505 | ASSIGNING FLOATING-POINT OPERATIONS TO A FLOATING-POINT UNIT AND AN ARITHMETIC LOGIC UNIT A processor may include a floating-point unit (FPU) and an arithmetic logic unit (ALU). Instructions to the processor may include greater or lesser amounts of floating-point operations and integer operations. In a circumstance where instructions include predominantly in... | 08/25/2011 |
| 20110197272 | Low-Latency Detection of Scripting-Language-Based Exploits Systems and methods for protecting client computers are described. One method includes receiving webpage data at a proxy from a webpage before the data reaches an intended recipient; gathering scripting-language-data from the webpage data; normalizing the scripting-lang... | 08/11/2011 |
| 20110172986 | Mainframe data stream proxy and method for caching communication between emulators and mainframes The present invention concerns a mainframe data stream proxy (MDSP) (1) for caching communication of at least one emulator (2) directed to at least one mainframe (3), wherein the MDSP (1) comprises:
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| 20110161542 | EMULATION OF AN INPUT/OUTPUT ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER Embodiments of systems, apparatuses, and methods for emulating an input/output Advanced Programmable Interrupt Controller are disclosed. In one embodiment, an apparatus includes a first interrupt controller having a first programming model, and emulation logic to emulat... | 06/30/2011 |
| 20110153307 | Transitioning From Source Instruction Set Architecture (ISA) Code To Translated Code In A Partial Emulation Environment In one embodiment, a processor can operate in multiple modes, including a direct execution mode and an emulation execution mode. More specifically, the processor may operate in a partial emulation model in which source instruction set architecture (ISA) instructions are... | 06/23/2011 |
| 20110153308 | VIRTUALIZATION APPARATUS AND PROCESSING METHOD THEREOF A virtualization apparatus includes: an emulation manager for searching a basic block cache for an entry with an entry point, and, if there exists no entry with the entry point in the basic block cache, requesting the identification of a basic block corresponding to the... | 06/23/2011 |
| 20110112820 | Reusing Invalidated Traces in a System Emulator Native code corresponding to an invalidated trace is re-used in a system emulator. A first trace is identified. A dropped second trace is identified. The dropped second trace is associated with a first native code for emulating the second trace. If the identified first ... | 05/12/2011 |
| 20110106521 | Extended Input/Output Measurement Word Facility and Emulation of That Facility An Extended Input/output (I/O) measurement word facility is provided. Provision is made for emulation of the Extended I/O measurement word facility. The facility provides for storing measurement data associated with a single I/O operation in an extended measurement word... | 05/05/2011 |
| 20110093252 | METHOD OF ACCURATELY SIMULATING A TARGET MACHINE ON A SIMULATOR A method of accurately simulating a target machine on a simulator, wherein, a mapping table is set up in a main program to record correspondence relations between target machine instructions and host machine instructions, and a signal handler is registered in a host mac... | 04/21/2011 |
| 20110071815 | Host Cell Spatially Aware Emulation of a Guest Wild Branch A instructions of a Guest program to be emulated by a Host computer occupy one or more Guest cells of Guest memory, each Guest cell having a corresponding Host cell in Host memory. The emulator selects a Host cell for emulating a Guest instruction. When the Host cell co... | 03/24/2011 |
| 20110071816 | Just In Time Compiler in Spatially Aware Emulation of a Guest Computer Instruction Set A selected group of Guest machine instructions in an emulation environment are translated to a semantic routine of Host machine instructions, wherein Guest cells corresponding to an opcode portion of a Guest instruction are mapped to corresponding Host cells, wherein th... | 03/24/2011 |
| 20110071813 | Page Mapped Spatially Aware Emulation of a Computer Instruction Set Dynamic creation of a spatially aware emulation environment comprising Host cells of Host pages corresponding to Guest cells of Guest pages of Guest instructions. Each Host cell comprises a semantic routine for emulating a corresponding Guest instruction located at the ... | 03/24/2011 |
| 20110071814 | Self Initialized Host Cell Spatially Aware Emulation of a Computer Instruction Set A plurality of Guest cells of Guest instructions are provided with corresponding Host cells for emulating Guest instructions, each Guest instruction having a Guest cell corresponding to a Host cell. Each of the Host cells are initialized with an initialization routine f... | 03/24/2011 |
| 20110072171 | DMA AND GRAPHICS INTERVACE EMULATION An emulator schedules emulation threads for DMA emulation and other emulation functions in a time-multiplexed manner. Emulation threads are selected for execution according to a load balancing scheme. Non-DMA emulation threads are executed until their execution time per... | 03/24/2011 |
| 20100305937 | COPROCESSOR SUPPORT IN A COMPUTING DEVICE Coprocessor support on a computing device is provided by means of external modules attaching themselves to the operating system (OS) kernel controlling the device at system boot time, with the modules registering themselves as valid coprocessor handlers. Threads initial... | 12/02/2010 |
| 20100305938 | TRANSLATION BLOCK INVALIDATION PREHINTS IN EMULATION OF A TARGET SYSTEM ON A HOST SYSTEM Emulation systems and method involving invalidating blocks of translated code in emulation of a target system on a host system in are disclosed. One or more blocks of target system code are translated by the host system to produce one or more corresponding blocks of tra... | 12/02/2010 |
| 20100299130 | Apparatus, method and program for processing information Apparatus and method for processing information may determine whether a migration condition exists by a source information processing unit executing a program. When a migration condition is determined to exist by the source information processing unit, a destination inf... | 11/25/2010 |
| 20100299506 | ROTATE THEN OPERATE ON SELECTED BITS FACILITY AND INSTRUCTIONS THEREFORE A rotate then operate instruction having a T bit is fetched and executed wherein a first operand in a first register is rotated by an amount and a Boolean operation is performed on a selected portion of the rotated first operand and a second operand in of a second regis... | 11/25/2010 |
| 20100281292 | METHOD AND APPARATUS FOR RESOLVING CLOCK MANAGEMENT ISSUES IN EMULATION INVOLVING BOTH INTERPRETED AND TRANSLATED CODE Methods and systems for resolving clock management issues in emulation of a target system on a host system are disclosed. A first set of code instructions of a target program is emulated to generate a first set of emulated instructions that emulate a first component on ... | 11/04/2010 |
| 20100274551 | SUPPORT FOR A NON-NATIVE APPLICATION Aspects of the invention are directed to a systems and methods for operating a non-native binary in dynamic binary translation environment. In accordance with an embodiment, there is provided a computer program product in a computer readable medium. The product includes... | 10/28/2010 |
| 20100205400 | EXECUTING ROUTINES BETWEEN AN EMULATED OPERATING SYSTEM AND A HOST OPERATING SYSTEM Approaches for emulating an operating system. A method includes executing a first operating system (OS) on an instruction processor. The first OS includes instructions of a first instruction set that are native to the instruction processor. A second OS is emulated on th... | 08/12/2010 |
| 20100185898 | INPUT/OUTPUT PROCESSOR (IOP) BASED ZSERIES EMULATION The emulation of a data processing I/O protocol employs a process which obviates the need to consider hardware specific functionality for which emulation is not an optimal solution. The particular protocol described in exemplary fashion herein is the OSA protocol as def... | 07/22/2010 |
| 20100138208 | VIRTUAL MACHINE SYSTEM AND METHOD FOR CONTROLLING INTERRUPT THEREOF A VMM disables an interrupt interception flag on at least one CPU to execute, upon reception of an interrupt, an interrupt handler code of an OS, and enables the interrupt interception flag on the at least one CPU to execute, upon the reception of the interrupt, an emul... | 06/03/2010 |
| 20100125445 | APPARATUS AND METHOD FOR TESTING ELECTRONIC APPARATUSES A method for testing electronic apparatuses is provided. The method includes: reading an identification (ID) of an emulator adapter; searching for the script name in a test table according to the ID; fetching the script from a storage according to the determined script ... | 05/20/2010 |
| 20100125444 | Method And Apparatus For Reducing Read Latency In A Pseudo Nor Device A NOR emulating memory device has a memory controller with a first bus for receiving a NOR command signal, and for servicing a read operation from a desired address in a NOR memory. The memory controller has a second bus for communicating with a NAND memory in a NAND me... | 05/20/2010 |
| 20100114555 | HANDLING MUTEX LOCKS IN A DYNAMIC BINARY TRANSLATION ACROSS HETEROGENOUS COMPUTER SYSTEMS A method for executing non-native binaries on a host computer architecture comprises receiving a guest executable binary encoded on a computer readable medium. The guest executable binary is executable on a first computer architecture. Moreover, the guest executable bin... | 05/06/2010 |
| 20100106479 | CPU EMULATION SYSTEM, CPU EMULATION METHOD, AND RECORDING MEDIUM HAVING A CPU EMULATION PROGRAM RECORDED THEREON A CPU emulation system includes; a plurality of virtual CPUs each operating on a different physical CPU; an instruction sequence selecting section for selecting an instruction sequence to be optimized; a virtual CPU selecting section for selecting one of the plurality o... | 04/29/2010 |
| 20100094221 | MULTI-LANGUAGE / MULTI-PROCESSOR INFUSION PUMP ASSEMBLY An infusion pump assembly includes a reservoir assembly configured to contain an infusible fluid. A motor assembly is configured to act upon the reservoir assembly and dispense at least a portion of the infusible fluid contained within the reservoir assembly. Processing... | 04/15/2010 |
| 20090319256 | DECOUPLING DYNAMIC PROGRAM ANALYSIS FROM EXECUTION ACROSS HETEROGENEOUS SYSTEMS Dynamic program analysis is decoupled from execution in virtual computer environments so that program analysis can be performed on a running computer program without affecting or perturbing the workload of the system on which the program is executing. Decoupled dynamic ... | 12/24/2009 |
| 20090276205 | STABLIZING OPERATION OF AN EMULATED SYSTEM Disclosure of approaches for stabilizing an emulated system. In one approach, a first operating system (OS) is executed on an instruction processor, the first OS including instructions native to the instruction processor. A second OS and a plurality of application progr... | 11/05/2009 |
| 20090271172 | Emulating A Computer Run Time Environment Emulating a computer run time environment as a component of a dynamic binary translation loop that translates target executable code compiled for execution on a target computer to code executable on a host computer of a kind other than the target computer, the target ex... | 10/29/2009 |
| 20090228262 | USE OF TEST PROTECTION INSTRUCTION IN COMPUTING ENVIRONMENTS THAT SUPPORT PAGEABLE GUESTS Management of storage used by pageable guests of a computing environment is facilitated. A query instruction is provided that details information regarding the storage location indicated in the query. It specifies whether the storage location, if protected, is protected... | 09/10/2009 |
| 20090216520 | SYSTEM AND METHOD FOR INTERFACING A MEDIA PROCESSING APPARATUS WITH A COMPUTER A system comprising a media processing apparatus and a computer where the media processing apparatus emulates a mass storage device and interfaces with the computer is disclosed. In one embodiment the media processing apparatus appears to the computer as a Universal ser... | 08/27/2009 |
| 20090216521 | Emulation export sequence with distrubuted control Emulation information including emulation control information and emulation data is exported from a data processor by arranging the emulation information into information blocks, and outputting a sequence of the information blocks from the data processor. Some of the in... | 08/27/2009 |
| 20090172240 | METHODS AND APPARATUS FOR MEDIA REDIRECTION A method includes generating a storage device request directed to a register of a computing device that is used to access a storage device of the compute device. The method further includes determining with a media redirection device to redirect the storage device reque... | 07/02/2009 |
| 20090171652 | VIRTUALIZATION PROGRAM, SIMULATION APPARATUS AND VIRTUALIZATION METHOD A virtualization program for being able to execute a simulation at high speed, allows a native code simulator to have a stack specific to each task that is managed by a multitask OS. Processes of creation, save, restoration and erasure of a context that a target CPU exe... | 07/02/2009 |