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| Application No. | Application Title | Issue Date |
| 20110133347 | METHOD AND APPARATUS OF PROVIDING OVERLAY Provided is an apparatus that includes an overlay mark. The overlay mark includes a first portion that includes a plurality of first features. Each of the first features have a first dimension measured in a first direction and a second dimension measured in a second dir... | 06/09/2011 |
| 20100330798 | Formation of TSV Backside Interconnects by Modifying Carrier Wafers An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch ove... | 12/30/2010 |
| 20100193945 | REINFORCED STRUCTURE FOR A STACK OF LAYERS IN A SEMICONDUCTOR COMPONENT The present application relates to a reinforcing structure (1, 2) for reinforcing a stack of layers (100) in a semiconductor component, wherein at least one reinforcing element (110, 118) having at least one integrated anchor-like part (110 08/05/2010 | |
| 20100151697 | Magnetic processing of operating electronic materials The electronic properties (such as electron mobility, resistivity, etc.) of an electronic material in operation in an electronic device or electronic circuit can be modified/enhanced when subjected to dynamic or stationary magnetic fields with current flowing through th... | 06/17/2010 |
| 20100081295 | PROCESS MODEL EVALUATION METHOD, PROCESS MODEL GENERATION METHOD AND PROCESS MODEL EVALUATION PROGRAM According to an aspect of the present invention, there is provided a method for evaluating a process model, the method including: acquiring, for each of given patterns, a dimensional difference amount between: a first pattern that is formed by actually applying a proces... | 04/01/2010 |
| 20090149035 | METHOD FOR MANUFACTURING OF A CRYSTAL OSCILLATOR A method of manufacturing a crystal oscillator, in which method semiconductor components and the crystal or another resonator (1) are joined to a bottom base (4), most suitably to the printed circuit board material. The components (2, 3, 5) are join... | 06/11/2009 |
| 20090120492 | LOW-COST SOLAR CELLS AND METHODS FOR THEIR PRODUCTION Methods for fabricating solar cells without the need to perform gasification of metallurgical-grade silicon are disclosed. Consequently, the costs and health and environmental hazards involved in fabricating the solar or silicon grade silicon are being avoided. A solar ... | 05/14/2009 |
| 20090099681 | METHOD FOR CREATING WAFER BATCHES IN AN AUTOMATED BATCH PROCESS TOOL A method of batching substrates in an automated processing tool, the automated process tool and a system for batching substrates in the automated process tool. The method includes selecting a first container containing a first group of substrates; simultaneously transfe... | 04/16/2009 |
| 20090075491 | Method for curing a dielectric film A method of curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The method comprises exposing the low-k dielectric film to ultraviolet... | 03/19/2009 |
| 20090023303 | METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE A sealed type container accommodating a semiconductor substrate is positioned to a load port of a semiconductor manufacturing apparatus. The semiconductor substrate is taken out of the container. An ionizer is used for static-charge-eliminating the semiconductor substra... | 01/22/2009 |
| 20090023302 | PROTECTIVE INSERTS TO LINE HOLES IN PARTS FOR SEMICONDUCTOR PROCESS EQUIPMENT Inserts are used to line openings in parts that form a semiconductor processing reactor. In some embodiments, the reactor parts delimit a reaction chamber. The reactor parts may be formed of graphite. A layer of silicon carbide is deposited on surfaces of the openings i... | 01/22/2009 |
| 20080290530 | SEMICONDUCTOR DEVICE HAVING PHOTO ALIGNING KEY AND METHOD FOR MANUFACTURING THE SAME Embodiments consistent with the present invention provide a semiconductor device having a photo aligning key and a method for manufacturing the same. The semiconductor device includes a pattern photo aligning key formed on a scribe line of a semiconductor substrate, and... | 11/27/2008 |
| 20080220622 | Substrate processing pallet with cooling A substrate processing pallet can cool a substrate. A substrate processing pallet can include a base member; an interface pad attachable to the base member, the interface pad having substantially the same coefficient of thermal expansion as the base member and adapted t... | 09/11/2008 |
| 20080132089 | METHODS FOR DISCRETIZED PROCESSING AND PROCESS SEQUENCE INTEGRATION OF REGIONS OF A SUBSTRATE The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes used i... | 06/05/2008 |
| 20080105204 | Substrate processing apparatus and manufacturing method for semiconductor devices A substrate processing apparatus comprises a processing chamber for processing a substrate, a substrate supporting tool for supporting and carrying the substrate into the processing chamber, a standby chamber formed below the processing chamber for holding the substrate... | 05/08/2008 |
| 20080097641 | Interconnect structure of semiconductor integrated circuit, and design method and device therefor A method for designing an interconnect structure of an interconnect layer in a semiconductor integrated circuit device includes the steps of: (a) inputting layout data of the semiconductor integrated circuit device; (b) controlling an air gap exclusion area based interc... | 04/24/2008 |
| 20080023800 | Process for smoothening III-N substrates A process for preparing smoothened III-N, in particular smoothened III-N substrate or III-N template, wherein III denotes at least one element of group III of the Periodic System, selected from Al, Ga and In, utilizes a smoothening agent comprising cubic boron nitride a... | 01/31/2008 |
| 20080003839 | TRANSITION METAL OXIDE NANOWIRES Nanowires are disclosed which comprise transition metal oxides. The transition metal oxides may include oxides of group II, group III, group IV and lanthanide metals. Also disclosed are methods for making nanowires which comprise injecting decomposition agents into a so... | 01/03/2008 |
| 20070269994 | Methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and s... | 11/22/2007 |
| 20070210298 | Device and Method for Manipulating Direction of Motion of Current Carriers A device and method for manipulating a direction of motion of current carriers are presented. The device comprises a structure containing a two-dimensional gas of current carriers configured to define at least one region of inhomogeneity which is characterized by a subs... | 09/13/2007 |
| 20070210405 | Semiconductor integrated circuit device and power source wiring method therefor In a semiconductor integrated circuit device, from a first power source strap supplying a potential to a first standard cell receiving a supply of the potential, the potential is supplied via a first cell power source line having a constant width. The width of the first... | 09/13/2007 |
| 20070207629 | SURFACE PROTECTIVE FILM PEELING METHOD AND SURFACE PROTECTIVE FILM PEELING APPARATUS A surface protective film peeling method for peeling off a surface protective film (11) attached on the surface of a wafer (20) is disclosed. The wafer is supported on a movable table (31) with the surface protective film directed up, and an incisio... | 09/06/2007 |
| 20070207630 | Surface treatment method of compound semiconductor substrate, fabrication method of compound semiconductor, compound semiconductor substrate, and semiconductor wafer A surface treatment method of a compound semiconductor substrate, a fabrication method of a compound semiconductor, a compound semiconductor substrate, and a semiconductor wafer are provided, directed to reducing the impurity concentration at a layer formed on a substra... | 09/06/2007 |
| 20070197051 | High power liquid dielectric switch Method and apparatus for switching high power at high repetition rates. The apparatus is preferably a switch utilizing a pressurized flowing dielectric. The pressurized dielectric suppresses growth of dielectric breakdown byproducts, such as large bubbles and breakdown ... | 08/23/2007 |
| 20070197050 | Systems and methods for manipulating liquid films on semiconductor substrates A semiconductor substrate undergoing processing to fabricate integrated circuit devices thereon is spun about a rotational axis while introducing liquid onto a surface of the substrate. An annular-shaped sheet of liquid is formed on the surface, the sheet of liquid havi... | 08/23/2007 |
| 20070190811 | Method of forming patterns and/or pattern data for controlling pattern density of semiconductor devices and pattern density controlled semiconductor devices A method of forming a pattern for a semiconductor device includes forming first pattern data, forming second pattern data, forming third pattern data, forming pattern density measurement data including the first, second, and third pattern data, measuring a pattern densi... | 08/16/2007 |
| 20070186845 | Single crystal silicon wafer for insulated gate bipolar transistors and process for producing the same A single crystal silicon wafer for use in the production of insulated gate bipolar transistors is made of single crystal silicon grown by the Czochralski method and has a gate oxide with a film thickness of from 50 to 150 nm. The wafer has an interstitial oxygen concent... | 08/16/2007 |
| 20070184672 | FLUIDIC DEVICE CONTAINING 3D STRUCTURES A micro fluidic device comprises a laminate structure, comprising a plurality of individual layers. At least one layer comprises a micro fluidic channel structure and at least on one side of said layer a further layer is arranged comprising a three-dimensional (3D) micr... | 08/09/2007 |
| 20070173076 | Equipment for sensing malfunctioning roughing valves in an ion implantation apparatus A system for detecting a malfunction of a roughing valve in an ion implantation apparatus, including a valve driving controller, at least one roughing valve having an open-state and a closed-state, at least one solenoid driver electrically connected to the valve driving... | 07/26/2007 |
| 20070161261 | Methods for fabricating carbon nano-tube powders and field emission display devices Methods for fabricating carbon nano-tube (CNT) powders and field emission display devices. Carbon nano-tube powders are deposited and gathered in a vacuum chamber. A physical surface treatment is performed on the carbon nano-tube powders. The carbon nano-tube powders ar... | 07/12/2007 |
| 20070151620 | LID OPENING/CLOSING SYSTEM OF AN AIRTIGHT CONTAINER A curtain nozzle is located above an opening portion (10) in a FIMS. A gas curtain formed of inert gas for closing the opening portion is formed. A cover is so provided as to cover a part of the curtain nozzle so as to prevent peripheral gas around an opening of ... | 07/05/2007 |
| 20070152024 | System, apparatus, and method for advanced solder bumping According to some embodiments, a method, apparatus, and system are provided. In some embodiments, the method includes providing solder resist material on a surface of a substrate, applying mask material on top of the solder resist material, reflowing solder located in a... | 07/05/2007 |
| 20070151619 | LID OPENING/CLOSING SYSTEM OF AN AIRTIGHT CONTAINER A curtain nozzle is located above an opening portion (10) in a FIMS. A gas curtain formed of inert gas for closing the opening portion is formed, and at the same time, the inert gas is also supplied to an inside of a FOUP. Here, the direction of supply of the ine... | 07/05/2007 |
| 20070148991 | Method of fabricating nanodevices A method of batch fabrication using established photolithographic techniques allowing nanoparticles or nanodevices to be fabricated and mounted into a macroscopic device in a repeatable, reliable manner suitable for large-scale mass production. Nanoparticles can be grow... | 06/28/2007 |
| 20070134822 | Process system, process liquid supply method, and process liquid supply program A process system produces a process liquid of a predetermined concentration in a blending tank by blending solutions respectively supplied from a plurality of solution supply sources, supplies the process liquid to a supply tank to store therein the process liquid, and ... | 06/14/2007 |
| 20070128890 | STACKED ANNEALING SYSTEM A process chamber includes an opening, two or more stacked cold plates adjacent the opening, two or more stacked hot plates adjacent the cold plates, and a rotatable wafer transport capable of moving a wafer between the cold plates and between the hot plates for process... | 06/07/2007 |
| 20070123063 | Method of manufacturing a semiconductor integrated circuit device Decreasing foreign materials adhering to a semiconductor substrate to improve a yield and decreasing handling errors for the semiconductor substrate to improve an operating ratio of the semiconductor manufacturing apparatus. A sealed type container accommodating a semic... | 05/31/2007 |
| 20070099441 | Carbon nanotube with ZnO asperities A ZnO asperity-covered carbon nanotube (CNT) device has been provided, along with a corresponding fabrication method. The method comprises: forming a substrate; growing CNTs from the substrate; conformally coating the CNTs with ZnO; annealing the ZnO-coated CNTs; and, f... | 05/03/2007 |
| 20070100086 | Method of fabricating a three-dimensional nanostructure There is provided a rapid and reliable method of fabricating a three-dimensional organic/inorganic nanostructure of a well-arranged shape wherein tubes or fibers of several nanometer to several micrometer size have horizontal and vertical orientations. The method of the... | 05/03/2007 |
| 20070093079 | Imprinting method and imprinting apparatus An imprinting method of the present invention is to press a mold member (40) having thereon a mold pattern onto a film carried on a principal plane of a substrate (50) as an object to be processed, so as to transfer the mold pattern to the film. A pluralit... | 04/26/2007 |
