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| Application No. | Application Title | Issue Date |
| 20110300681 | RAISED SOURCE/DRAIN WITH SUPER STEEP RETROGRADE CHANNEL Systems and methods for raised source/drain with super steep retrograde channel are described. In accordance with a first embodiment, a semiconductor device comprises a substrate comprising a surface and a gate oxide disposed above the surface comprising a gate oxide th... | 12/08/2011 |
| 20110183481 | PLANAR FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD Disclosed is a transistor that incorporates epitaxially deposited source/drain semiconductor films and a method for forming the transistor. A crystallographic etch is used to form recesses between a channel region and trench isolation regions in a silicon substrate. Eac... | 07/28/2011 |
| 20110147845 | Remote Doped High Performance Transistor Having Improved Subthreshold Characteristics Devices comprising, and a method for fabricating, a remote doped high performance transistor having improved subthreshold characteristics are disclosed. In one embodiment a field-effect transistor includes a channel layer configured to convey between from a source porti... | 06/23/2011 |
| 20110147712 | QUANTUM WELL TRANSISTORS WITH REMOTE COUNTER DOPING A quantum well device and a method for manufacturing the same are disclosed. In an embodiment, a quantum well structure comprises a quantum well region overlying a substrate and a remote counter doping comprising dopants of conductivity opposite to the conductivity of t... | 06/23/2011 |
| 20100015818 | Method for Producing a Stop Zone in a Semiconductor Body and Semiconductor Component Having a Stop Zone A method for producing a buried stop zone in a semiconductor body and a semiconductor component having a stop zone, the method including providing a semiconductor body having a first and a second side and a basic doping of a first conduction type. The method further inc... | 01/21/2010 |
| 20090221119 | FABRICATION OF A SEMICONDUCTOR DEVICE WITH STRESSOR In a semiconductor fabrication process, an epitaxial layer is formed overlying a substrate, wherein there is a lattice mismatch between the epitaxial layer and the substrate. A hard mask having an opening is formed overlying the epitaxial layer. A recess is formed throu... | 09/03/2009 |
| 20090159987 | SEMICONDUCTOR DEVICE FOR REDUCING INTERFERENCE BETWEEN ADJOINING GATES AND METHOD FOR MANUFACTURING THE SAME A semiconductor device includes a semiconductor substrate having an active region having a plurality of recessed channel areas extending across the active region and a plurality of junction areas also extending across the active region. Gates are formed in and over the ... | 06/25/2009 |
| 20090127635 | Transistor including an active region and methods for fabricating the same A transistor including an active region and methods thereof. The active region may include corners with at least one of a rectangular, curved or rounded shape. The methods may include isotropically etching at least a portion of the active region such that the portion in... | 05/21/2009 |
| 20090047766 | METHOD FOR FABRICATING RECESS CHANNEL MOS TRANSISTOR DEVICE A method for fabricating recess channel MOS transistors of the present invention utilizes a lithography process to form trenches in the recess channel MOS transistors after finishing a STI process. Furthermore, the method of the present invention can make the critical d... | 02/19/2009 |
| 20090026554 | SOURCE/DRAIN STRESSORS FORMED USING IN-SITU EPITAXIAL GROWTH A method for forming a semiconductor device is provided. The method includes forming a semiconductor layer. The method further includes forming a gate structure overlying the semiconductor layer. The method further includes forming a high-k sidewall spacer adjacent to t... | 01/29/2009 |
| 20090020837 | Semiconductor device and manufacturing method thereof A long channel semiconductor device and a manufacturing method thereof are provided. The method for forming a long channel semiconductor device includes: providing a substrate; forming a trench in the substrate with a trench bottom defining a first channel length; formi... | 01/22/2009 |
| 20090020807 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Disclosed are a semiconductor device and a method for fabrication of the same. The fabrication method may include selectively forming an oxide layer pattern on a semiconductor substrate, forming an insulation layer pattern on the same substrate to cover edge portions of... | 01/22/2009 |
| 20080318384 | Method of forming quantum wire gate device The present invention relates to a method of forming a quantum wire gate device. The method includes patterning a first oxide upon a substrate. Preferably the first oxide pattern is precisely and uniformly spaced to maximize quantum wire numbers per unit area. The metho... | 12/25/2008 |
| 20080296622 | BURIED CHANNEL MOSFET USING III-V COMPOUND SEMICONDUCTORS AND HIGH k GATE DIELECTRICS A semiconductor-containing heterostructure including, from bottom to top, a III-V compound semiconductor buffer layer, a III-V compound semiconductor channel layer, a III-V compound semiconductor barrier layer, and an optional, yet preferred, III-V compound semiconducto... | 12/04/2008 |
| 20080277743 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME A semiconductor device includes a substrate having a recess in an area where a gate is to be formed, spacers formed over sidewalls of the recess, and a first gate electrode filling in the recess. The spacers include material having the first work function or insulation ... | 11/13/2008 |
| 20080246087 | MOS TRANSISTOR FOR REDUCING SHORT-CHANNEL EFFECTS AND ITS PRODUCTION The invention is related to a MOS transistor and its fabrication method to reduce short-channel effects. Existing process has the problem of high complexity and high cost to reduce short-channel effects by using epitaxial technique to produce an elevated source and drai... | 10/09/2008 |
| 20080203483 | SEMICONDUCTOR DEVICE INCLUDING A RECESSED-CHANNEL-ARRAY MISFET A semiconductor device includes RCA MISFETs formed in active regions of a semiconductor substrate, the active regions being defined by shallow-trench-isolation (STI) structure. The top surface of the insulating film is flush with the top surface of the active regions. T... | 08/28/2008 |
| 20080164522 | Semiconductor device and manufacturing method thereof To provide a semiconductor device that has a three dimensional gate dielectric film, is easily manufactured, and a gate structure thereof can be easily miniaturize. A semiconductor device comprises: a three-dimensional gate dielectric film formed on a semiconductor subs... | 07/10/2008 |
| 20080157232 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME, AND NAND GATE CIRCUIT USING THE SEMICONDUCTOR DEVICE A method of forming a semiconductor device that can include forming a channel region in a semiconductor substrate; forming a first gate electrode and a second gate electrodes over the semiconductor substrate, the first gate electrode and the second gate electrode being ... | 07/03/2008 |
| 20080157132 | METHOD FOR FORMING THE GATE OF A TRANSISTOR A method of forming a gate of a transistor can include forming a nitride film over a semiconductor substrate; forming a photoresist pattern defining a gate channel region of a transistor over the nitride film; forming a nitride pattern by etching the nitride film using ... | 07/03/2008 |
| 20080105897 | STRUCTURE AND METHOD OF FABRICATING FINFET WITH BURIED CHANNEL A method of manufacturing a fin structure comprises forming a first structure of a first material type on a wafer and forming a buried channel of a second material adjacent sidewalls of the first structure. The second material type is different than the first material t... | 05/08/2008 |
| 20080035962 | Semiconductor Device And Method of Manufacturing the Same A semiconductor device includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a recess channel that is formed on the inner surface of a recess region, which is formed on the semiconductor substrate between the source and drai... | 02/14/2008 |
| 20080001222 | Semiconductor Device Of High Breakdown Voltage And Manufacturing Method Thereof Disclosed are a high breakdown voltage semiconductor device and a method of manufacturing the same. According to the invention, an insulation spacer capable of substitute-performing functions of an inter-insulation film, a contact hole and a mask, etc. by a self-alignme... | 01/03/2008 |
| 20080001173 | BURIED CHANNEL MOSFET USING III-V COMPOUND SEMICONDUCTORS AND HIGH k GATE DIELECTRICS A semiconductor-containing heterostructure including, from bottom to top, a III-V compound semiconductor buffer layer, a III-V compound semiconductor channel layer, a III-V compound semiconductor barrier layer, and an optional, yet preferred, III-V compound semiconducto... | 01/03/2008 |
| 20070241414 | Semiconductor Device and Manufacturing Process Therefor This invention relates to a semiconductor device having a beam made of a semiconductor to which strain is introduced by deflection, and a current is permitted to flow in the beam. ... | 10/18/2007 |
| 20070238252 | Cosmic particle ignition of artificially ionized plasma patterns in the atmosphere This invention is a method and apparatus for creating artificially ionized regions in the atmosphere utilizing ionization trails of cosmic rays and micro-meteors to ignite plasma patterns in electric field patterns formed by ground based electromagnetic wave radiators. ... | 10/11/2007 |
| 20070218638 | Recessed gate structure and method for preparing the same A recessed gate structure comprises a semiconductor substrate, a recess positioned in the semiconductor substrate, a gate oxide layer positioned in the recess and a conductive layer positioned on the gate oxide layer, wherein the semiconductor substrate has a multi-step... | 09/20/2007 |
| 20070141789 | Semiconductor device having a surface conducting channel and method of forming A semiconductor device including a metal oxide layer, a channel area of the metal oxide layer, a preservation layer formed on the channel area of the metal oxide layer, and at least two channel contacts coupled to the channel area of the metal oxide layer, and a method ... | 06/21/2007 |
| 20070059889 | RECESSED GATE ELECTRODE AND METHOD OF FORMING THE SAME AND SEMICONDUCTOR DEVICE HAVING THE RECESSED GATE ELECTRODE AND METHOD OF MANUFACTURING THE SAME A recessed gate electrode structure includes a first recess and a second recess in communication with the first recess both formed in a substrate. The second recess is larger than the first recess. A gate dielectric layer is formed on a top surface of the substrate and ... | 03/15/2007 |
| 20070048945 | Memory device and method of making same A radial memory device includes a phase-change material, a first electrode in electrical communication with the phase-change material, the first electrode having a substantially planar first area of electrical communication with the phase-change material. The radial mem... | 03/01/2007 |
| 20070037352 | Display device and manufacturing method of display device According to one feature of the present invention, a display device is manufactured according to the steps of forming a semiconductor layer; forming a gate insulating layer over the semiconductor layer; forming a gate electrode layer over the gate insulating layer; form... | 02/15/2007 |
| 20060286753 | Method for Producing a Stop Zone in a Semiconductor Body and Semiconductor Component Having a Stop Zone A method for producing a buried stop zone in a semiconductor body and a semiconductor component having a stop zone, has the method steps of: providing a semiconductor body having a first and a second side and a basic doping of a first conduction type, irradiating the se... | 12/21/2006 |
| 20060286786 | METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL A semiconductor device having a transistor channel with an enhanced stress is provided. To achieve the enhanced stress transistor channel, a nitride film is preferentially formed on the device substrate with little to no nitride on a portion of the gate stack. The nitri... | 12/21/2006 |
| 20060220114 | Semiconductor device and manufacturing method thereof An ideal step-profile in a channel region is realized easily and reliably, whereby suppression of the short-channel effect and prevention of mobility degradation are achieved together. A silicon substrate is amorphized to a predetermined depth from a semiconductor film,... | 10/05/2006 |
| 20060216897 | Semiconductor device having a round-shaped nano-wire transistor channel and method of manufacturing same A field-effect transistor (FET) with a round-shaped nano-wire channel and a method of manufacturing the FET are provided. According to the method, source and drain regions are formed on a semiconductor substrate. A plurality of preliminary channel regions is coupled bet... | 09/28/2006 |
| 20060183288 | Processes for forming electronic devices including a semiconductor layer An impurity can be introduced into a semiconductor layer of a workpiece to affect the oxidation and the relative concentration of one element with respect to another element within the semiconductor layer. The impurity can be selectively implanted using one or more mask... | 08/17/2006 |
| 20060081928 | Isolation spacer for thin SOI devices A semiconductor device comprises a semiconductor mesa overlying a dielectric layer, a gate stack formed overlying the semiconductor mesa, and an isolation spacer formed surrounding the semiconductor mesa and filling any undercut region at edges of the semiconductor mesa... | 04/20/2006 |
| 20060051922 | Strained silicon device manufacturing method A method of manufacturing a microelectronic device includes forming a p-channel transistor on a silicon substrate by forming a poly gate structure over the substrate and forming a lightly doped source/drain region in the substrate. An oxide liner and nitride spacer are ... | 03/09/2006 |
| 20060046400 | Method of forming a semiconductor structure comprising transistor elements with differently stressed channel regions A semiconductor structure comprising a first transistor element and a second transistor element is provided. Stress in channel regions of the first and the second transistor element is controlled by forming stressed layers having a predetermined stress over the transist... | 03/02/2006 |
| 20060046399 | Forming abrupt source drain metal gate transistors A gate structure may be utilized as a mask to form source and drain regions. Then the gate structure may be removed to form a gap and spacers may be formed in the gap to define a trench. In the process of forming a trench into the substrate, a portion of the source drai... | 03/02/2006 |
