Did You Know...
...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Application No. | Application Title | Issue Date |
| 20120129278 | DRY ETCHING METHOD A dry etching method includes a first step and a second step. The first step includes generating a first plasma from a gas mixture, which includes an oxidation gas and a fluorine containing gas, and performing anisotropic etching with the first plasma on a silicon layer... | 05/24/2012 |
| 20120107968 | GROUP-III NITRIDE SEMICONDUCTOR LASER DEVICE, METHOD OF FABRICATING GROUP-III NITRIDE SEMICONDUCTOR LASER DEVICE, AND METHOD OF ESTIMATING DAMAGE FROM FORMATION OF SCRIBE GROOVE A method of fabricating group-III nitride semiconductor laser device includes: preparing a substrate comprising a hexagonal group-III nitride semiconductor and having a semipolar principal surface; forming a substrate product having a laser structure, an anode electrode... | 05/03/2012 |
| 20120070915 | METHOD FOR COPPER HILLOCK REDUCTION A method of forming interconnects in integrated circuits includes providing a semiconductor substrate and forming a copper interconnect structure that is formed overlying a barrier layer within a thickness of an interlayer dielectric layer. The copper interconnect struc... | 03/22/2012 |
| 20120068176 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, an edge seal, a plurality of pad pieces, and an insulating film pattern. The semiconductor substrate includes a chip area formed at an inward side of the semicondu... | 03/22/2012 |
| 20120052602 | METHOD FOR DESIGNING SEMICONDUCTOR DEVICE A semiconductor device may be designed in the following manner. A stacked layer of a silicon oxide film and an organic film is provided over a substrate, deuterated water is contained in the organic film, and then a conductive film is formed in contact with the organic ... | 03/01/2012 |
| 20120052601 | Method and System for Extracting Samples After Patterning of Microstructure Devices Analysis of chemical and physical characteristics of polymer species and etch residues caused in critical plasma-assisted etch processes for patterning material layers in semiconductor devices may be accomplished by removing at least a portion of these species on the ba... | 03/01/2012 |
| 20120049329 | METHOD OF ANALYZING IRON CONCENTRATION OF BORON-DOPED P-TYPE SILICON WAFER AND METHOD OF MANUFACTURING SILICON WAFER An aspect of the present invention relates to a method of analyzing an iron concentration of a boron-doped p-type silicon wafer by a SPV method, which comprises subjecting the wafer to Fe—B pair separation processing by irradiation with light and determining the iron ... | 03/01/2012 |
| 20120045852 | AUTOTUNED SCREEN PRINTING PROCESS Embodiments of the invention generally provide apparatus and methods of screen printing a pattern on a substrate. In one embodiment, a patterned layer is printed onto a surface of a substrate along with a plurality of alignment marks. The locations of the alignment mark... | 02/23/2012 |
| 20120038019 | MEMS Device and Fabrication Method A method and structure for uncovering captive devices in a bonded wafer assembly comprising a top wafer and a bottom wafer. One embodiment method includes forming a plurality of cuts in the top wafer and removing a segment of the top wafer defined by the plurality of cu... | 02/16/2012 |
| 20120028379 | METHODS AND APPARATUSES FOR CONTROLLING GAS FLOW CONDUCTANCE IN A CAPACITIVELY-COUPLED PLASMA PROCESSING CHAMBER Apparatuses are provided for controlling flow conductance of plasma formed in a plasma processing apparatus that includes an upper electrode opposite a lower electrode to form a gap therebetween. The lower electrode is adapted to support a substrate and coupled to a RF ... | 02/02/2012 |
| 20120025276 | TEMPERATURE MONITORING IN A SEMICONDUCTOR DEVICE BY USING A PN JUNCTION BASED ON SILICON/GERMANIUM MATERIALS By incorporating germanium material into thermal sensing diode structures, the sensitivity thereof may be significantly increased. In some illustrative embodiments, the process for incorporating the germanium material may be performed with high compatibility with a proc... | 02/02/2012 |
| 20120028378 | METHOD FOR FORMING PATTERN AND A SEMICONDUCTOR DEVICE According to one embodiment, a pattern forming method comprises transferring a pattern formed in a surface of a template to a plurality of chip areas in a semiconductor substrate under different transfer conditions. Furthermore, the transferring the pattern formed in th... | 02/02/2012 |
| 20120025271 | SEMICONDUCTOR WAFER, METHOD OF PRODUCING SEMICONDUCTOR WAFER, METHOD OF JUDGING QUALITY OF SEMICONDUCTOR WAFER, AND ELECTRONIC DEVICE There is provided a high-performance compound semiconductor epitaxial wafer that has an improved linearity of the voltage-current characteristic, a producing method thereof, and a judging method thereof. Provided is a semiconductor wafer including a compound semiconduct... | 02/02/2012 |
| 20120018703 | OPTOELECTRONIC SEMICONDUCTOR COMPONENT AND METHOD FOR THE MANUFACTURE THEREOF Manufacturing semiconductor heterostructures by way of molecular beam epitaxy, including placing a substrate into a first vacuum chamber, heating the substrate to a first temperature, depositing from at least one molecular beam a first epitaxial layer of a first materia... | 01/26/2012 |
| 20120021540 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE A semiconductor device includes a plurality of semiconductor integrated circuits bonded to a structure body in which a fibrous body is impregnated with an organic resin. The plurality of semiconductor integrated circuits are provided at openings formed in the structure ... | 01/26/2012 |
| 20120021537 | METHODS OF EVALUATING EPITAXIAL GROWTH AND METHODS OF FORMING AN EPITAXIAL LAYER A method of evaluating an epitaxial growing process includes forming a mold layer on each of a plurality of substrates, forming a photoresist pattern on each mold layer, the photoresist pattern having opening portions, a total area of a bottom portion of the opening por... | 01/26/2012 |
| 20120012983 | SILICON WAFER AND METHOD OF MANUFACTURING SAME This method of manufacturing a silicon wafer has a step of preparing a wafer, in which a surface of the silicon wafer is surface-treated, a step of setting stress, in which the stress S (MPa) subjected on the wafer is set, a step of inspecting, in which a defect on a su... | 01/19/2012 |
| 20120012857 | WIDE-GAP SEMICONDUCTOR SUBSTRATE AND METHOD TO FABRICATE WIDE-GAP SEMICONDUCTOR DEVICE USING THE SAME A wide-gap semiconductor substrate includes a narrow-gap semiconductor layer, a wide-gap semiconductor layer and an alignment mark. The narrow-gap semiconductor layer has a main surface. The wide-gap semiconductor layer is epitaxially grown on the narrow-gap semiconduct... | 01/19/2012 |
| 20120009692 | System and Method of Dosage Profile Control A system and method for controlling a dosage profile is disclosed. An embodiment comprises separating a wafer into components of a grid array and assigning each of the grid components a desired dosage profile based upon a test to compensate for topology differences betw... | 01/12/2012 |
| 20110315527 | PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES Planar cavity Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structure are provided. The method includes forming at least one Micro-Electro-Mechanical System (MEMS) cavity having a planar surface using a reverse damascene process.... | 12/29/2011 |
| 20110312107 | METHOD AND DEVICE FOR MEASURING TEMPERATURE DURING DEPOSITION OF SEMICONDUCTOR Provided is a method and a device for measuring a temperature which can recognize the temperature of a semiconductor layer directly with high precision when the semiconductor layer is formed by deposition. The quantity of laser light transmitted a semiconductor layer is... | 12/22/2011 |
| 20110300647 | METHOD FOR MANUFACTURING SEMICONDUCTOR CHIPS FROM A SEMICONDUCTOR WAFER A method for manufacturing semiconductor chips from a semiconductor wafer, including the steps of: fastening, on a first support frame, a second support frame having outer dimensions smaller than the outer dimensions of the first frame and greater than the inner dimensi... | 12/08/2011 |
| 20110300646 | PATTERN FORMING METHOD, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND TEMPLATE MANUFACTURING METHOD In the pattern forming method according to the embodiment, second templates are manufactured by an imprint technology using first templates manufactured by applying a predetermined misalignment distribution for each shot on a first substrate by an exposure apparatus. Th... | 12/08/2011 |
| 20110292628 | ANTI-ULTRAVIOLET MEMORY DEVICE AND FABRICATION METHOD THEREOF The invention provides an anti-UV electronic device and fabrication method thereof. The anti-ultraviolet (anti-UV) electronic device includes an integrated circuit die, wherein the integrated circuit die has an ultraviolet (UV) light erasable memory; and an anti-UV ligh... | 12/01/2011 |
| 20110294234 | THIN FILM SOLAR FABRICATION PROCESS, ETCHING METHOD, DEVICE FOR ETCHING, AND THIN FILM SOLAR DEVICE Methods and devices for etching a device precursor are provided. For example, a method includes: providing a substrate, determining a temperature associated with the substrate, and etching a metal oxide layer of the substrate, wherein the etching is controlled based on ... | 12/01/2011 |
| 20110294235 | METHOD OF FORMING A SEMICONDUCTOR DEVICE A method of forming a semiconductor device includes the following processes. A groove is formed in a semiconductor substrate. A first film is formed in a device-formation region and a non-device-formation region of a semiconductor substrate. The first film is patterned ... | 12/01/2011 |
| 20110294236 | Semiconductor device and method of manufacturing it A method of manufacturing a semiconductor device capable of largely increasing the yield and a semiconductor device manufactured by using the method is provided. After a semiconductor layer is formed on a substrate, as one group, a plurality of functional portions with ... | 12/01/2011 |
| 20110281378 | ULTRASONIC SYSTEM FOR MEASURING GAS VELOCITY A system and method for measuring the velocity of gas flow between multiple plasma deposition chambers is provided. A passage atmospherically linking two plasma processing chambers conducts a gas flow therebetween due to differential pressures within the respective cham... | 11/17/2011 |
| 20110275169 | SEMICONDUCTOR NANOCRYSTAL PROBES FOR BIOLOGICAL APPLICATIONS AND PROCESS FOR MAKING AND USING SUCH PROBES A semiconductor nanocrystal compound and probe are described. The compound is capable of linking to one or more affinity molecules. The compound comprises (1) one or more semiconductor nanocrystals capable of, in response to exposure to a first energy, providing a secon... | 11/10/2011 |
| 20110275170 | SYSTEM FOR CONCURRENT TEST OF SEMICONDUCTOR DEVICES A tool to aid a test engineer in creating a concurrent test plan. The tool may quickly map test system resources to specific pins to satisfy the requirements of a concurrent test. The tool may project test time when such a mapping is possible. When a mapping is not poss... | 11/10/2011 |
| 20110263052 | METHOD OF REMOVING CONTAMINATIONS A method of removing contaminations includes providing a wafer, performing an inspection or a measuring step to the wafer, and performing a baking step to re-vaporize and remove contaminations from the wafer after the inspection or measuring step.... | 10/27/2011 |
| 20110256645 | MULTIPLE PRECURSOR SHOWERHEAD WITH BY-PASS PORTS A method and apparatus that may be utilized for chemical vapor deposition and/or hydride vapor phase epitaxial (HVPE) deposition are provided. In one embodiment, the apparatus a processing chamber that includes a showerhead with separate inlets and channels for deliveri... | 10/20/2011 |
| 20110254107 | METHOD AND APPARATUS FOR FORMING MEMS DEVICE The disclosure is generally directed to fabrication steps, and operation principles for microelectromechanical (MEMS) transducers. In one embodiment, the disclosure relates to a texture morphing device. The texture morphing device includes: a plurality of supports arran... | 10/20/2011 |
| 20110250708 | METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DIODE ARRAYS AND SYSTEM FOR ELIMINATING DEFECTS IN ORGANIC LIGHT EMITTING DIODE ARRAYS A method for manufacturing an organic light emitting diode (OLED) array is provided that includes applying an energizing signal to at least one of the OLED pixels in the array. The energizing signal exceeds a threshold level. The method also includes reducing the energi... | 10/13/2011 |
| 20110241090 | HIGH FULL-WELL CAPACITY PIXEL WITH GRADED PHOTODETECTOR IMPLANT Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twi... | 10/06/2011 |
| 20110240339 | CONDUCTIVE CHANNEL OF PHOTOVOLTAIC PANEL AND METHOD FOR MANUFACTURING THE SAME An electrically conductive ribbon, which is soldered on an electrically conductive busbar of a photovoltaic panel, includes a cooper core and a tin based solder. The tin based solder fully wraps an outer surface of the cooper core, and has a convex solder surface, which... | 10/06/2011 |
| 20110233719 | TEST METHOD ON THE SUPPORT SUBSTRATE OF A SUBSTRATE OF THE "SEMICONDUCTOR ON INSULATOR" TYPE The invention relates to a test method comprising an electrical connection contact on the support of a substrate of the semiconductor-on-insulator type. This method is remarkable in that it comprises the steps of: 09/29/2011 | |
| 20110229987 | METHOD FOR LOW TEMPERATURE ION IMPLANTATION Techniques for low temperature ion implantation are provided to improve throughput. Specifically, the pressure of the backside gas may temporarily, continually or continuously increase before the starting of the implant process, such that the wafer may be quickly cooled... | 09/22/2011 |
| 20110229989 | LARGE SCALE METHOD AND FURNACE SYSTEM FOR SELENIZATION OF THIN FILM PHOTOVOLTAIC MATERIALS A method for fabricating a copper indium diselenide semiconductor film is provided using substrates having a copper and indium composite structure. The substrates are placed vertically in a furnace and a gas including a selenide species and a carrier gas are introduced.... | 09/22/2011 |
| 20110223694 | METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE A wafer WF is mounted in a substrate holder, and the substrate holder is placed in a film forming furnace. The film forming furnace is evacuated by a vacuum pump through a gas discharge part to remove remaining oxygen as completely as possible. Then, a temperature in th... | 09/15/2011 |
