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| Application No. | Application Title | Issue Date |
| 20120126395 | Semiconductor Device and Method of Forming Uniform Height Insulating Layer Over Interposer Frame as Standoff for Semiconductor Die A semiconductor device has an interposer frame having a die attach area. A uniform height insulating layer is formed over the interposer frame at corners of the die attach area. The insulating layer can be formed as rectangular or circular pillars at the corners of the ... | 05/24/2012 |
| 20120127689 | INTEGRATED PACKAGE CIRCUIT WITH STIFFENER The present disclosure relates to an improved integrated circuit package and method with a encapsulant retention structure located adjacent to a packaged integrated chip on a substrate. The structure allows for the placement and retention of a larger quantity of encapsu... | 05/24/2012 |
| 20120038047 | Semiconductor Device and Method of Forming B-Stage Conductive Polymer Over Contact Pads of Semiconductor Die in FO-WLCSP A semiconductor wafer contains a plurality of semiconductor die with bumps formed over contact pads on an active surface of the semiconductor die. A b-stage conductive polymer is deposited over the contact pads on the semiconductor wafer. The semiconductor wafer is sing... | 02/16/2012 |
| 20120032337 | Flip Chip Substrate Package Assembly and Process for Making Same Apparatus and methods for providing a package substrate and assembly for a flip chip integrated circuit. A substrate is provided having a solder mask layer, openings in the solder mask layer for conductive bump pads, and openings in the solder mask layer between the con... | 02/09/2012 |
| 20120025368 | Semiconductor Device Cover Mark A system and method for determining underfill expansion is provided. An embodiment comprises forming cover marks along a top surface of a substrate, attaching a semiconductor substrate to the top surface of the substrate, placing an underfill material between the semico... | 02/02/2012 |
| 20120025362 | Reinforced Wafer-Level Molding to Reduce Warpage A method for forming an electrical package to reduce warpage. The method includes providing a wafer and coupling a die thereto. A mold compound material is applied to the wafer such that the mold compound material surrounds the die. The method further includes applying ... | 02/02/2012 |
| 20120021567 | NOVEL REWORKABLE UNDERFILLS FOR CERAMIC MCM C4 PROTECTION The present invention provides chip containing electronic devices such as Multichip Ceramic Modules (MCM's) containing a plurality of chips on a substrate which chips are underfilled with a reworkable composition which allows one or more chips to be removed from the dev... | 01/26/2012 |
| 20110315984 | SEMICONDUCTOR MEMORY CARD AND METHOD OF MANUFACTURING THE SAME According to one embodiment, a semiconductor memory card that includes a printed substrate in which an electronic component is mounted on one surface, and an external terminal is installed on the other surface, and that is molded in a card form. The printed substrate is... | 12/29/2011 |
| 20110318887 | METHOD OF MOLDING SEMICONDUCTOR PACKAGE A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. I... | 12/29/2011 |
| 20110315779 | SUBSCRIBER IDENTITY MODULE (SIM) CARD A SIM card is presented. The SIM card includes a support carrier having a first and a second major surface. The support carrier includes a cavity which extends partially into the carrier from the first major surface. The SIM card further includes a chip package disposed... | 12/29/2011 |
| 20110316171 | Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the c... | 12/29/2011 |
| 20110309514 | PACKAGED SEMICONDUCTOR DEVICE HAVING IMPROVED LOCKING PROPERTIES The invention relates to a method of manufacturing a semiconductor device (1), the method comprising: i) providing a substrate (10); ii) providing a photoresist layer (15) on the substrate (10), the photoresist layer (15) comprising an... | 12/22/2011 |
| 20110304058 | Semiconductor Device and Method of Forming Flipchip Interconnection Structure with Bump on Partial Pad A semiconductor device has a semiconductor die having a plurality of bumps formed over a surface of the semiconductor die. The bumps can include a fusible portion and non-fusible portion. Conductive traces are formed over the substrate with interconnect sites having an ... | 12/15/2011 |
| 20110300673 | POST-DISPENSE VACUUM OVEN FOR REDUCING UNDERFILL VOIDS DURING IC ASSEMBLY An IC assembly method for reducing voids in underfill material. An IC die is bonded to a substrate which creates a gap between the IC die and the substrate. An underfill material that has a curing temperature (Tuc) is dispensed around at least one side along a perimeter... | 12/08/2011 |
| 20110298105 | Semiconductor Device and Method of Forming Shielding Layer After Encapsulation and Grounded Through Interconnect Structure A method of manufacturing a semiconductor device includes providing a substrate having a conductive bump formed over the substrate and a semiconductor die with an active surface oriented to the substrate. An encapsulant is deposited over the semiconductor die and the co... | 12/08/2011 |
| 20110287589 | METHOD FOR MANUFACTURING ANTENNA AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE The present invention provides an antenna with low resistance and a semiconductor device having an antenna whose communication distance is improved. A fluid containing conductive particles is applied over an object. After curing the fluid containing the conductive parti... | 11/24/2011 |
| 20110269272 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR A microelectronic package includes a microelectronic element having faces and contacts, the microelectronic element having an outer perimeter, and a substrate overlying and spaced from a first face of the microelectronic element, whereby an outer region of the substrate... | 11/03/2011 |
| 20110267789 | ETCH-BACK TYPE SEMICONDUCTOR PACKAGE, SUBSTRATE AND MANUFACTURING METHOD THEREOF A semiconductor package, a substrate and a manufacturing method thereof are provided. The substrate comprises a conductive carrier, a first metal layer and a second metal layer. The first metal layer is formed on the conductive carrier and comprises an lead pad having a... | 11/03/2011 |
| 20110266666 | CIRCUIT BOARD WITH BUILT-IN SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SAME A circuit board includes an insulating member and a semiconductor chip encapsulated with the thermoplastic resin portion of the insulating member. A wiring member is located in the insulating member and electrically connected to first and second electrodes on respective... | 11/03/2011 |
| 20110269273 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which... | 11/03/2011 |
| 20110254156 | Semiconductor Device and Method of Wafer Level Package Integration A method of making a wafer level chip scale package includes providing a temporary substrate, and forming a wafer level interconnect structure over the temporary substrate using wafer level processes. The wafer level processes include forming a first insulating layer in... | 10/20/2011 |
| 20110227214 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME A wiring board has a structure where multiple wiring layers are stacked one on top of another with insulating layers interposed therebetween. A sheet-shaped member is buried in an outermost insulating layer located on a side of the structure opposite to a side on which ... | 09/22/2011 |
| 20110215450 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF A method of manufacture of an integrated circuit packaging system includes: forming a carrier having a cavity and a carrier top side adjacent to the cavity; mounting an integrated circuit in the cavity; forming an encapsulation surrounding the integrated circuit; and at... | 09/08/2011 |
| 20110207266 | PRINTED CIRCUIT BOARD (PCB) INCLUDING A WIRE PATTERN, SEMICONDUCTOR PACKAGE INCLUDING THE PCB, ELECTRICAL AND ELECTRONIC APPARATUS INCLUDING THE SEMICONDUCTOR PACKAGE, METHOD OF FABRICATING THE PCB, AND METHOD OF FABRICATING THE SEMICONDUCTOR PACKAGE A printed circuit board (PCB) includes a wire pattern that has a low processing cost and a high yield by simplifying the structure of the PCB and can increase the joining characteristics and reliability of minute bumps when a flip-chip bonding process is performed. The ... | 08/25/2011 |
| 20110198760 | Semiconductor device, semiconductor package, interposer, semiconductor device manufacturing method and interposer manufacturing method A technique which prevents cracking in a solder resist layer covering an interposer surface between external coupling terminals of an interconnection substrate, thereby reducing the possibility of interconnect wire disconnection resulting from such cracking. A semicondu... | 08/18/2011 |
| 20110193203 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME In regard to a semiconductor device having a multilayered wiring board where a semiconductor chip is embedded inside, a technology which allows the multilayered wiring board to be made thinner is provided. A feature of the present invention is that, in a semiconductor d... | 08/11/2011 |
| 20110186994 | INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING DUAL SIDED CONNECTION AND METHOD OF MANUFACTURE THEREOF A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect ... | 08/04/2011 |
| 20110180923 | RELIABILITY ENHANCEMENT OF METAL THERMAL INTERFACE A frontside of a chip is bonded to a top surface of a chip carrier. Seal material is dispensed at a periphery of the top surface of the chip carrier. A solder TIM having a first side and a second side is provided. The first side of the TIM contacts a backside of the chi... | 07/28/2011 |
| 20110180926 | Microelectromechanical Systems Embedded in a Substrate An integrated circuit package includes a microelectromechanical systems (MEMS) device embedded in a packaging substrate. The MEMS device is located on a die embedded in the packaging substrate and covered by a hermetic seal. Low-stress material in the packaging substrat... | 07/28/2011 |
| 20110165733 | MICROELECTRONIC PACKAGES AND METHODS THEREFOR A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of a substrate having a microelectronic element mounted thereon, so that remote surfaces of the conductive elemen... | 07/07/2011 |
| 20110165732 | Semiconductor Package Having Buss-Less Substrate A ball grid array device with an insulating substrate (110) having metal traces (106, for example copper, about 18 μm thick) with sidewalls (108) at right angles to the trace top. The traces are grouped in a first (120) and a second set (... | 07/07/2011 |
| 20110163412 | ISOLATOR AND METHOD OF MANUFACTURING THE SAME The present invention relates to an isolator and a method of manufacturing the same. An isolator according to the present invention includes a silicon wafer, protective devices formed in predetermined regions of the silicon wafer, and a transformer formed in a predeterm... | 07/07/2011 |
| 20110156234 | SELF REPAIRING IC PACKAGE DESIGN An integrated circuit package comprises a molding compound covering a semiconductor die. A healing substance is on the surface of the semiconductor die at an interface of the molding compound and the semiconductor die. The healing compound comprises a catalyst and a plu... | 06/30/2011 |
| 20110156225 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME A semiconductor device achieving both electromagnetic wave shielding property and reliability in a heating process upon mounting electronic components. In the semiconductor device, mount devices 5 and 6 mounted on a main surface of a circuit board 1... | 06/30/2011 |
| 20110156275 | INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING PLANAR INTERCONNECT AND METHOD FOR MANUFACTURE THEREOF A method for manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a planar interconnect, over a carrier with the planar interconnect at a non-active side of the integrated circuit and an active side of the integrated cir... | 06/30/2011 |
| 20110140267 | ELECTRONIC DEVICE PACKAGE AND METHOD FOR FABRICATING THE SAME The invention provides an electronic device package and a method for fabricating the same. The electronic device package includes a carrier wafer. An electronic device chip with a plurality of conductive pads thereon is disposed over the carrier wafer. An isolation lami... | 06/16/2011 |
| 20110129966 | SEMICONDUCTOR DEVICE HAS ENCAPSULANT WITH CHAMFER SUCH THAT PORTION OF SUBSTRATE AND CHAMFER ARE EXPOSED FROM ENCAPSULANT AND REMAINING PORTION OF SURFACE OF SUBSTRATE IS COVERED BY ENCAPSULANT A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is forme... | 06/02/2011 |
| 20110057329 | ELECTRONIC DEVICE AND MANUFACTURING METHOD OF ELECTRONIC DEVICE It is desired to provide an electronic device which can be easily taken out of a mold after resin sealing processing. The electronic device includes: an insulating layer; a wiring layer formed on a surface of the insulating layer; a first solder resist formed to cover t... | 03/10/2011 |
| 20110057330 | ELECTRONIC DEVICE AND METHOD OF MANUFACTURING ELECTRONIC DEVICE It is desired to provide an electronic device which can be easily taken out of a mold after a resin sealing processing. The electronic device include: an insulating layer; a wiring formed on the insulating layer; and a solder resist layer formed to cover the insulation ... | 03/10/2011 |
| 20110053320 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE According to one embodiment, a method of fabricating a semiconductor device is disclosed. The method can include forming a debonding layer constituted with a thermoplastic resin on a supporting material, and forming an insulating layer constituted with a thermosetting r... | 03/03/2011 |
