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Patent No. 5571247

Self Containing Enclosure for Protection from Killer Bees

A self contained protective enclosure with an opening for entry and egress and a screen for ventilation and viewing.

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Class 438/12 - And removal of defect


Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process wherein a defect detected by the electrical sensing
No. of applications: 16
Last issue date: 02/10/2011


Application No.Application TitleIssue Date
20110030758PHOTOVOLTAIC DEVICE AND MANUFACTURING METHOD THEREOF
To manufacture a photovoltaic device through a first step of sequentially stacking a transparent electrode, a photovoltaic layer, and a rear surface electrode to thereby form a structure in which photovoltaic cells are serially connected, a second step of measuring char...
02/10/2011
20110005571METHOD AND APPARATUS FOR MANUFACTURING SOLAR CELL, AND SOLAR CELL
A method for manufacturing a solar cell, includes: forming a photoelectric converter which includes a plurality of compartment elements, and in which the compartment elements adjacent to each other are electrically connected; specifying a first compartment element havin...
01/13/2011
20100283126SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor substrate that is made of either of silicon carbide (SiC) and gallium nitride (GaN), and has a defect region containing a crystal defect; a first insulating film that coats the defect region and is arranged on the semicond...
11/11/2010
20080311684Programmable Chip Enable and Chip Address in Semiconductor Memory
Memory die are provided with programmable chip enable circuitry to allow particular memory die to be disabled after packaging and/or programmable chip address circuitry to allow particular memory die to be readdressed after being packaged. In a multi-chip memory package...
12/18/2008
20080283878Method and Apparatus for Monitoring Endcap Pullback
Various apparatus and methods of monitoring endcap pullback are disclosed. In one aspect, an apparatus is provided that includes a substrate that has a plurality of semiconductor regions. Each of the plurality of semiconductor regions has a border with an insulating str...
11/20/2008
20070298523SILICON WAFERS AND METHOD OF FABRICATING THE SAME
By using a two-step RTP (rapid thermal processing) process, the wafer is provided which has an ideal semiconductor device region secured by controlling fine oxygen precipitates and OiSFs (Oxidation Induced Stacking Fault) located on the surface region of the wafer. By p...
12/27/2007
20070284578ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY AND METHOD OF TESTING
An array substrate including a signal line, a test line to inspect the open of the signal line and fault of the pixels, and a fuse electrically connecting the signal line with the test line. The fuse is opened when a current higher than a reference current is applied th...
12/13/2007
20070224710Methods to shape the electric field in electron devices, passivate dislocations and point defects, and enhance the luminescence efficiency of optical devices
A fluorine treatment that can shape the electric field profile in electronic devices in 1, 2, or 3 dimensions is disclosed. A method to increase the breakdown voltage of AlGaN/GaN high electron mobility transistors, by the introduction of a controlled amount of dispersi...
09/27/2007
20070181192Method and apparatus for monitoring gas flow amount in semiconductor manufacturing equipment
An apparatus for monitoring gas flow in a semiconductor manufacturing equipment, includes an exhaust line, a flow amount measuring unit, and a controller unit having a first input electrically connected to the flow amount measuring unit and a second input having a prede...
08/09/2007
20060172440Transistor-level signal cutting method and structure
A modifiable circuit structure and its method of formation are disclosed. The modifiable circuit structure electrically couples one portion of an interconnect with another portion of the interconnect through vias disposed in a dielectric layer. The combination of the mo...
08/03/2006
20060077363Correcting device, exposure apparatus, device production method, and device produced by the device production method
A correcting device that properly maintains the flatness of a mask, an exposure apparatus in which overlay accuracy is increased by making use of the correcting device, and a device production method. The correcting device includes a gas flow path including a first area...
04/13/2006
20060035392Application of lignin derivatives to photoelectric transducer and photoelectrochemical cell
The invention regards application of lignin derivatives to a photoelectric transducer. The photoelectric transducer of the invention includes a semiconductor film as a thin film electrode, that is photosensitized by one or multiple lignin derivatives selected from the g...
02/16/2006
20060024849Method and system for characterizing porous materials
A method and system for diagnosing the effectiveness of a treatment on a porous material. For example, the porous material can include a porous low dielectric constant material. In particular, the method can utilize FTIR spectroscopy to characterize the porosity of mate...
02/02/2006
20050136559Quality improvement system
A quality improvement system, which automatically performs engineering analysis and problem coping to improve the quality of semiconductor products. The quality improvement system is connected to a plurality of external databases, which store semiconductor product quali...
06/23/2005
20050059173Test apparatus for a semiconductor package
A test apparatus for a semiconductor package which has at least one chip and a plurality of solder balls includes a socket body, a circuit substrate, and a socket lid. The socket body has a plurality of traces electrically connected to an exterior electric test apparatu...
03/17/2005
20050054124Silicon wafers and method of fabricating the same
By using a two-step RTP (rapid thermal processing) process, the wafer is provided which has an ideal semiconductor device region secured by controlling fine oxygen precipitates and OiSFs (Oxidation Induced Stacking Fault) located on the surface region of the wafer. By p...
03/10/2005
 
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