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| Application No. | Application Title | Issue Date |
| 20110255688 | METHOD AND SYSTEM FOR MONITORING ONLINE COMPUTER NETWORK BEHAVIOR AND CREATING ONLINE BEHAVIOR PROFILES A method and system for monitoring users on one or more computer networks, disassociating personally identifiable information from the collected data, and storing it in a database so that the privacy of the users is protected. In one embodiment, the system generates an ... | 10/20/2011 |
| 20110208962 | STREAMLINED PROCESS FOR ENROLLMENT OF MULTIPLE DIGITAL CERTIFICATES The enrollment process for purchasing multiple digital certificates configured using different cryptographic algorithms or hashing algorithms is streamlined. A certificate purchaser wishing to purchase two or more certificates is prompted to provide answers to common en... | 08/25/2011 |
| 20110176674 | COUNTERMEASURE METHOD AND DEVICE FOR PROTECTING DATA CIRCULATING IN AN ELECTRONIC COMPONENT The present disclosure relates to a countermeasure method in an integrated circuit comprising at least one first logic circuit and at least one first input register supplying the first logic circuit with a datum, the method comprising steps of introducing a random datum... | 07/21/2011 |
| 20110161662 | SYSTEM AND METHOD FOR UPDATING DIGITAL CERTIFICATE AUTOMATICALLY A system and method for automatically updating a digital certificate prompts a user of a client computer to update a current digital certificate if a period of validity of the current digital certificate elapses or is about to elapse, and creates a new digital certifica... | 06/30/2011 |
| 20110129085 | CRYPTOGRAPHIC DEVICE FOR IMPLEMENTING S-BOX Provided is a cryptographic device implementing an S-Box of an encryption algorithm using a many-to-one binary function. The cryptographic device includes: arrays of first logic gates including I first logic gates which each receive 2 bits of an input signal; 2N 06/02/2011 | |
| 20110099369 | FILE ENCRYPTION SYSTEM AND METHOD An electronic document comparison system and method converts a test file into a compressed file having a specific format. A public key of the CA certificate of a user is obtained and a random key is generated using a random function. Furthermore, the compressed file is ... | 04/28/2011 |
| 20110091034 | Secure Method for Cryptographic Computation and Corresponding Electronic Component The secure method for cryptographic computation comprises processing of an input datum (D) by a cryptographic computation tool involving at least one encryption key (K) and at least one generated item of secret information, so as to provide an output datum (DC). The gen... | 04/21/2011 |
| 20100329450 | INSTRUCTIONS FOR PERFORMING DATA ENCRYPTION STANDARD (DES) COMPUTATIONS USING GENERAL-PURPOSE REGISTERS Some embodiments of the present invention provide a processor, which includes a set of general-purpose registers and at least one execution unit. Each general-purpose register in the set of general-purpose registers is at least 64 bits wide, and the execution unit suppo... | 12/30/2010 |
| 20100329463 | GROUP KEY MANAGEMENT FOR MOBILE AD-HOC NETWORKS Group key management in a mobile ad-hoc network (MANET) may be provided. Each network node associated with the MANET may comprise a group distribution key and a list of authorized member nodes from which a group key manager may be elected. The group key manager may peri... | 12/30/2010 |
| 20100329460 | METHOD AND APPARATUS FOR ASSURING ENHANCED SECURITY Some embodiments provide a system to assure enhanced security, e.g., by assuring that information is not revealed over a covert channel. All communications between a source system and a destination system may pass through an intermediate system. In some embodiments, the... | 12/30/2010 |
| 20100316215 | METHOD OF SHARING A STRONG SECRET BETWEEN TWO PARTIES, ONE OF WHOM HAS LITTLE PROCESSING POWER The invention relates to a method of sharing a strong secret F between two parties (A, B) previously sharing a weak secret F, this method of sharing combining a symmetric algorithm and an asymmetric algorithm, and consisting in using a fixed exponent e of small size, an... | 12/16/2010 |
| 20100318811 | CRYPTOGRAPHIC PROCESSOR A cryptographic processor includes: first and second round function operation circuits, each of which executes cryptographic processing; and a control circuit configured to operate the first and second round function operation circuits by randomly switching between a pa... | 12/16/2010 |
| 20100313036 | Segment deduplication system with encryption of segments A system for storing encrypted data comprises a processor and a memory. The processor is configured to receive an encrypted segment. The encrypted segment is determined by breaking a data stream, a data block, or a data file into one or more segments and encrypting each... | 12/09/2010 |
| 20100303241 | AUTOMATIC CHANGE OF SYMMETRICAL ENCRYPTION KEY An encryption system and a method for automatically changing an encryption key. The key is changed in response to an amount of data that has been encrypted. When the amount of data encrypted with a first key reaches or exceeds a byte count threshold, the first key is de... | 12/02/2010 |
| 20100296651 | ENCRYPTION APPARATUS AND METHOD THEREFOR An encryption apparatus (14) includes an integrated circuit (34) having a secure processing section (30). A plaintext reset epoch key (154) is stored in the secure processing section (30) and configured to have a short life. A plaintex... | 11/25/2010 |
| 20100290617 | SECURE OUTSOURCED AGGREGATION WITH ONE-WAY CHAINS Secure outsourced aggregation of data using one-way chains is discussed in this application. Each input data source such as a sensor generates a Verifiable Synopsis (“VS”) which includes sensor data, an Inflation Free Proof (“IFP”) generated using a cryptographi... | 11/18/2010 |
| 20100286846 | Vehicle Central Lock Antitheft Method and System A vehicle central lock antitheft method and system includes a central lock system which is connected by radio with a remote controller for identity verification using rolling codes (S101, S102), wherein the central lock system chooses a security state (S 11/11/2010 | |
| 20100269174 | SYSTEMS AND METHODS FOR GENERATING A DNS QUERY TO IMPROVE RESISTANCE AGAINST A DNS ATTACK The present solution provides systems and methods for generating DNS queries that are more resistant to being compromised by attackers. To generate the transaction identifier, the DNS resolver uses a cryptographic hash function. The inputs to the hash function may inclu... | 10/21/2010 |
| 20100266127 | SYSTEMS AND METHODS FOR ONE-TO-MANY SECURE VIDEO ENCRYPTION A video encryption/decryption scheme is provided allowing an originator of video content to encrypt the video content using a session key, wherein the encrypted content and an encrypted form of the session key are provided to a destination. The session key is encrypted ... | 10/21/2010 |
| 20100246814 | APPARATUS AND METHOD FOR IMPLEMENTING INSTRUCTION SUPPORT FOR THE DATA ENCRYPTION STANDARD (DES) ALGORITHM A processor including instruction support for implementing the Data Encryption Standard (DES) block cipher algorithm may issue, for execution, programmer-selectable instructions from a defined instruction set architecture (ISA). The processor may include a cryptographic... | 09/30/2010 |
| 20100246818 | METHODS AND APPARATUSES FOR GENERATING DYNAMIC PAIRWISE MASTER KEYS A method to generate a pairwise master key for use in establishing a wireless connection is presented. In one embodiment, the method comprises determining a region in an image. The method further comprises generating the pairwise master key based at least on contents of... | 09/30/2010 |
| 20100246815 | APPARATUS AND METHOD FOR IMPLEMENTING INSTRUCTION SUPPORT FOR THE KASUMI CIPHER ALGORITHM A processor including instruction support for implementing the Kasumi block cipher algorithm may issue, for execution, programmer-selectable instructions from a defined instruction set architecture (ISA). The processor may include a cryptographic unit that may receive i... | 09/30/2010 |
| 20100229005 | DATA WHITENING FOR WRITING AND READING DATA TO AND FROM A NON-VOLATILE MEMORY Systems, apparatuses, and methods are provided for whitening and managing data for storage in non-volatile memories, such as Flash memory. In some embodiments, an electronic device such as media player is provided, which may include a system-on-a-chip (SoC) and a non-vo... | 09/09/2010 |
| 20100228992 | CRYPTOGRAPHIC METHOD AND APPARATUS FOR ENHANCING COMPUTATION PERFORMANCE OF A CENTRAL PROCESSING UNIT A cryptographic method for enhancing computation performance of a central processing unit involves the execution of a conversion function of the cryptographic method by the central processing unit. The conversion function computation requires the use of a plurality of s... | 09/09/2010 |
| 20100220853 | Method and Apparatus for Compound Hashing Via Iteration A method and apparatus for a system and process for generating a hashing value using any number of cryptographic hashing functions. The hashing process receives an input value to be hashed. The input value is cyptographically hashed and augmented. The augmented value is... | 09/02/2010 |
| 20100220854 | DATA SECURITY SYSTEM A data security system that includes a first memory device to store message data to be secured, a second memory device to store microcode including an instruction set defining a cryptographic algorithm for use in securing the message data, and a processing unit to execu... | 09/02/2010 |
| 20100220863 | Key Recovery Mechanism for Cryptographic Systems A cryptographic system can include a register containing a key and a processor coupled to the register. The processor can be operable for performing a first encrypting operation, where the encrypting operation includes computing a key schedule using the register as a wo... | 09/02/2010 |
| 20100183146 | PARALLELIZABLE INTEGRITY-AWARE ENCRYPTION TECHNIQUE The present disclosure provides a parallelizable integrity-aware encryption technique. In at least one embodiment of the present disclosure, a parallelizable integrity-aware encryption method comprises whitening at least one message block with a first mask value, encryp... | 07/22/2010 |
| 20100166176 | Elliptical polynomial-based message authentication code The elliptic-polynomial based Message Authentication Code (MAC) provides MAC generation methods based on the elliptic polynomial discrete logarithm problem. It is well known that an elliptic polynomial discrete logarithm problem is a computationally “difficult” or ... | 07/01/2010 |
| 20100158247 | METHOD AND SYSTEM FOR SECURE STORAGE, TRANSMISSION AND CONTROL OF CRYPTOGRAPHIC KEYS A system and method are described supporting secure implementations of 3DES and other strong cryptographic algorithms. A secure key block having control, key, and hash fields safely stores or transmits keys in insecure or hostile environments. The control field provides... | 06/24/2010 |
| 20100153744 | CRYPTOGRAPHIC PROCESSING APPARATUS A cryptographic processing apparatus includes: at least one register configured to store data for operation; a first operation block configured to execute an operation in accordance with data stored in the register; a second operation block configured to execute a logic... | 06/17/2010 |
| 20100150341 | STORAGE SECURITY USING CRYPTOGRAPHIC SPLITTING Methods and systems for securing data in a data storage network are disclosed. One method includes receiving at a secure storage appliance a block of data for storage on a volume, the volume associated with a plurality of shares distributed across a plurality of physica... | 06/17/2010 |
| 20100150350 | Method and Apparatus for Key Expansion to Encode Data An encoder according to the present invention embodiments employs a key expansion module to expand an encryption key by using logic and available clock cycles of an encryption process or loop. The key expansion module generates control signals to enable key expansion da... | 06/17/2010 |
| 20100153747 | PARALLEL ENCRYPTION/DECRYPTION The present disclosure includes methods and devices for parallel encryption/decryption. In one or more embodiments, an encryption/decryption device includes an input logic circuit, an output logic circuit, and a number of encryption/decryption circuits arranged in paral... | 06/17/2010 |
| 20100142702 | Kasumi Cipher Executable Instructions and Circuitry Logic circuitry and corresponding software instructions for performing functions within the FL function of a Kasumi cipher. An RLAX logic circuit includes a bit-wise AND function, a reorder bus, and a bit-wise exclusive-OR function for generating a destination word from... | 06/10/2010 |
| 20100122095 | Hardware-facilitated secure software execution environment A hardware-facilitated secure software execution environment provides protection of both program instructions and data against unauthorized access and/or execution to maintain confidentiality and integrity of the software or the data during distribution, in external mem... | 05/13/2010 |
| 20100104095 | Novel Hash Function With Provable Resistance To Differential Attacks A system and method for coding data to help resist differential attacks. Data in m columns may be initialized to an initialized value. One new column of data may be mixed with a new input word and input to an advanced mixer. The advanced mixer may include linear mixing ... | 04/29/2010 |
| 20100098244 | SYSTEM AND METHOD FOR STREAM/BLOCK CIPHER WITH INTERNAL RANDOM STATES Disclosed herein are systems, methods, and computer readable-media for performing data encryption and decryption using a stream or block cipher with internal random states. The method includes splitting the input data into a predetermined number of blocks and processing... | 04/22/2010 |
| 20100098249 | METHOD AND APPARATUS FOR ENCRYPTING DATA AND METHOD AND APPARATUS FOR DECRYPTING DATA Provided are a method and apparatus for encrypting data, and a method and apparatus for decrypting data. The method of encrypting data includes generating an encryption key by using current time information indicating a current time, encrypting data by using the generat... | 04/22/2010 |
| 20100086127 | EFFICIENT IMPLEMENTATION OF ARITHMETICAL SECURE HASH TECHNIQUES An apparatus including an initialization circuit and a hash computation circuit. The initialization circuit may be configured to present a number of initialization values. The hash computation circuit may be configured to generate hash values for the message in response... | 04/08/2010 |
