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| Application No. | Application Title | Issue Date |
| 20120027159 | SYSTEM AND METHOD FOR SETTING COUNTER THRESHOLD VALUE A system and method for configuring threshold values for fixed time delay counters of a System on a Chip (SoC) uses a reference clock signal and one or more frequency sub-range control signals corresponding to a frequency sub-range of the reference clock signal. A frequ... | 02/02/2012 |
| 20110206176 | TRIGGER CIRCUITS AND EVENT COUNTERS FOR AN IC Some embodiments provide an integrated circuit (“IC”). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of config... | 08/25/2011 |
| 20110103540 | MULTIPLE BASE COUNTER REPRESENTATION A method comprises loading by logic a storage location with a count value. The count value comprises a plurality of upper order bits and a plurality of lower order bits. The method further comprises detecting, by said logic, an event and, based on detecting the event, s... | 05/05/2011 |
| 20100290580 | METHOD AND APPARATUS FOR CALIBRATING A COUNTING CIRCUIT Timing circuitry may use control circuitry to control calibration circuitry to calibrate a counter so that an adder and a calibration period counter are not required. Concatenation circuitry may be used to concatenate a portion of the counter value and the calibration v... | 11/18/2010 |
| 20100102203 | PULSE DATA RECORDER A pulse data recorder system and method are provided. Upon the arrival or occurrence of an event or signal, the state of a digital switch is set. Upon receiving a pulse from a readout clock, the state of the switch is stored in a buffer memory, and the state of the swit... | 04/29/2010 |
| 20090116611 | SPACE AND POWER EFFICIENT HYBRID COUNTERS ARRAY A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value... | 05/07/2009 |
| 20090116610 | LOW LATENCY COUNTER EVENT INDICATION A hybrid counter array device for counting events with interrupt indication includes a first counter portion comprising N counter devices, each for counting signals representing event occurrences and providing a first count value representing lower order bits. An overfl... | 05/07/2009 |
| 20090086880 | COUNTER USING SHIFT FOR ENHANCED ENDURANCE A counting device includes a set of memory cells, which are configured to store respective bits of a count code. A controller is coupled to the memory cells so as to increment, in response to occurrences of a count input, the count code in the set of the memory cells fr... | 04/02/2009 |
| 20080309534 | Quantizing circuits for semiconductor devices An electronic device that includes an internal data storage location coupled to an electrical conductor and a quantizing circuit coupled to the internal data storage location via the electrical conductor. In some embodiments, the quantizing circuit includes an analog-to... | 12/18/2008 |
| 20080181352 | PULSE COUNTER FOR AN INSECT ELECTROCUTOR An electric pulse counter for counting and recording the number of insects killed in a commercial insect electrocutor through an on-site field server is disclosed. The pulse counter is configured of field servers 100, an internet 40, an administrative comp... | 07/31/2008 |
| 20070286327 | Implementation-efficient multiple-counter value hardware performance counter An implementation-efficient, multiple-counter value hardware performance counter is disclosed. A hardware counter of one embodiment includes a memory array and a hardware incrementer. The array stores counter values that are indexable by an index constructed based at le... | 12/13/2007 |
