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| Application No. | Application Title | Issue Date |
| 20120106611 | PHASE LOCKING LOOP A phase-locking loop (PLL) for use with orthogonal frequency division multiplexed signals. In one embodiment, a wireless receiver includes a PLL is configured to reduce phase and frequency divergence between the wireless receiver and a transmitter of a packet received b... | 05/03/2012 |
| 20120039378 | CONVERTER AND CONVERTER CONTROL METHOD Techniques are generally described for a converter including a PLL and a pulse deleting circuit. The pulse deleting circuit is configured to delete a pulse from one of the inputs to the PLL when a filtered output in the PLL falls below a first reference level and an unl... | 02/16/2012 |
| 20120014427 | Methods and Apparatus for Determining a Phase Error in Signals An integrated circuit includes samplers, a phase error determination circuit, and periodic signal generators. The samplers generate respective sampled signals by sampling respective input signals in response to respective periodic signals. The input signals have a commo... | 01/19/2012 |
| 20110292987 | METHOD FOR DECOMPOSING AND ANALYZING JITTER USING SPECTRAL ANALYSIS AND TIME-DOMAIN PROBABILITY DENSITY A method for analyzing jitter using a test and measurement instrument includes obtaining a collection of time interval error (TIE) values corresponding to composite jitter of a waveform, optionally decomposing the composite jitter into jitter components that are correla... | 12/01/2011 |
| 20110286510 | ELECTRONIC DEVICE FOR GENERATING A FRACTIONAL FREQUENCY It is described an electronic device for generating a fractional synthesized frequency. The device comprises a multi-phase controlled oscillator configured to generate, from a control signal, a plurality of signals phase-shifted each other and comprises a phase detector... | 11/24/2011 |
| 20110268169 | EQUALIZATION APPARATUS AND BROADCASTING RECEIVING APPARATUS An equalization apparatus configured to receive a digitally modulated single carrier signal and perform multipath equalization in a frequency domain, including a frequency domain conversion unit which converts a received signal to a frequency domain signal, a channel es... | 11/03/2011 |
| 20110249718 | METHOD AND APPARATUS FOR CORRECTING PHASE ERRORS DURING TRANSIENT EVENTS IN HIGH-SPEED SIGNALING SYSTEMS A system for dynamically correcting phase errors between data and a timing reference signal caused by a transient event during data communication between a transmitter and a receiver is described. During operation, the system stores one or more phase-offset values for t... | 10/13/2011 |
| 20110235694 | Apparatus and Method for Generating a Waveform Test Signal Having Crest Factor Emulation of Random Jitter A signal generating device has a display and a central processing unit for setting parameters for a serial data pattern and parameters for deterministic and random jitter impairments, and a displacement crest factor emulation impairment to be applied to the serial data ... | 09/29/2011 |
| 20110230154 | SINGLE CARRIER COMMUNICATION IN DYNAMIC FADING CHANNELS Briefly, in accordance with one or more embodiments, in response to receiving a single carrier signal that is not phase locked, channel equalization may be applied to the signal via a channel equalizer. The equalized signal may be phase averaged to provide a signal that... | 09/22/2011 |
| 20110222592 | MEASUREMENT APPARATUS, MEASUREMENT METHOD AND RECORDING MEDIUM A measurement apparatus that measures at least one of phase error and gain error between I and Q of a quadrature modulator, comprising a supplying section that shifts a reference I signal corresponding to an I component in an IQ signal causing a tone signal and/or a ref... | 09/15/2011 |
| 20110206106 | HIERARCHICAL FEEDBACK OF CHANNEL STATE INFORMATION FOR WIRELESS COMMUNICATION Techniques for sending hierarchical feedback of channel state information are described. In one design, a user equipment (UE) determines channel gain information for multiple cells selectable to transmit data to the UE. The UE also determines intra-cell relative phase i... | 08/25/2011 |
| 20110188559 | REDUCING PHASE ERRORS ON A COMMUNICATION DEVICE A communication device that is configured for reducing phase errors is described. The communication device includes a processor and instructions stored in memory. The communication device calculates a sum channel in the frequency domain, estimates one or more impulse re... | 08/04/2011 |
| 20110176597 | CLOCK JITTER SUPPRESSION METHOD AND COMPUTER-READABLE STORAGE MEDIUM A value held in storage elements coupled to a clock buffer and variably set with a threshold voltage is read out in a state where an analyzing target circuit within an IC operates. An analyzing process specifies an impact of noise in a power supply or ground voltage of ... | 07/21/2011 |
| 20110134985 | Signal Processing System and Method Thereof A signal processing system is provided. The system includes a calculating apparatus, for calculating a phase error of a received signal and generating a weight according to the phase error; a signal adjusting apparatus, coupled to the calculating apparatus, for generati... | 06/09/2011 |
| 20110134984 | APPARATUS AND METHOD FOR OBTAINING PHASE CORRESPONDING TO OBJECT POSITION The apparatus corrects multi-phase signals for detecting a position of an object and obtains a phase corresponding to the position of the object. The apparatus includes a correcting unit correcting the multi-phase signals with error coefficients, respectively, a phase c... | 06/09/2011 |
| 20110135299 | DIFFERENTIAL EYE DIAGRAMS Changes in a signal are detected. The signal is repeatedly sampled in a synchronous manner during a predetermined interval to generate a captured eye diagram. At least one of a positive differential eye diagram or a negative differential eye diagram is generated from th... | 06/09/2011 |
| 20110103451 | System for Independently Modifying Jitter and Noise Components in a Signal Measurement Device A digitizing instrument is used for modifying pattern data and jitter and noise components of a communication signal. In a typical implementation, the midpoints of a rising edge slope and horizontal portion of the communication signal are determined and multiple digital... | 05/05/2011 |
| 20110051791 | Methods and Systems for Calibrating for Gain and Phase Imbalance and Local Oscillator Feed-Through Methods and systems for calibrating a transmitter with I/Q imbalance and local oscillator feed-through include generating a test tone, frequency up-converting the test tone, monitoring one or more features of the up-converted test tone, and adjusting one or more feature... | 03/03/2011 |
| 20110032976 | Start-up Procedure Method and Timing Recovery for Receiver of Communication System A method for starting up a receiver of a communication system includes training an interference canceller of the receiver, keeping the interference canceller in a tracking state after the interference canceller converges, and starting to train a timing recovery device o... | 02/10/2011 |
| 20110026573 | DATA SIGNAL GENERATING APPARATUS It is an object of the present invention to provide a data signal generating apparatus which is small in size, and can output the serial data in a desired sequence without assuming an indefinite state as well as being capable of dealing with the jitter measurement. In t... | 02/03/2011 |
| 20110022904 | MODEM-ASSISTED BIT ERROR CONCEALMENT FOR AUDIO COMMUNICATIONS SYSTEMS Systems and methods are described for managing bit errors present in a series of encoded bits representative of a portion of an audio signal, wherein the series of encoded bits is received over a communication link in an audio communications system. At least one charact... | 01/27/2011 |
| 20100316105 | APPARATUS FOR MEASURING JITTER TRANSFER CHARACTERISTIC An apparatus for rapidly measuring jitter transfer characteristics is provided. A modulation signal generator generates a modulation signal M including a plurality of sinusoidal components having known amplitudes m1 to mn and different frequencies ... | 12/16/2010 |
| 20100266004 | DETECTING APPARATUS, CALCULATING APPARATUS, MEASUREMENT APPARATUS, DETECTING METHOD, CALCULATING METHOD, TRANSMISSION SYSTEM, PROGRAM, AND RECORDING MEDIUM Provided is a detection apparatus that detects a phase alignment error between transmission signals transmitted on different channels, comprising a correlation calculating section that calculates a cross-spectrum between the transmission signals based on a result of a m... | 10/21/2010 |
| 20100259646 | DATA TRANSFER DEVICE AND CAMERA A data transfer device transfers a data signal being digital in synchronization with a clock signal and includes a delay section, a measurement section, and a control section. The delay section controls a delay amount given to the data signal. The measurement section ac... | 10/14/2010 |
| 20100246655 | JITTER MEASURING APPARATUS It is an object of the invention to correctly display the waveform of a demodulation signal with a single apparatus. A jitter demodulator which demodulates a jitter component of a digital signal input from the outside, a jitter amount detector which detects the amplitud... | 09/30/2010 |
| 20100232489 | FAST SERDES I/O CHARACTERIZATION A system and method to perform automatic testing of a device using Design-for-Test functionality built-in a pair of serializer/deserializer (SERDES) of the device to perform I/O characterization with respect to clock jitter in a self-test mode. Performance of a SERDES o... | 09/16/2010 |
| 20100220778 | FREQUENCY CONVERTING SYSTEM In a frequency converting system, an input signal x(t) is supplied to a signal branching section for dividing a predetermined frequency domain into M bands, extracting signal components of the respective divided bands. The respective signal components and local signals ... | 09/02/2010 |
| 20100195706 | SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING METHOD A signal processing circuit for compensating for an I/Q amplitude mismatch in which the amplitudes of I- and Q-components of output signals of a quadrature modulator are unequal to or for compensating for an I/Q phase mismatch in which the phase difference between the I... | 08/05/2010 |
| 20100158090 | CARRIER RECOVERING APPARATUS AND CARRIER RECOVERING METHOD A carrier recovering apparatus, in which degradation of the demodulation performance caused when a pilot signal cannot be normally received is suppressed, includes a rotation calculator for multiplying a baseband signal and an oscillation signal and outputting a multipl... | 06/24/2010 |
| 20100158092 | JITTER ADDITION APPARATUS AND TEST APPARATUS Provided is a jitter injection apparatus that injects jitter into a signal, comprising: a plurality of jitter injecting sections that are provided in series in a transmission path that propagates the signal; an output section that selects the signal that is passed from ... | 06/24/2010 |
| 20100158091 | FREQUENCY ERROR ESTIMATOR AND FREQUENCY ERROR ESTIMATING METHOD THEREOF Provided is a frequency error estimating method of a communication system. The method includes receiving a frame, and calculating a frequency error from a SOF field of the received frame.... | 06/24/2010 |
| 20100150218 | JITTER GENERATION APPARATUS, DEVICE TEST SYSTEM USING THE SAME, AND JITTER GENERATION METHOD A jitter generation apparatus for applying a phase modulation to a PLL is controlled by a control unit so as to output a signal with the desired jitter based on a parameters. When a switching unit is switched to a first state, the control unit controls first and second ... | 06/17/2010 |
| 20100135373 | CLOCK GENERATING DEVICE AND JITTER REDUCING METHOD IN THE CLOCK GENERATING DEVICE A clock generating device includes: a DDS circuit that generates a periodic signal; and a comparator that compares an input signal and a reference signal and outputs a binary signal. The clock generating device includes a rate-of-change correcting unit that applies corr... | 06/03/2010 |
| 20100111154 | ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD THEREFOR A wireless communication device comprises a number of sub-systems and clock generation logic arranged to generate at least one clock signal to be applied to the number of sub-systems. One of the number of sub-systems comprises sampling logic for receiving input data and... | 05/06/2010 |
| 20100091828 | Digital Phase Feedback for Determining Phase Distortion A feedback loop is used to determine phase distortion created in a signal by directly extracting the phase distortion information from a feedback signal using original frequency modulation information.... | 04/15/2010 |
| 20100091827 | Adaptive frequency-domain reference noise canceller for multicarrier communications systems A method and apparatus to align data blocks in a data signal and a reference signal to increase cross-correlation between the data signal and the reference signal as compared to the unaligned data and reference signals and cancel interference in the data signal in the f... | 04/15/2010 |
| 20100080274 | JITTER MEASUREMENT APPARATUS, JITTER CALCULATOR, JITTER MEASUREMENT METHOD, PROGRAM, RECORDING MEDIUM, COMMUNICATION SYSTEM AND TEST APPARATUS Provided is a jitter measurement apparatus that measures timing jitter of a signal under measurement having a prescribed repeating pattern, comprising a sampling section that coherently samples the signal under measurement within a prescribed measurement duration; a wav... | 04/01/2010 |
| 20100074314 | Margin Test Methods And Circuits Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference... | 03/25/2010 |
| 20100061435 | Jitter evaluation A jitter evaluation apparatus for receiving a digital test signal from which a clock signal is recovered, is shown. A clock recovery circuit (401) recovers a clock signal from the test signal and a synchronisation circuit generates a synchronised system clock sig... | 03/11/2010 |
| 20100054318 | Timing Error Detector and Method Thereof An effective data sequence based timing error detector (EDS-TED) for baseband transmission system using Tomlinson-Harashima Precoder is disclosed. The EDS-TED extracts timing error information embedded in the received signal to build up autocorrelation between the ESD s... | 03/04/2010 |
