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| Application No. | Application Title | Issue Date |
| 20120044738 | ONE-TIME PROGRAMMABLE MEMORIES USING POLYSILICON DIODES AS PROGRAM SELECTORS Polysilicon diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, using electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse etc. as OTP element The diode can b... | 02/23/2012 |
| 20120044739 | CIRCUIT AND SYSTEM OF USING JUNCTION DIODE AS PROGRAM SELECTOR FOR ONE-TIME PROGRAMMABLE DEVICES Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The OTP device has an OTP elem... | 02/23/2012 |
| 20120044740 | ONE-TIME PROGRAMMABLE MEMORIES USING JUNCTION DIODES AS PROGRAM SELECTORS Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The diode can be constructed b... | 02/23/2012 |
| 20120044737 | CIRCUIT AND SYSTEM OF USING POLYSILICON DIODE AS PROGRAM SELECTOR FOR ONE-TIME PROGRAMMABLE DEVICES Polysilicon diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The OTP device has an OTP e... | 02/23/2012 |
| 20120039105 | SEMICONDUCTOR DEVICE Both decreasing access time and power consumption and improving storage bit count per one word line are compatibly attained. A memory cell array 1 has a configuration in which at least one row of memory cells MC having a fuse device F with a resistance value vari... | 02/16/2012 |
| 20120020139 | Apparatus and Method for Testing One-Time-Programmable Memory An apparatus and method of testing one-time-programmable memory limits current through a one-time-programmable memory to less than a threshold amplitude, where the memory has a fuse configured to blow upon receipt of a signal having the threshold amplitude. The method a... | 01/26/2012 |
| 20120008363 | Diode-Less Array for One-Time Programmable Memory A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a ... | 01/12/2012 |
| 20110317468 | Non-Volatile Memory with Split Write and Read Bitlines Read and write operations of a non-volatile memory (NVM) bitcell have different optimum parameters resulting in a conflict during design of the NVM bitcell. A single bitline in the NVM bitcell prevents optimum read performance. Read performance may be improved by splitt... | 12/29/2011 |
| 20110292711 | DATA ENCODING SCHEME TO REDUCE SENSE CURRENT Techniques for encoding and decoding fuse data to reduce sense current are disclosed. An embodiment to encode fuse sense data includes inverting each of the bits of the fuse data and using an individual fuse as a flag bit to record the data inversion. The states of the ... | 12/01/2011 |
| 20110273949 | ELECTRICAL FUSE PROGRAMMING TIME CONTROL SCHEME A circuit includes a fuse and a sensing and control circuit. The fuse is coupled between a MOS transistor and a current source node. The sensing and control circuit is configured to receive a programming pulse and output a modified programming signal to the gate of the ... | 11/10/2011 |
| 20110267869 | CIRCUIT FOR VERIFYING THE WRITE ENABLE OF A ONE TIME PROGRAMMABLE MEMORY A memory system including a one time programmable (OTP) memory is provided. The memory system further includes a write enable verification circuit including an asymmetric inverter stage and a symmetric inverter stage coupled at a node. The write enable verification circ... | 11/03/2011 |
| 20110235388 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE According to an embodiment of the invention, a nonvolatile semiconductor storage device includes a first memory cell and a second memory cell. A first fuse element in which data can be electrically written only once is provided in the first memory cell. A second fuse el... | 09/29/2011 |
| 20110216572 | ELECTRICALLY PROGRAMMABLE FUSE BIT One-time programmable (OTP) nonvolatile fuse memory cells are disclosed that do not require decoding or addressing for reading their data content. Each fuse memory cell has its content latched at its output and available at all times and can be used, for example, for co... | 09/08/2011 |
| 20110199809 | SECURITY CIRCUIT HAVING AN ELECTRICAL FUSE ROM A security circuit includes an electrical fuse read only memory (ROM) including a plurality of electrical fuse units. The electrical fuse units are arranged to correspond to bit values of an initial security key before the electrical fuse ROM is programmed.... | 08/18/2011 |
| 20110122672 | Non-volatile semiconductor memory device A non-volatile semiconductor memory device having a memory cell in which operating potentials are few and the scale of the peripheral circuitry is reduced includes a select transistor having a source/drain on both sides of a channel of a semiconductor substrate and havi... | 05/26/2011 |
| 20110116299 | SEMICONDUCTOR DEVICE To provide a semiconductor device capable of reducing the line width of a fuse. In the semiconductor device, a dummy fuse is provided adjacent to a fuse, each wiring width of the fuse and the dummy fuse is set to the minimum line width, and... | 05/19/2011 |
| 20110103127 | AND-TYPE ONE TIME PROGRAMMABLE MEMORY CELL An AND-type anti-fuse memory cell, and a memory array consisting of AND-type anti-fuse memory cells. Chains of AND type anti-fuse cells are connected in series with each other, and with a bitline contact, in order to minimize the area occupied by the memory array. Each ... | 05/05/2011 |
| 20110080765 | PROGRAMMABLE ANTIFUSE TRANSISTOR AND METHOD FOR PROGRAMMING THEREOF Programmable antifuse transistor, in particular n-channel MOS transistor, and a method for programming at least one such antifuse transistor, includes at least one gate with a gate terminal, source with a source terminal, drain with a drain terminal, and substrate with ... | 04/07/2011 |
| 20110080764 | ONE-TIME PROGRAMABLE CELL CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME, AND DATA JUDGING METHOD THEREOF Provided is a semiconductor integrated circuit including: an anti-fuse element that electrically connects a first node and a first power supply terminal when data is written and electrically disconnect the first node and the first power supply terminal when data is not ... | 04/07/2011 |
| 20110058402 | Semiconductor device having nonvolatile memory elements A bit memory circuit of an antifuse element set includes two antifuse elements of which logical states are changed from an insulation state to a conductive state when a program voltage is applied. 1-bit data is represented by the logical states of the two antifuse eleme... | 03/10/2011 |
| 20100328987 | E-FUSE APPARATUS FOR CONTROLLING REFERENCE VOLTAGE REQUIRED FOR PROGRAMMING/READING E-FUSE MACRO IN AN INTEGRATED CIRCUIT VIA SWITCH DEVICE IN THE SAME INTEGRATED CIRCUIT An electrically programmable fuse (e-fuse) apparatus includes an e-fuse macro and a switch device. The e-fuse macro is disposed in an integrated circuit, and has a plurality of e-fuse units. The switch device is disposed in the integrated circuit, and has an output node... | 12/30/2010 |
| 20100309709 | UNIT CELL OF NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY DEVICE WITH THE SAME Disclosed are a unit cell capable of improving a reliability by enhancing a data sensing margin in a read operation, and a nonvolatile memory device with the same. The unit cell of a nonvolatile memory device includes: an antifuse having a first terminal between an inpu... | 12/09/2010 |
| 20100302833 | Semiconductor device having nonvolatile memory element and manufacturing method thereof To provide a semiconductor device including a pair of antifuse elements at either a high level or a low level, an OR circuit that outputs different logic information for a case that at least one of the antifuse elements is at a high level and a case that both of the ant... | 12/02/2010 |
| 20100296328 | BURIED BIT LINE ANTI-FUSE ONE-TIME-PROGRAMMABLE NONVOLATILE MEMORY An anti-fuse one-time-programmable (OTP) nonvolatile memory cell has a P well substrate with two P.sup.-doped regions. Another N.sup.+doped region, functioning as a bit line, is positioned adjacent and between the two P.sup.-doped regions on the substrate. An anti-fuse ... | 11/25/2010 |
| 20100265754 | SEMICONDUCTOR MEMORY DEVICE AND DATA PROCESSING DEVICE When writing into an antifuse memory element finishes, a value of resistance of the memory element rapidly decreases; accordingly, an output voltage of a boosting circuit which produces a writing voltage rapidly decreases. By detecting a change in the output voltage of ... | 10/21/2010 |
| 20100246237 | ANTI-FUSE ELEMENT Programmable anti-fuse circuitry including at least one anti-fuse cell having a first anti-fuse device coupled between a supply voltage and a first node and a second anti-fuse device coupled between the first node and a ground voltage, and control logic coupled to the f... | 09/30/2010 |
| 20100244186 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of stacked component units stacked in a first direction, each of the stacked component units including a first conducting film made of a semiconductor of a first conduct... | 09/30/2010 |
| 20100232203 | ELECTRICAL ANTI-FUSE AND RELATED APPLICATIONS A first terminal and a second terminal of a FinFET transistor are used as two terminals of an anti-fuse. To program the anti-fuse, a gate of the FinFET transistor is controlled, and a voltage having a predetermined amplitude and a predetermined duration is applied to th... | 09/16/2010 |
| 20100220511 | LOW POWER ANTIFUSE SENSING SCHEME WITH IMPROVED RELIABILITY Generally, a method and circuit for improving the retention and reliability of unprogrammed anti-fuse memory cells. This is achieved by minimizing the tunneling current through the unprogrammed anti-fuse memory cells which can cause eventual gate oxide breakdown. The am... | 09/02/2010 |
| 20100214816 | SEMICONDUCTOR DEVICES SUPPORTING MULTIPLE FUSE PROGRAMMING MODES Semiconductor devices include a plurality of fuses and a plurality of program circuits, respective ones of which are configured to program respective ones of the plurality of fuses. The devices further include a shift register configured to activate at least two of the ... | 08/26/2010 |
| 20100202184 | One-Time Programmable Fuse with Ultra Low Programming Current A method of operating a FinFET fuse includes providing the FinFET fuse including a drain, a gate, a source, and a channel between the drain and the source; and applying a program voltage to one of the source and the drain of the FinFET fuse to cause a punch-through in t... | 08/12/2010 |
| 20100188881 | Method and Device for Correcting and Obtaining Reference Voltage The present invention discloses a method for adjusting a reference voltage, including: decoding a default code configured in a reference voltage register in a chip to obtain an actual reference voltage; comparing the actual reference voltage with a benchmark value to ob... | 07/29/2010 |
| 20100182819 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE A nonvolatile semiconductor memory device comprising: a memory cell array in which two bit lines are provided to each one bit of input data, and memory cells each including an anti-fuse element are arranged at an intersection point between one of the two bit lines and a... | 07/22/2010 |
| 20100182818 | Non-volatile semiconductor memory device and method of writing data therein A device includes a memory cell array and a control circuit, the memory cell array inclusing word-lines, bit-lines, and memory cells arranged at the intersections of the word-lines and the bit-lines, each memory cell inclusing an electrically programmable antifuse eleme... | 07/22/2010 |
| 20100177550 | NONVOLATILE SEMICONDUCTOR MEMORY A nonvolatile semiconductor memory according to an aspect of the invention includes a memory cell array and a power supply circuit. The memory cell array includes memory cells each having an insulating film and being programmed to store information by inflicting an elec... | 07/15/2010 |
| 20100177548 | MULTILEVEL ONE-TIME PROGRAMMABLE MEMORY DEVICE A multilevel one-time programmable memory device includes a plurality of memory cells, wherein each of the plurality of memory cells includes: a first electrode to which a first voltage is applied, a second electrode to which a second voltage is applied and a plurality ... | 07/15/2010 |
| 20100177549 | Silicide-silicon oxide-semiconductor antifuse device and method of making An antifuse contains a first silicide layer, a grown silicon oxide antifuse layer on a first surface of the first silicide layer, and a first semiconductor layer having a first surface in contact with the antifuse layer.... | 07/15/2010 |
| 20100165699 | ANTIFUSE PROGRAMMABLE MEMORY ARRAY Techniques and circuitry are disclosed for efficiently implementing programmable memory array circuit architectures, such as PROM, OTPROM, and other such programmable non-volatile memories. The circuitry employs an antifuse scheme that includes an array of memory bitcel... | 07/01/2010 |
| 20100157648 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH FUSE ELEMENTS AND CONTROL METHOD THEREFORE A semiconductor integrated circuit device includes a first block, a second block, and a control section. The first block includes a first fuse, a first switching configured to write data to the first fuse, a first holding portion capable of holding a first instruction, ... | 06/24/2010 |
| 20100128511 | High density prom The invention shows how diodes in a modern semiconductor process can be used as a very compact switch element in a Programmable Read Only Memory (PROM) using common integrated circuit fuse elements such as polysilicon and metal. This compact switch element allows very d... | 05/27/2010 |
