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| Application No. | Application Title | Issue Date |
| 20110292709 | SEMICONDUCTOR DEVICE A semiconductor device includes a sense amplifier circuit. The sense amplifier circuit includes a cross-coupled first transistor and second transistor that perform amplification. The sources of the cross-coupled transistors are respectively connected in series with a th... | 12/01/2011 |
| 20110267914 | SEMICONDUCTOR MEMORY DEVICE Characteristics of both a memory cell and a peripheral circuit are degraded due to random variations, and a defective characteristic occurs in a combination of components having a substantially worst characteristic at a macro level. To solve this problem, a selector is ... | 11/03/2011 |
| 20110188333 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DRIVING THE SAME A semiconductor memory device can include a first driver configured to generate a pair of first sense amplifier driving signals having an activation period at a predetermined level during command execution; and a second driver that can be configured to generate a pair o... | 08/04/2011 |
| 20110176379 | SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CELL ARRAY OF OPEN BIT LINE TYPE AND CONTROL METHOD THEREOF A semiconductor memory device includes: first and second bit lines of an open bit-line system; a sense amplifier that amplifies a potential difference between the first and second bit lines; a pair of first and second local data lines corresponding to the first and seco... | 07/21/2011 |
| 20110157962 | BIAS SENSING IN DRAM SENSE AMPLIFIERS THROUGH VOLTAGE-COUPLING/DECOUPLING DEVICE Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to th... | 06/30/2011 |
| 20110128764 | SEMICONDUCTOR MEMORY DEVICE A semiconductor device includes a first amplifier circuit, a second amplifier circuit, first and second bit lines coupled to the first amplifier circuit, third and fourth bit lines coupled to the second amplifier circuit, a first equalizer circuit being coupled to the f... | 06/02/2011 |
| 20110116296 | Non-volatile semiconductor memory device A non-volatile semiconductor memory device includes: a memory component in which an electric charge discharging rate between two electrodes is different in accordance with logic of stored information; a sense amplifier that detects the logic of the information by compar... | 05/19/2011 |
| 20110103136 | SEMICONDUCTOR MEMORY DEVICE A sense amplifier is constructed to reduce the occurrence of malfunctions in a memory read operation, and thus degraded chip yield, due to increased offset of the sense amplifier with further sealing down. The sense amplifier circuit is constructed with a plurality of p... | 05/05/2011 |
| 20110069568 | SEMICONDUCTOR MEMORY DEVICE HAVING LOCAL SENSE AMPLIFIER WITH ON/OFF CONTROL A semiconductor memory device includes a plurality of memory cell array blocks, a bit line sense amplifier, a local sense amplifier that can be controlled to be turned on or off, a data sense amplifier, and a controller. The controller activates a local sense control si... | 03/24/2011 |
| 20100296349 | NON-VOLATILE SEMICONDUCTOR MEMORY CIRCUIT WITH IMPROVED RESISTANCE DISTRIBUTION Disclosed is a non-volatile semiconductor memory circuit with an improved resistance spread characteristic distinguishing set data and reset data. The non-volatile semiconductor memory circuit includes a memory cell array, and a read/write circuit block configured to di... | 11/25/2010 |
| 20100232244 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device comprises: a memory cell array including a plurality of word lines, a plurality of bit line pairs containing a first bit line and a second bit line, and a plurality of memory cells; a plurality of replica bit lines formed in the same manner... | 09/16/2010 |
| 20100182861 | SENSE AMPLIFIER WITH A COMPENSATING CIRCUIT A sense amplifier for a memory includes a transistor, an operational amplifier, and a compensating circuit. The negative input end of the operational amplifier is coupled to the compensating circuit. The positive input end of the operational amplifier is coupled to the ... | 07/22/2010 |
| 20100149850 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory device including: a memory cell array including: memory cell blocks each having series-connected memory cells; wordlines; and a bitline pair connected to the memory cel... | 06/17/2010 |
| 20100128513 | SEMICONDUCTOR MEMORY DEVICE A memory cell array includes a memory cell comprising a ferroelectric capacitor and a transistor arranged therein. A plate line applies a drive voltage to one end of the ferroelectric capacitor. A bit line reads data stored in the memory cell from the other end of the f... | 05/27/2010 |
| 20100124134 | Semiconductor device A semiconductor device includes a plurality of memory cells and a sense amplifier circuit which further includes a plurality of elements such as MOS transistor formed in a well, wherein sensitive element, which are sensitive to dispersion of an impurity density in the w... | 05/20/2010 |
| 20100103757 | SEMICONDUCTOR DEVICE A semiconductor device may include, but is not limited to, a first signal line, a second signal line, and a first shield line. The first signal line is supplied with a first signal. The first signal is smaller in amplitude than a potential difference between a power pot... | 04/29/2010 |
| 20100067283 | SENSE AMPLIFIER A sense amplifier according to an example of the present invention has first, second, third and fourth FETs with a flip-flop connection. A drain of a fifth FET is connected to a first input node, and its source is connected to a power source node. A drain of a sixth FET... | 03/18/2010 |
| 20100067318 | SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY DEVICE HAVING SENSE AMPLIFIER A sense amplifier comprises: a differential amplifier circuit configured to generate an amplified signal depending on a difference in voltage between bit lines; an output circuit receiving the amplified signal; and a load. The differential amplifier circuit comprises: a... | 03/18/2010 |
| 20100067308 | Sub Volt Flash Memory System Various circuits include MOS transistors that have a bulk voltage terminal for receiving a bulk voltage that is different from a supply voltage and ground. The bulk voltage may be selectively set so that some MOS transistors have a bulk voltage set to the supply voltage... | 03/18/2010 |
| 20100054042 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF INSPECTING THE SAME A semiconductor memory device comprises a sense amplifier circuit having a first and a second input terminal, the sense amplifier configured to compare current flowing in the first input terminal with current flowing in the second input terminal, and the sense amplifier... | 03/04/2010 |
| 20100014361 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME A semiconductor memory device can stabilize a voltage level of a normal driving voltage terminal in a normal driving operation, which is performed after an overdriving operation, even when an overdriving voltage is unstable due to environmental factors of the semiconduc... | 01/21/2010 |
| 20090323448 | Bias Sensing in Dram Sense Amplifiers Through Voltage-Coupling/Decoupling Device Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to th... | 12/31/2009 |
| 20090279372 | SEMICONDUCTOR MEMORY DEVICE AND SENSE AMPLIFIER In a sense amplifier circuit having a plurality of sense amplifier portions arranged in order, each of the sense amplifier portions includes a transistor that supplies a bit line potential to a bit line pair in a corresponding column of a memory cell array and a gate el... | 11/12/2009 |
| 20090268538 | Current sensing circuit and semiconductor memory device including the same To provide a current sensing circuit that detects a difference between a cell current and a reference current. The current sensing circuit includes: current mirror circuits of which the input terminal is connected with a reference current source; a differential amplifie... | 10/29/2009 |
| 20090238010 | SYSTEMS AND DEVICES INCLUDING MULTI-TRANSISTOR CELLS AND METHODS OF USING, MAKING, AND OPERATING THE SAME Disclosed are methods, systems and devices, including devices having a plurality of data cells. In some embodiments, each data cell includes a first transistor, a second transistor, and a data element. The first transistor may have a column gate and a channel, and the s... | 09/24/2009 |
| 20090225586 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device includes a sense amplifier that compares intensities of currents flowing through a first node and a second node with each other, a first MOSFET having a drain terminal connected with the first node, a second MOSFET having a drain terminal c... | 09/10/2009 |
| 20090219749 | METHOD AND APPARATUS FOR IMPLEMENTING CONCURRENT MULTIPLE LEVEL SENSING OPERATION FOR RESISTIVE MEMORY DEVICES An apparatus for sensing the data state of a multiple level, programmable resistive memory device includes an active clamping device connected to a data leg that is selectively coupled a programmable resistive memory element, the clamping device configured to clamp a fi... | 09/03/2009 |
| 20090180343 | SEMICONDUCTOR MEMORY DEVICE A sense amplifier is constructed to reduce the occurrence of malfunctions in a memory read operation, and thus degraded chip yield, due to increased offset of the sense amplifier with further sealing down. The sense amplifier circuit is constructed with a plurality of p... | 07/16/2009 |
| 20090059686 | Sensing scheme for the semiconductor memory The present invention provides a sensing scheme for semiconductor memory. N-type devices coupling between ground and a bit line and a bit line-bar of memory cells quickly discharge a bit line and a bit line-bar during non-accessing mode. During data accessing mode, one ... | 03/05/2009 |
| 20090027986 | Semiconductor memory device The present invention provides a semiconductor memory device in which the number of write amplifiers is decreased by increasing the number of bit line pairs connected to one pair of common write data lines. Further, by decreasing the number of bit line pairs connected t... | 01/29/2009 |
| 20080316840 | Input/output line sense amplifier and semiconductor memory device using the same An input/output (I/o) line sense amplifier includes a buffer unit, a sense amplifier, and a precharge unit. The buffer unit is driven by a first level voltage to buffer a strobe signal, and the sense amplifier is driven by a second level voltage to amplify a signal of a... | 12/25/2008 |
| 20080285361 | Input/output line sense amplifier and semiconductor device having the same An input/output (I/O) line sense amplifier includes a first sense amplifier configured to amplify a signal of an I/O line in response to a strobe signal, and a second sense amplifier configured to latch and amplify an output signal of the first sense amplifier in respon... | 11/20/2008 |
| 20080278991 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device comprises. word lines; global bit lines intersecting with the word lines; local bit lines partitioned into N (N is an integer greater than or equal to two) sections along the global bit lines and aligned with a same pitch as the global bit ... | 11/13/2008 |
| 20080259707 | Semiconductor storage device A semiconductor storage device for storing data to unit blocks of a memory cell array, comprising: two rows of sense amplifiers arranged on both sides of bit lines and each including sense amplifiers; a switch means for switching a connecting state between one row of se... | 10/23/2008 |
| 20080205180 | Semiconductor memory device having bit-line sense amplifier A semiconductor memory device including a bit-line sense amplifier is not affected by variation in manufacturing process and has a stable driving scheme. The semiconductor memory device includes: a unit memory cell for storing a data; a sense amplification unit includin... | 08/28/2008 |
| 20080175084 | SEMICONDUCTOR MEMORY DEVICE AND SENSE AMPLIFIER CIRCUIT A semiconductor memory device having high integration, low consumption power and high operation speed compatible to each other including a sense amplifier circuit having plural pull-down circuits and a pull-up circuit, in which a transistor constituting one of plural pu... | 07/24/2008 |
| 20080175083 | MEMORY CELL ACCESS CIRCUIT A circuit for accessing a memory cell includes a local bitline and a local sense amplifier having a plurality of transistors. The local bitline may be connect the memory cell and the sense amplifier. A first global bitline may be connected to a first one of the pluralit... | 07/24/2008 |
| 20080159037 | Semiconductor memory device A semiconductor memory device including a bit line sense amplifier for amplifying a voltage corresponding to a charge stored in a capacitor of a memory cell and outputting an amplified voltage and an I/O sense amplifier for receiving the output of the bit line sense amp... | 07/03/2008 |
| 20080158930 | Semiconductor memory device for sensing voltages of bit lines in high speed The present invention relates to a semiconductor memory device for sensing voltages of bit lines in high speed. The semiconductor memory device for sensing voltages of bit lines in high speed includes: a first bit line pair to a fourth bit line pair each coupled to a di... | 07/03/2008 |
| 20080151668 | SEMICONDUCTOR INTEGRATED CIRCUIT One of a pair of data output units outputs data to one of the data line pair precharged to a reference voltage. A switch control unit couples the other of the data line pair to the data line, which corresponds to a data line to which data are not output, in a data outpu... | 06/26/2008 |
